x86: use encoding_length() also elsewhere

[deliverable/binutils-gdb.git] / gas / config / bfin-parse.y

diff --git a/gas/config/bfin-parse.y b/gas/config/bfin-parse.y
index 12e752584c2308403b56817b195451e6f3b5fa4f..4de9231d4d05d7934f09e97f0939b4b44c41eb16 100644 (file)
--- a/gas/config/bfin-parse.y
+++ b/gas/config/bfin-parse.y
@@ -1,6 +1,5 @@
 /* bfin-parse.y  ADI Blackfin parser
-   Copyright 2005, 2006, 2007, 2008, 2009, 2010, 2011
-   Free Software Foundation, Inc.
+   Copyright (C) 2005-2019 Free Software Foundation, Inc.
 
    This file is part of GAS, the GNU Assembler.
 
@@ -21,10 +20,8 @@
 %{
 
 #include "as.h"
-#include <obstack.h>
 
 #include "bfin-aux.h"  /* Opcode generating auxiliaries.  */
-#include "libbfd.h"
 #include "elf/common.h"
 #include "elf/bfin.h"
 
@@ -160,13 +157,15 @@ extern INSTR_T insn;
 static Expr_Node *binary (Expr_Op_Type, Expr_Node *, Expr_Node *);
 static Expr_Node *unary  (Expr_Op_Type, Expr_Node *);
 
-static void notethat (char *, ...);
+static void notethat (const char *, ...);
 
-char *current_inputline;
 extern char *yytext;
-int yyerror (char *);
+int yyerror (const char *);
 
-void error (char *format, ...)
+/* Used to set SRCx fields to all 1s as described in the PRM.  */
+static Register reg7 = {REG_R7, 0};
+
+void error (const char *format, ...)
 {
     va_list ap;
     static char buffer[2000];
@@ -179,7 +178,7 @@ void error (char *format, ...)
 }
 
 int
-yyerror (char *msg)
+yyerror (const char *msg)
 {
   if (msg[0] == '\0')
     error ("%s", msg);
@@ -667,7 +666,7 @@ asm: asm_1 SEMICOLON
              else if (is_group2 ($3) && is_group1 ($5))
                $$ = gen_multi_instr_1 ($1, $5, $3);
              else
-               return yyerror ("Wrong 16 bit instructions groups, slot 2 and slot 3 must be 16-bit instrution group");
+               return yyerror ("Wrong 16 bit instructions groups, slot 2 and slot 3 must be 16-bit instruction group");
            }
          else if (($3->value & 0xf800) == 0xc000)
            {
@@ -676,7 +675,7 @@ asm: asm_1 SEMICOLON
              else if (is_group2 ($1) && is_group1 ($5))
                $$ = gen_multi_instr_1 ($3, $5, $1);
              else
-               return yyerror ("Wrong 16 bit instructions groups, slot 1 and slot 3 must be 16-bit instrution group");
+               return yyerror ("Wrong 16 bit instructions groups, slot 1 and slot 3 must be 16-bit instruction group");
            }
          else if (($5->value & 0xf800) == 0xc000)
            {
@@ -685,7 +684,7 @@ asm: asm_1 SEMICOLON
              else if (is_group2 ($1) && is_group1 ($3))
                $$ = gen_multi_instr_1 ($5, $3, $1);
              else
-               return yyerror ("Wrong 16 bit instructions groups, slot 1 and slot 2 must be 16-bit instrution group");
+               return yyerror ("Wrong 16 bit instructions groups, slot 1 and slot 2 must be 16-bit instruction group");
            }
          else
            error ("\nIllegal Multi Issue Construct, at least any one of the slot must be DSP32 instruction group\n");
@@ -801,7 +800,7 @@ asm_1:
          if (IS_DREG ($1) && !IS_A1 ($4) && IS_A1 ($5))
            {
              notethat ("dsp32alu: dregs = ( A0 += A1 )\n");
-             $$ = DSP32ALU (11, 0, 0, &$1, 0, 0, 0, 0, 0);
+             $$ = DSP32ALU (11, 0, 0, &$1, &reg7, &reg7, 0, 0, 0);
            }
          else
            return yyerror ("Register mismatch");
@@ -811,7 +810,7 @@ asm_1:
          if (!IS_A1 ($4) && IS_A1 ($5))
            {
              notethat ("dsp32alu: dregs_half = ( A0 += A1 )\n");
-             $$ = DSP32ALU (11, IS_H ($1), 0, &$1, 0, 0, 0, 0, 1);
+             $$ = DSP32ALU (11, IS_H ($1), 0, &$1, &reg7, &reg7, 0, 0, 1);
            }
          else
            return yyerror ("Register mismatch");
@@ -849,6 +848,8 @@ asm_1:
        {
          if (!IS_DREG ($2) || !IS_DREG ($4))
            return yyerror ("Dregs expected");
+         else if (REG_SAME ($2, $4))
+           return yyerror ("Illegal dest register combination");
          else if (!valid_dreg_pair (&$9, $11))
            return yyerror ("Bad dreg pair");
          else if (!valid_dreg_pair (&$13, $15))
@@ -864,6 +865,8 @@ asm_1:
        {
          if (!IS_DREG ($2) || !IS_DREG ($4))
            return yyerror ("Dregs expected");
+         else if (REG_SAME ($2, $4))
+           return yyerror ("Illegal dest register combination");
          else if (!valid_dreg_pair (&$8, $10))
            return yyerror ("Bad dreg pair");
          else
@@ -894,7 +897,7 @@ asm_1:
          if (IS_DREG ($1) && IS_DREG ($7))
            {
              notethat ("dsp32alu: dregs = A1.l + A1.h, dregs = A0.l + A0.h  \n");
-             $$ = DSP32ALU (12, 0, &$1, &$7, 0, 0, 0, 0, 1);
+             $$ = DSP32ALU (12, 0, &$1, &$7, &reg7, &reg7, 0, 0, 1);
            }
          else
            return yyerror ("Register mismatch");
@@ -910,14 +913,14 @@ asm_1:
              && IS_A1 ($9) && !IS_A1 ($11))
            {
              notethat ("dsp32alu: dregs = A1 + A0 , dregs = A1 - A0 (amod1)\n");
-             $$ = DSP32ALU (17, 0, &$1, &$7, 0, 0, $12.s0, $12.x0, 0);
+             $$ = DSP32ALU (17, 0, &$1, &$7, &reg7, &reg7, $12.s0, $12.x0, 0);
 
            }
          else if (IS_DREG ($1) && IS_DREG ($7) && !REG_SAME ($3, $5)
                   && !IS_A1 ($9) && IS_A1 ($11))
            {
              notethat ("dsp32alu: dregs = A0 + A1 , dregs = A0 - A1 (amod1)\n");
-             $$ = DSP32ALU (17, 0, &$1, &$7, 0, 0, $12.s0, $12.x0, 1);
+             $$ = DSP32ALU (17, 0, &$1, &$7, &reg7, &reg7, $12.s0, $12.x0, 1);
            }
          else
            return yyerror ("Register mismatch");
@@ -991,7 +994,7 @@ asm_1:
        | a_assign ABS REG_A
        {
          notethat ("dsp32alu: Ax = ABS Ax\n");
-         $$ = DSP32ALU (16, IS_A1 ($1), 0, 0, 0, 0, 0, 0, IS_A1 ($3));
+         $$ = DSP32ALU (16, IS_A1 ($1), 0, 0, &reg7, &reg7, 0, 0, IS_A1 ($3));
        }
        | A_ZERO_DOT_L ASSIGN HALF_REG
        {
@@ -1158,7 +1161,7 @@ asm_1:
        | a_assign MINUS REG_A
        {
          notethat ("dsp32alu: Ax = - Ax\n");
-         $$ = DSP32ALU (14, IS_A1 ($1), 0, 0, 0, 0, 0, 0, IS_A1 ($3));
+         $$ = DSP32ALU (14, IS_A1 ($1), 0, 0, &reg7, &reg7, 0, 0, IS_A1 ($3));
        }
        | HALF_REG ASSIGN HALF_REG plus_minus HALF_REG amod1
        {
@@ -1171,7 +1174,7 @@ asm_1:
          if (EXPR_VALUE ($3) == 0 && !REG_SAME ($1, $2))
            {
              notethat ("dsp32alu: A1 = A0 = 0\n");
-             $$ = DSP32ALU (8, 0, 0, 0, 0, 0, 0, 0, 2);
+             $$ = DSP32ALU (8, 0, 0, 0, &reg7, &reg7, 0, 0, 2);
            }
          else
            return yyerror ("Bad value, 0 expected");
@@ -1183,7 +1186,7 @@ asm_1:
          if (REG_SAME ($1, $2))
            {
              notethat ("dsp32alu: Ax = Ax (S)\n");
-             $$ = DSP32ALU (8, 0, 0, 0, 0, 0, 1, 0, IS_A1 ($1));
+             $$ = DSP32ALU (8, 0, 0, 0, &reg7, &reg7, 1, 0, IS_A1 ($1));
            }
          else
            return yyerror ("Registers must be equal");
@@ -1227,7 +1230,7 @@ asm_1:
          if (!REG_SAME ($1, $2))
            {
              notethat ("dsp32alu: An = Am\n");
-             $$ = DSP32ALU (8, 0, 0, 0, 0, 0, IS_A1 ($1), 0, 3);
+             $$ = DSP32ALU (8, 0, 0, 0, &reg7, &reg7, IS_A1 ($1), 0, 3);
            }
          else
            return yyerror ("Accu reg arguments must differ");
@@ -1347,12 +1350,12 @@ asm_1:
          if (IS_DREG ($1) && $3.regno == REG_A0x)
            {
              notethat ("dsp32alu: dregs_lo = A0.x\n");
-             $$ = DSP32ALU (10, 0, 0, &$1, 0, 0, 0, 0, 0);
+             $$ = DSP32ALU (10, 0, 0, &$1, &reg7, &reg7, 0, 0, 0);
            }
          else if (IS_DREG ($1) && $3.regno == REG_A1x)
            {
              notethat ("dsp32alu: dregs_lo = A1.x\n");
-             $$ = DSP32ALU (10, 0, 0, &$1, 0, 0, 0, 0, 1);
+             $$ = DSP32ALU (10, 0, 0, &$1, &reg7, &reg7, 0, 0, 1);
            }
          else
            return yyerror ("Register mismatch");
@@ -1385,7 +1388,7 @@ asm_1:
          if (REG_SAME ($1, $3) && REG_SAME ($5, $7) && !REG_SAME ($1, $5))
            {
              notethat ("dsp32alu: A1 = ABS A1 , A0 = ABS A0\n");
-             $$ = DSP32ALU (16, 0, 0, 0, 0, 0, 0, 0, 3);
+             $$ = DSP32ALU (16, 0, 0, 0, &reg7, &reg7, 0, 0, 3);
            }
          else
            return yyerror ("Register mismatch");
@@ -1396,7 +1399,7 @@ asm_1:
          if (REG_SAME ($1, $3) && REG_SAME ($5, $7) && !REG_SAME ($1, $5))
            {
              notethat ("dsp32alu: A1 = - A1 , A0 = - A0\n");
-             $$ = DSP32ALU (14, 0, 0, 0, 0, 0, 0, 0, 3);
+             $$ = DSP32ALU (14, 0, 0, 0, &reg7, &reg7, 0, 0, 3);
            }
          else
            return yyerror ("Register mismatch");
@@ -1407,7 +1410,7 @@ asm_1:
          if (!IS_A1 ($1) && IS_A1 ($2))
            {
              notethat ("dsp32alu: A0 -= A1\n");
-             $$ = DSP32ALU (11, 0, 0, 0, 0, 0, $3.r0, 0, 3);
+             $$ = DSP32ALU (11, 0, 0, 0, &reg7, &reg7, $3.r0, 0, 3);
            }
          else
            return yyerror ("Register mismatch");
@@ -1467,7 +1470,7 @@ asm_1:
          if (!IS_A1 ($1) && IS_A1 ($3))
            {
              notethat ("dsp32alu: A0 += A1 (W32)\n");
-             $$ = DSP32ALU (11, 0, 0, 0, 0, 0, $4.r0, 0, 2);
+             $$ = DSP32ALU (11, 0, 0, 0, &reg7, &reg7, $4.r0, 0, 2);
            }
          else
            return yyerror ("Register mismatch");
@@ -1546,7 +1549,7 @@ asm_1:
          if (REG_SAME ($1, $2) && REG_SAME ($7, $8) && !REG_SAME ($1, $7))
            {
              notethat ("dsp32alu: A1 = A1 (S) , A0 = A0 (S)\n");
-             $$ = DSP32ALU (8, 0, 0, 0, 0, 0, 1, 0, 2);
+             $$ = DSP32ALU (8, 0, 0, 0, &reg7, &reg7, 1, 0, 2);
            }
          else
            return yyerror ("Register mismatch");
@@ -4490,7 +4493,7 @@ expr_1: expr_1 STAR expr_1
 EXPR_T
 mkexpr (int x, SYMBOL_T s)
 {
-  EXPR_T e = (EXPR_T) ALLOCATE (sizeof (struct expression_cell));
+  EXPR_T e = XNEW (struct expression_cell);
   e->value = x;
   EXPR_SYMBOL(e) = s;
   return e;
@@ -4500,7 +4503,7 @@ static int
 value_match (Expr_Node *exp, int sz, int sign, int mul, int issigned)
 {
   int umax = (1 << sz) - 1;
-  int min = -1 << (sz - 1);
+  int min = -(1 << (sz - 1));
   int max = (1 << (sz - 1)) - 1;
 
   int v = (EXPR_VALUE (exp)) & 0xffffffff;
@@ -4646,7 +4649,7 @@ unary (Expr_Op_Type op, Expr_Node *x)
 
 int debug_codeselection = 0;
 static void
-notethat (char *format, ...)
+notethat (const char *format, ...)
 {
   va_list ap;
   va_start (ap, format);