/* tc-alpha.c - Processor-specific code for the DEC Alpha AXP CPU.
- Copyright (C) 1989, 93-98, 1999 Free Software Foundation, Inc.
+ Copyright 1989, 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000,
+ 2001, 2002 Free Software Foundation, Inc.
Contributed by Carnegie Mellon University, 1993.
Written by Alessandro Forin, based on earlier gas-1.38 target CPU files.
Modified by Ken Raeburn for gas-2.x and ECOFF support.
#include "as.h"
#include "subsegs.h"
+#include "struc-symbol.h"
#include "ecoff.h"
#include "opcode/alpha.h"
#ifdef OBJ_ELF
#include "elf/alpha.h"
+#include "dwarf2dbg.h"
#endif
-#include <ctype.h>
-
+#include "safe-ctype.h"
\f
/* Local types */
+#define TOKENIZE_ERROR -1
+#define TOKENIZE_ERROR_REPORT -2
+
#define MAX_INSN_FIXUPS 2
#define MAX_INSN_ARGS 5
-struct alpha_fixup
-{
+struct alpha_fixup {
expressionS exp;
bfd_reloc_code_real_type reloc;
};
-struct alpha_insn
-{
+struct alpha_insn {
unsigned insn;
int nfixups;
struct alpha_fixup fixups[MAX_INSN_FIXUPS];
+ long sequence;
};
-enum alpha_macro_arg
-{
- MACRO_EOA = 1, MACRO_IR, MACRO_PIR, MACRO_CPIR, MACRO_FPR, MACRO_EXP
+enum alpha_macro_arg {
+ MACRO_EOA = 1,
+ MACRO_IR,
+ MACRO_PIR,
+ MACRO_OPIR,
+ MACRO_CPIR,
+ MACRO_FPR,
+ MACRO_EXP,
};
-struct alpha_macro
-{
+struct alpha_macro {
const char *name;
void (*emit) PARAMS ((const expressionS *, int, const PTR));
const PTR arg;
enum alpha_macro_arg argsets[16];
};
-/* Extra expression types. */
+/* Extra expression types. */
#define O_pregister O_md1 /* O_register, in parentheses */
#define O_cpregister O_md2 /* + a leading comma */
+/* The alpha_reloc_op table below depends on the ordering of these. */
+#define O_literal O_md3 /* !literal relocation */
+#define O_lituse_addr O_md4 /* !lituse_addr relocation */
+#define O_lituse_base O_md5 /* !lituse_base relocation */
+#define O_lituse_bytoff O_md6 /* !lituse_bytoff relocation */
+#define O_lituse_jsr O_md7 /* !lituse_jsr relocation */
+#define O_lituse_tlsgd O_md8 /* !lituse_tlsgd relocation */
+#define O_lituse_tlsldm O_md9 /* !lituse_tlsldm relocation */
+#define O_gpdisp O_md10 /* !gpdisp relocation */
+#define O_gprelhigh O_md11 /* !gprelhigh relocation */
+#define O_gprellow O_md12 /* !gprellow relocation */
+#define O_gprel O_md13 /* !gprel relocation */
+#define O_samegp O_md14 /* !samegp relocation */
+#define O_tlsgd O_md15 /* !tlsgd relocation */
+#define O_tlsldm O_md16 /* !tlsldm relocation */
+#define O_gotdtprel O_md17 /* !gotdtprel relocation */
+#define O_dtprelhi O_md18 /* !dtprelhi relocation */
+#define O_dtprello O_md19 /* !dtprello relocation */
+#define O_dtprel O_md20 /* !dtprel relocation */
+#define O_gottprel O_md21 /* !gottprel relocation */
+#define O_tprelhi O_md22 /* !tprelhi relocation */
+#define O_tprello O_md23 /* !tprello relocation */
+#define O_tprel O_md24 /* !tprel relocation */
+
+#define DUMMY_RELOC_LITUSE_ADDR (BFD_RELOC_UNUSED + 1)
+#define DUMMY_RELOC_LITUSE_BASE (BFD_RELOC_UNUSED + 2)
+#define DUMMY_RELOC_LITUSE_BYTOFF (BFD_RELOC_UNUSED + 3)
+#define DUMMY_RELOC_LITUSE_JSR (BFD_RELOC_UNUSED + 4)
+#define DUMMY_RELOC_LITUSE_TLSGD (BFD_RELOC_UNUSED + 5)
+#define DUMMY_RELOC_LITUSE_TLSLDM (BFD_RELOC_UNUSED + 6)
+
+#define LITUSE_ADDR 0
+#define LITUSE_BASE 1
+#define LITUSE_BYTOFF 2
+#define LITUSE_JSR 3
+#define LITUSE_TLSGD 4
+#define LITUSE_TLSLDM 5
+
+#define USER_RELOC_P(R) ((R) >= O_literal && (R) <= O_tprel)
+
/* Macros for extracting the type and number of encoded register tokens */
#define is_ir_num(x) (((x) & 32) == 0)
#if 1
#define range_signed_16(x) \
- (((offsetT)(x) >> 15) == 0 || ((offsetT)(x) >> 15) == -1)
+ (((offsetT) (x) >> 15) == 0 || ((offsetT) (x) >> 15) == -1)
#define range_signed_32(x) \
- (((offsetT)(x) >> 31) == 0 || ((offsetT)(x) >> 31) == -1)
+ (((offsetT) (x) >> 31) == 0 || ((offsetT) (x) >> 31) == -1)
#else
-#define range_signed_16(x) ((offsetT)(x) >= -(offsetT)0x8000 && \
- (offsetT)(x) <= (offsetT)0x7FFF)
-#define range_signed_32(x) ((offsetT)(x) >= -(offsetT)0x80000000 && \
- (offsetT)(x) <= (offsetT)0x7FFFFFFF)
+#define range_signed_16(x) ((offsetT) (x) >= -(offsetT) 0x8000 && \
+ (offsetT) (x) <= (offsetT) 0x7FFF)
+#define range_signed_32(x) ((offsetT) (x) >= -(offsetT) 0x80000000 && \
+ (offsetT) (x) <= (offsetT) 0x7FFFFFFF)
#endif
/* Macros for sign extending from 16- and 32-bits. */
but really a predicate should be found to use the non-cast forms. */
#if 1
-#define sign_extend_16(x) ((short)(x))
-#define sign_extend_32(x) ((int)(x))
+#define sign_extend_16(x) ((short) (x))
+#define sign_extend_32(x) ((int) (x))
#else
-#define sign_extend_16(x) ((offsetT)(((x) & 0xFFFF) ^ 0x8000) - 0x8000)
-#define sign_extend_32(x) ((offsetT)(((x) & 0xFFFFFFFF) \
+#define sign_extend_16(x) ((offsetT) (((x) & 0xFFFF) ^ 0x8000) - 0x8000)
+#define sign_extend_32(x) ((offsetT) (((x) & 0xFFFFFFFF) \
^ 0x80000000) - 0x80000000)
#endif
/* Macros to build tokens */
-#define set_tok_reg(t, r) (memset(&(t), 0, sizeof(t)), \
+#define set_tok_reg(t, r) (memset (&(t), 0, sizeof (t)), \
(t).X_op = O_register, \
(t).X_add_number = (r))
-#define set_tok_preg(t, r) (memset(&(t), 0, sizeof(t)), \
+#define set_tok_preg(t, r) (memset (&(t), 0, sizeof (t)), \
(t).X_op = O_pregister, \
(t).X_add_number = (r))
-#define set_tok_cpreg(t, r) (memset(&(t), 0, sizeof(t)), \
+#define set_tok_cpreg(t, r) (memset (&(t), 0, sizeof (t)), \
(t).X_op = O_cpregister, \
(t).X_add_number = (r))
-#define set_tok_freg(t, r) (memset(&(t), 0, sizeof(t)), \
+#define set_tok_freg(t, r) (memset (&(t), 0, sizeof (t)), \
(t).X_op = O_register, \
- (t).X_add_number = (r)+32)
-#define set_tok_sym(t, s, a) (memset(&(t), 0, sizeof(t)), \
+ (t).X_add_number = (r) + 32)
+#define set_tok_sym(t, s, a) (memset (&(t), 0, sizeof (t)), \
(t).X_op = O_symbol, \
(t).X_add_symbol = (s), \
(t).X_add_number = (a))
-#define set_tok_const(t, n) (memset(&(t), 0, sizeof(t)), \
+#define set_tok_const(t, n) (memset (&(t), 0, sizeof (t)), \
(t).X_op = O_constant, \
(t).X_add_number = (n))
-
\f
/* Prototypes for all local functions */
+static struct alpha_reloc_tag *get_alpha_reloc_tag PARAMS ((long));
+static void alpha_adjust_symtab_relocs PARAMS ((bfd *, asection *, PTR));
+
static int tokenize_arguments PARAMS ((char *, expressionS *, int));
static const struct alpha_opcode *find_opcode_match
PARAMS ((const struct alpha_opcode *, const expressionS *, int *, int *));
PARAMS ((unsigned, const struct alpha_operand *, offsetT, char *, unsigned));
static void assemble_insn
PARAMS ((const struct alpha_opcode *, const expressionS *, int,
- struct alpha_insn *));
+ struct alpha_insn *, bfd_reloc_code_real_type));
static void emit_insn PARAMS ((struct alpha_insn *));
static void assemble_tokens_to_insn
PARAMS ((const char *, const expressionS *, int, struct alpha_insn *));
static void assemble_tokens
PARAMS ((const char *, const expressionS *, int, int));
-static int load_expression
+static long load_expression
PARAMS ((int, const expressionS *, int *, expressionS *));
static void emit_ldgp PARAMS ((const expressionS *, int, const PTR));
static void s_alpha_mask PARAMS ((int));
static void s_alpha_frame PARAMS ((int));
static void s_alpha_prologue PARAMS ((int));
+static void s_alpha_file PARAMS ((int));
+static void s_alpha_loc PARAMS ((int));
+static void s_alpha_stab PARAMS ((int));
static void s_alpha_coff_wrapper PARAMS ((int));
#endif
#ifdef OBJ_EVAX
static void s_alpha_align PARAMS ((int));
static void s_alpha_stringer PARAMS ((int));
static void s_alpha_space PARAMS ((int));
+static void s_alpha_ucons PARAMS ((int));
+static void s_alpha_arch PARAMS ((int));
static void create_literal_section PARAMS ((const char *, segT *, symbolS **));
#ifndef OBJ_ELF
static void select_gp_value PARAMS ((void));
#endif
static void alpha_align PARAMS ((int, char *, symbolS *, int));
-
\f
/* Generic assembler global variables which must be defined by all
targets. */
struct option md_longopts[] = {
#define OPTION_32ADDR (OPTION_MD_BASE)
{ "32addr", no_argument, NULL, OPTION_32ADDR },
-#define OPTION_RELAX (OPTION_32ADDR+1)
+#define OPTION_RELAX (OPTION_32ADDR + 1)
{ "relax", no_argument, NULL, OPTION_RELAX },
#ifdef OBJ_ELF
-#define OPTION_MDEBUG (OPTION_RELAX+1)
-#define OPTION_NO_MDEBUG (OPTION_MDEBUG+1)
+#define OPTION_MDEBUG (OPTION_RELAX + 1)
+#define OPTION_NO_MDEBUG (OPTION_MDEBUG + 1)
{ "mdebug", no_argument, NULL, OPTION_MDEBUG },
{ "no-mdebug", no_argument, NULL, OPTION_NO_MDEBUG },
#endif
{ NULL, no_argument, NULL, 0 }
};
-size_t md_longopts_size = sizeof(md_longopts);
-
+size_t md_longopts_size = sizeof (md_longopts);
\f
#ifdef OBJ_EVAX
#define AXP_REG_R0 0
#endif
static segT alpha_lit8_section;
-/* Symbols referring to said sections. */
+/* Symbols referring to said sections. */
#ifdef OBJ_ECOFF
static symbolS *alpha_lita_symbol;
static symbolS *alpha_lit4_symbol;
static offsetT alpha_lit8_literal;
#endif
-/* The active .ent symbol. */
#ifdef OBJ_ELF
+/* The active .ent symbol. */
static symbolS *alpha_cur_ent_sym;
#endif
#ifdef OBJ_ELF
/* Whether we are emitting an mdebug section. */
-int alpha_flag_mdebug = 1;
+int alpha_flag_mdebug = -1;
#endif
/* Don't fully resolve relocations, allowing code movement in the linker. */
#endif
\f
-/* A table of CPU names and opcode sets. */
+#ifdef RELOC_OP_P
+/* A table to map the spelling of a relocation operand into an appropriate
+ bfd_reloc_code_real_type type. The table is assumed to be ordered such
+ that op-O_literal indexes into it. */
+
+#define ALPHA_RELOC_TABLE(op) \
+(&alpha_reloc_op[ ((!USER_RELOC_P (op)) \
+ ? (abort (), 0) \
+ : (int) (op) - (int) O_literal) ])
+
+#define DEF(NAME, RELOC, REQ, ALLOW) \
+ { #NAME, sizeof(#NAME)-1, O_##NAME, RELOC, REQ, ALLOW}
+
+static const struct alpha_reloc_op_tag {
+ const char *name; /* string to lookup */
+ size_t length; /* size of the string */
+ operatorT op; /* which operator to use */
+ bfd_reloc_code_real_type reloc; /* relocation before frob */
+ unsigned int require_seq : 1; /* require a sequence number */
+ unsigned int allow_seq : 1; /* allow a sequence number */
+} alpha_reloc_op[] = {
+ DEF(literal, BFD_RELOC_ALPHA_ELF_LITERAL, 0, 1),
+ DEF(lituse_addr, DUMMY_RELOC_LITUSE_ADDR, 1, 1),
+ DEF(lituse_base, DUMMY_RELOC_LITUSE_BASE, 1, 1),
+ DEF(lituse_bytoff, DUMMY_RELOC_LITUSE_BYTOFF, 1, 1),
+ DEF(lituse_jsr, DUMMY_RELOC_LITUSE_JSR, 1, 1),
+ DEF(lituse_tlsgd, DUMMY_RELOC_LITUSE_TLSGD, 1, 1),
+ DEF(lituse_tlsldm, DUMMY_RELOC_LITUSE_TLSLDM, 1, 1),
+ DEF(gpdisp, BFD_RELOC_ALPHA_GPDISP, 1, 1),
+ DEF(gprelhigh, BFD_RELOC_ALPHA_GPREL_HI16, 0, 0),
+ DEF(gprellow, BFD_RELOC_ALPHA_GPREL_LO16, 0, 0),
+ DEF(gprel, BFD_RELOC_GPREL16, 0, 0),
+ DEF(samegp, BFD_RELOC_ALPHA_BRSGP, 0, 0),
+ DEF(tlsgd, BFD_RELOC_ALPHA_TLSGD, 0, 1),
+ DEF(tlsldm, BFD_RELOC_ALPHA_TLSLDM, 0, 1),
+ DEF(gotdtprel, BFD_RELOC_ALPHA_GOTDTPREL16, 0, 0),
+ DEF(dtprelhi, BFD_RELOC_ALPHA_DTPREL_HI16, 0, 0),
+ DEF(dtprello, BFD_RELOC_ALPHA_DTPREL_LO16, 0, 0),
+ DEF(dtprel, BFD_RELOC_ALPHA_DTPREL16, 0, 0),
+ DEF(gottprel, BFD_RELOC_ALPHA_GOTTPREL16, 0, 0),
+ DEF(tprelhi, BFD_RELOC_ALPHA_TPREL_HI16, 0, 0),
+ DEF(tprello, BFD_RELOC_ALPHA_TPREL_LO16, 0, 0),
+ DEF(tprel, BFD_RELOC_ALPHA_TPREL16, 0, 0),
+};
+
+#undef DEF
-static const struct cpu_type
+static const int alpha_num_reloc_op
+ = sizeof (alpha_reloc_op) / sizeof (*alpha_reloc_op);
+#endif /* RELOC_OP_P */
+
+/* Maximum # digits needed to hold the largest sequence # */
+#define ALPHA_RELOC_DIGITS 25
+
+/* Structure to hold explict sequence information. */
+struct alpha_reloc_tag
{
+ fixS *master; /* the literal reloc */
+ fixS *slaves; /* head of linked list of lituses */
+ segT segment; /* segment relocs are in or undefined_section*/
+ long sequence; /* sequence # */
+ unsigned n_master; /* # of literals */
+ unsigned n_slaves; /* # of lituses */
+ unsigned saw_tlsgd : 1; /* true if ... */
+ unsigned saw_tlsldm : 1;
+ unsigned saw_lu_tlsgd : 1;
+ unsigned saw_lu_tlsldm : 1;
+ unsigned multi_section_p : 1; /* true if more than one section was used */
+ char string[1]; /* printable form of sequence to hash with */
+};
+
+/* Hash table to link up literals with the appropriate lituse */
+static struct hash_control *alpha_literal_hash;
+
+/* Sequence numbers for internal use by macros. */
+static long next_sequence_num = -1;
+\f
+/* A table of CPU names and opcode sets. */
+
+static const struct cpu_type {
const char *name;
unsigned flags;
-} cpu_types[] =
-{
+} cpu_types[] = {
/* Ad hoc convention: cpu number gets palcode, process code doesn't.
- This supports usage under DU 4.0b that does ".arch ev4", and
+ This supports usage under DU 4.0b that does ".arch ev4", and
usage in MILO that does -m21064. Probably something more
specific like -m21064-pal should be used, but oh well. */
static const struct alpha_macro alpha_macros[] = {
/* Load/Store macros */
{ "lda", emit_lda, NULL,
- { MACRO_IR, MACRO_EXP, MACRO_PIR, MACRO_EOA,
- MACRO_IR, MACRO_EXP, MACRO_EOA } },
+ { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
{ "ldah", emit_ldah, NULL,
{ MACRO_IR, MACRO_EXP, MACRO_EOA } },
{ "ldl", emit_ir_load, "ldl",
- { MACRO_IR, MACRO_EXP, MACRO_PIR, MACRO_EOA,
- MACRO_IR, MACRO_EXP, MACRO_EOA } },
+ { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
{ "ldl_l", emit_ir_load, "ldl_l",
- { MACRO_IR, MACRO_EXP, MACRO_PIR, MACRO_EOA,
- MACRO_IR, MACRO_EXP, MACRO_EOA } },
+ { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
{ "ldq", emit_ir_load, "ldq",
- { MACRO_IR, MACRO_EXP, MACRO_PIR, MACRO_EOA,
- MACRO_IR, MACRO_EXP, MACRO_EOA } },
+ { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
{ "ldq_l", emit_ir_load, "ldq_l",
- { MACRO_IR, MACRO_EXP, MACRO_PIR, MACRO_EOA,
- MACRO_IR, MACRO_EXP, MACRO_EOA } },
+ { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
{ "ldq_u", emit_ir_load, "ldq_u",
- { MACRO_IR, MACRO_EXP, MACRO_PIR, MACRO_EOA,
- MACRO_IR, MACRO_EXP, MACRO_EOA } },
+ { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
{ "ldf", emit_loadstore, "ldf",
- { MACRO_FPR, MACRO_EXP, MACRO_PIR, MACRO_EOA,
- MACRO_FPR, MACRO_EXP, MACRO_EOA } },
+ { MACRO_FPR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
{ "ldg", emit_loadstore, "ldg",
- { MACRO_FPR, MACRO_EXP, MACRO_PIR, MACRO_EOA,
- MACRO_FPR, MACRO_EXP, MACRO_EOA } },
+ { MACRO_FPR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
{ "lds", emit_loadstore, "lds",
- { MACRO_FPR, MACRO_EXP, MACRO_PIR, MACRO_EOA,
- MACRO_FPR, MACRO_EXP, MACRO_EOA } },
+ { MACRO_FPR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
{ "ldt", emit_loadstore, "ldt",
- { MACRO_FPR, MACRO_EXP, MACRO_PIR, MACRO_EOA,
- MACRO_FPR, MACRO_EXP, MACRO_EOA } },
-
- { "ldb", emit_ldX, (PTR)0,
- { MACRO_IR, MACRO_EXP, MACRO_PIR, MACRO_EOA,
- MACRO_IR, MACRO_EXP, MACRO_EOA } },
- { "ldbu", emit_ldXu, (PTR)0,
- { MACRO_IR, MACRO_EXP, MACRO_PIR, MACRO_EOA,
- MACRO_IR, MACRO_EXP, MACRO_EOA } },
- { "ldw", emit_ldX, (PTR)1,
- { MACRO_IR, MACRO_EXP, MACRO_PIR, MACRO_EOA,
- MACRO_IR, MACRO_EXP, MACRO_EOA } },
- { "ldwu", emit_ldXu, (PTR)1,
- { MACRO_IR, MACRO_EXP, MACRO_PIR, MACRO_EOA,
- MACRO_IR, MACRO_EXP, MACRO_EOA } },
-
- { "uldw", emit_uldX, (PTR)1,
- { MACRO_IR, MACRO_EXP, MACRO_PIR, MACRO_EOA,
- MACRO_IR, MACRO_EXP, MACRO_EOA } },
- { "uldwu", emit_uldXu, (PTR)1,
- { MACRO_IR, MACRO_EXP, MACRO_PIR, MACRO_EOA,
- MACRO_IR, MACRO_EXP, MACRO_EOA } },
- { "uldl", emit_uldX, (PTR)2,
- { MACRO_IR, MACRO_EXP, MACRO_PIR, MACRO_EOA,
- MACRO_IR, MACRO_EXP, MACRO_EOA } },
- { "uldlu", emit_uldXu, (PTR)2,
- { MACRO_IR, MACRO_EXP, MACRO_PIR, MACRO_EOA,
- MACRO_IR, MACRO_EXP, MACRO_EOA } },
- { "uldq", emit_uldXu, (PTR)3,
- { MACRO_IR, MACRO_EXP, MACRO_PIR, MACRO_EOA,
- MACRO_IR, MACRO_EXP, MACRO_EOA } },
+ { MACRO_FPR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
+
+ { "ldb", emit_ldX, (PTR) 0,
+ { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
+ { "ldbu", emit_ldXu, (PTR) 0,
+ { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
+ { "ldw", emit_ldX, (PTR) 1,
+ { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
+ { "ldwu", emit_ldXu, (PTR) 1,
+ { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
+
+ { "uldw", emit_uldX, (PTR) 1,
+ { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
+ { "uldwu", emit_uldXu, (PTR) 1,
+ { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
+ { "uldl", emit_uldX, (PTR) 2,
+ { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
+ { "uldlu", emit_uldXu, (PTR) 2,
+ { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
+ { "uldq", emit_uldXu, (PTR) 3,
+ { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
{ "ldgp", emit_ldgp, NULL,
{ MACRO_IR, MACRO_EXP, MACRO_PIR, MACRO_EOA } },
#endif
{ "stl", emit_loadstore, "stl",
- { MACRO_IR, MACRO_EXP, MACRO_PIR, MACRO_EOA,
- MACRO_IR, MACRO_EXP, MACRO_EOA } },
+ { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
{ "stl_c", emit_loadstore, "stl_c",
- { MACRO_IR, MACRO_EXP, MACRO_PIR, MACRO_EOA,
- MACRO_IR, MACRO_EXP, MACRO_EOA } },
+ { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
{ "stq", emit_loadstore, "stq",
- { MACRO_IR, MACRO_EXP, MACRO_PIR, MACRO_EOA,
- MACRO_IR, MACRO_EXP, MACRO_EOA } },
+ { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
{ "stq_c", emit_loadstore, "stq_c",
- { MACRO_IR, MACRO_EXP, MACRO_PIR, MACRO_EOA,
- MACRO_IR, MACRO_EXP, MACRO_EOA } },
+ { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
{ "stq_u", emit_loadstore, "stq_u",
- { MACRO_IR, MACRO_EXP, MACRO_PIR, MACRO_EOA,
- MACRO_IR, MACRO_EXP, MACRO_EOA } },
+ { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
{ "stf", emit_loadstore, "stf",
- { MACRO_FPR, MACRO_EXP, MACRO_PIR, MACRO_EOA,
- MACRO_FPR, MACRO_EXP, MACRO_EOA } },
+ { MACRO_FPR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
{ "stg", emit_loadstore, "stg",
- { MACRO_FPR, MACRO_EXP, MACRO_PIR, MACRO_EOA,
- MACRO_FPR, MACRO_EXP, MACRO_EOA } },
+ { MACRO_FPR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
{ "sts", emit_loadstore, "sts",
- { MACRO_FPR, MACRO_EXP, MACRO_PIR, MACRO_EOA,
- MACRO_FPR, MACRO_EXP, MACRO_EOA } },
+ { MACRO_FPR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
{ "stt", emit_loadstore, "stt",
- { MACRO_FPR, MACRO_EXP, MACRO_PIR, MACRO_EOA,
- MACRO_FPR, MACRO_EXP, MACRO_EOA } },
-
- { "stb", emit_stX, (PTR)0,
- { MACRO_IR, MACRO_EXP, MACRO_PIR, MACRO_EOA,
- MACRO_IR, MACRO_EXP, MACRO_EOA } },
- { "stw", emit_stX, (PTR)1,
- { MACRO_IR, MACRO_EXP, MACRO_PIR, MACRO_EOA,
- MACRO_IR, MACRO_EXP, MACRO_EOA } },
- { "ustw", emit_ustX, (PTR)1,
- { MACRO_IR, MACRO_EXP, MACRO_PIR, MACRO_EOA,
- MACRO_IR, MACRO_EXP, MACRO_EOA } },
- { "ustl", emit_ustX, (PTR)2,
- { MACRO_IR, MACRO_EXP, MACRO_PIR, MACRO_EOA,
- MACRO_IR, MACRO_EXP, MACRO_EOA } },
- { "ustq", emit_ustX, (PTR)3,
- { MACRO_IR, MACRO_EXP, MACRO_PIR, MACRO_EOA,
- MACRO_IR, MACRO_EXP, MACRO_EOA } },
+ { MACRO_FPR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
+
+ { "stb", emit_stX, (PTR) 0,
+ { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
+ { "stw", emit_stX, (PTR) 1,
+ { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
+ { "ustw", emit_ustX, (PTR) 1,
+ { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
+ { "ustl", emit_ustX, (PTR) 2,
+ { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
+ { "ustq", emit_ustX, (PTR) 3,
+ { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
/* Arithmetic macros */
#if 0
{ "absq" emit_absq, 2, { EXP, IR } },
#endif
- { "sextb", emit_sextX, (PTR)0,
+ { "sextb", emit_sextX, (PTR) 0,
{ MACRO_IR, MACRO_IR, MACRO_EOA,
MACRO_IR, MACRO_EOA,
/* MACRO_EXP, MACRO_IR, MACRO_EOA */ } },
- { "sextw", emit_sextX, (PTR)1,
+ { "sextw", emit_sextX, (PTR) 1,
{ MACRO_IR, MACRO_IR, MACRO_EOA,
MACRO_IR, MACRO_EOA,
/* MACRO_EXP, MACRO_IR, MACRO_EOA */ } },
{ "jsr", emit_jsrjmp, "jsr",
{ MACRO_PIR, MACRO_EXP, MACRO_EOA,
MACRO_PIR, MACRO_EOA,
- MACRO_IR, MACRO_EXP, MACRO_EOA,
+ MACRO_IR, MACRO_EXP, MACRO_EOA,
MACRO_EXP, MACRO_EOA } },
{ "jmp", emit_jsrjmp, "jmp",
{ MACRO_PIR, MACRO_EXP, MACRO_EOA,
MACRO_PIR, MACRO_EOA,
- MACRO_IR, MACRO_EXP, MACRO_EOA,
+ MACRO_IR, MACRO_EXP, MACRO_EOA,
MACRO_EXP, MACRO_EOA } },
{ "ret", emit_retjcr, "ret",
{ MACRO_IR, MACRO_EXP, MACRO_EOA,
};
static const unsigned int alpha_num_macros
- = sizeof(alpha_macros) / sizeof(*alpha_macros);
+ = sizeof (alpha_macros) / sizeof (*alpha_macros);
\f
/* Public interface functions */
/* Create the opcode hash table */
alpha_opcode_hash = hash_new ();
- for (i = 0; i < alpha_num_opcodes; )
+ for (i = 0; i < alpha_num_opcodes;)
{
const char *name, *retval, *slash;
name = alpha_opcodes[i].name;
- retval = hash_insert (alpha_opcode_hash, name, (PTR)&alpha_opcodes[i]);
+ retval = hash_insert (alpha_opcode_hash, name, (PTR) &alpha_opcodes[i]);
if (retval)
- as_fatal (_("internal error: can't hash opcode `%s': %s"), name, retval);
+ as_fatal (_("internal error: can't hash opcode `%s': %s"),
+ name, retval);
/* Some opcodes include modifiers of various sorts with a "/mod"
syntax, like the architecture manual suggests. However, for
memcpy (p, name, slash - name);
strcpy (p + (slash - name), slash + 1);
- (void)hash_insert(alpha_opcode_hash, p, (PTR)&alpha_opcodes[i]);
+ (void) hash_insert (alpha_opcode_hash, p, (PTR) &alpha_opcodes[i]);
/* Ignore failures -- the opcode table does duplicate some
variants in different forms, like "hw_stq" and "hw_st/q". */
}
/* Create the macro hash table */
alpha_macro_hash = hash_new ();
- for (i = 0; i < alpha_num_macros; )
+ for (i = 0; i < alpha_num_macros;)
{
const char *name, *retval;
name = alpha_macros[i].name;
- retval = hash_insert (alpha_macro_hash, name, (PTR)&alpha_macros[i]);
+ retval = hash_insert (alpha_macro_hash, name, (PTR) &alpha_macros[i]);
if (retval)
- as_fatal (_("internal error: can't hash macro `%s': %s"), name, retval);
+ as_fatal (_("internal error: can't hash macro `%s': %s"),
+ name, retval);
while (++i < alpha_num_macros
&& (alpha_macros[i].name == name
for (i = 0; i < 32; ++i)
{
char name[4];
- sprintf(name, "$%d", i);
- alpha_register_table[i] = symbol_create(name, reg_section, i,
- &zero_address_frag);
+ sprintf (name, "$%d", i);
+ alpha_register_table[i] = symbol_create (name, reg_section, i,
+ &zero_address_frag);
}
for (; i < 64; ++i)
{
char name[5];
- sprintf(name, "$f%d", i-32);
- alpha_register_table[i] = symbol_create(name, reg_section, i,
- &zero_address_frag);
+ sprintf (name, "$f%d", i - 32);
+ alpha_register_table[i] = symbol_create (name, reg_section, i,
+ &zero_address_frag);
}
/* Create the special symbols and sections we'll be using */
#ifdef OBJ_ELF
if (ECOFF_DEBUGGING)
{
- segT sec = subseg_new(".mdebug", (subsegT)0);
- bfd_set_section_flags(stdoutput, sec, SEC_HAS_CONTENTS|SEC_READONLY);
- bfd_set_section_alignment(stdoutput, sec, 3);
+ segT sec = subseg_new (".mdebug", (subsegT) 0);
+ bfd_set_section_flags (stdoutput, sec, SEC_HAS_CONTENTS | SEC_READONLY);
+ bfd_set_section_alignment (stdoutput, sec, 3);
}
#endif /* OBJ_ELF */
- subseg_set(text_section, 0);
+ /* Create literal lookup hash table. */
+ alpha_literal_hash = hash_new ();
+
+ subseg_set (text_section, 0);
}
/* The public interface to the instruction assembler. */
size_t opnamelen;
/* split off the opcode */
- opnamelen = strspn (str, "abcdefghijklmnopqrstuvwxyz_/468");
+ opnamelen = strspn (str, "abcdefghijklmnopqrstuvwxyz_/46819");
trunclen = (opnamelen < sizeof (opname) - 1
? opnamelen
: sizeof (opname) - 1);
/* tokenize the rest of the line */
if ((ntok = tokenize_arguments (str + opnamelen, tok, MAX_INSN_ARGS)) < 0)
{
- as_bad (_("syntax error"));
+ if (ntok != TOKENIZE_ERROR_REPORT)
+ as_bad (_("syntax error"));
+
return;
}
segT seg;
valueT size;
{
- int align = bfd_get_section_alignment(stdoutput, seg);
- valueT mask = ((valueT)1 << align) - 1;
+ int align = bfd_get_section_alignment (stdoutput, seg);
+ valueT mask = ((valueT) 1 << align) - 1;
return (size + mask) & ~mask;
}
/* Turn a string in input_line_pointer into a floating point constant
- of type type, and store the appropriate bytes in *litP. The number
- of LITTLENUMS emitted is stored in *sizeP. An error message is
+ of type TYPE, and store the appropriate bytes in *LITP. The number
+ of LITTLENUMS emitted is stored in *SIZEP. An error message is
returned, or NULL on OK. */
/* Equal to MAX_PRECISION in atof-ieee.c */
break;
case 'G':
- g_switch_value = atoi(arg);
+ g_switch_value = atoi (arg);
break;
case 'm':
{
const struct cpu_type *p;
for (p = cpu_types; p->name; ++p)
- if (strcmp(arg, p->name) == 0)
+ if (strcmp (arg, p->name) == 0)
{
alpha_target_name = p->name, alpha_target = p->flags;
goto found;
}
- as_warn(_("Unknown CPU identifier `%s'"), arg);
+ as_warn (_("Unknown CPU identifier `%s'"), arg);
found:;
}
break;
#ifdef OBJ_EVAX
- case '+': /* For g++. Hash any name > 63 chars long. */
+ case '+': /* For g++. Hash any name > 63 chars long. */
alpha_flag_hash_long_names = 1;
break;
md_show_usage (stream)
FILE *stream;
{
- fputs(_("\
+ fputs (_("\
Alpha options:\n\
-32addr treat addresses as 32-bit values\n\
-F lack floating point instructions support\n\
the distance to the "lda" instruction for setting the addend to
GPDISP. */
-int
-md_apply_fix (fixP, valueP)
+void
+md_apply_fix3 (fixP, valP, seg)
fixS *fixP;
- valueT *valueP;
+ valueT * valP;
+ segT seg;
{
char * const fixpos = fixP->fx_frag->fr_literal + fixP->fx_where;
- valueT value = *valueP;
+ valueT value = * valP;
unsigned image, size;
switch (fixP->fx_r_type)
case BFD_RELOC_ALPHA_GPDISP_HI16:
{
fixS *next = fixP->fx_next;
- assert (next->fx_r_type == BFD_RELOC_ALPHA_GPDISP_LO16);
- fixP->fx_offset = (next->fx_frag->fr_address + next->fx_where
- - fixP->fx_frag->fr_address - fixP->fx_where);
+ /* With user-specified !gpdisp relocations, we can be missing
+ the matching LO16 reloc. We will have already issued an
+ error message. */
+ if (next)
+ fixP->fx_offset = (next->fx_frag->fr_address + next->fx_where
+ - fixP->fx_frag->fr_address - fixP->fx_where);
value = (value - sign_extend_16 (value)) >> 16;
}
#endif
do_reloc_gp:
- fixP->fx_addsy = section_symbol (now_seg);
+ fixP->fx_addsy = section_symbol (seg);
md_number_to_chars (fixpos, value, 2);
break;
md_number_to_chars (fixpos, value, size);
goto done;
}
- return 1;
+ return;
#ifdef OBJ_ECOFF
case BFD_RELOC_GPREL32:
/* FIXME: inherited this obliviousness of `value' -- why? */
md_number_to_chars (fixpos, -alpha_gp_value, 4);
break;
-#endif
-#ifdef OBJ_ELF
+#else
case BFD_RELOC_GPREL32:
- return 1;
#endif
+ case BFD_RELOC_GPREL16:
+ case BFD_RELOC_ALPHA_GPREL_HI16:
+ case BFD_RELOC_ALPHA_GPREL_LO16:
+ return;
case BFD_RELOC_23_PCREL_S2:
if (fixP->fx_pcrel == 0 && fixP->fx_addsy == 0)
{
- image = bfd_getl32(fixpos);
+ image = bfd_getl32 (fixpos);
image = (image & ~0x1FFFFF) | ((value >> 2) & 0x1FFFFF);
goto write_done;
}
- return 1;
+ return;
case BFD_RELOC_ALPHA_HINT:
if (fixP->fx_pcrel == 0 && fixP->fx_addsy == 0)
{
- image = bfd_getl32(fixpos);
+ image = bfd_getl32 (fixpos);
image = (image & ~0x3FFF) | ((value >> 2) & 0x3FFF);
goto write_done;
}
- return 1;
+ return;
+
+#ifdef OBJ_ELF
+ case BFD_RELOC_ALPHA_BRSGP:
+ case BFD_RELOC_ALPHA_TLSGD:
+ case BFD_RELOC_ALPHA_TLSLDM:
+ case BFD_RELOC_ALPHA_GOTDTPREL16:
+ case BFD_RELOC_ALPHA_DTPREL_HI16:
+ case BFD_RELOC_ALPHA_DTPREL_LO16:
+ case BFD_RELOC_ALPHA_DTPREL16:
+ case BFD_RELOC_ALPHA_GOTTPREL16:
+ case BFD_RELOC_ALPHA_TPREL_HI16:
+ case BFD_RELOC_ALPHA_TPREL_LO16:
+ case BFD_RELOC_ALPHA_TPREL16:
+ return;
+#endif
#ifdef OBJ_ECOFF
case BFD_RELOC_ALPHA_LITERAL:
md_number_to_chars (fixpos, value, 2);
- return 1;
-
- case BFD_RELOC_ALPHA_LITUSE:
- return 1;
+ return;
#endif
-#ifdef OBJ_ELF
case BFD_RELOC_ALPHA_ELF_LITERAL:
case BFD_RELOC_ALPHA_LITUSE:
- return 1;
-#endif
-#ifdef OBJ_EVAX
case BFD_RELOC_ALPHA_LINKAGE:
case BFD_RELOC_ALPHA_CODEADDR:
- return 1;
-#endif
+ return;
+
+ case BFD_RELOC_VTABLE_INHERIT:
+ case BFD_RELOC_VTABLE_ENTRY:
+ return;
default:
{
const struct alpha_operand *operand;
- if ((int)fixP->fx_r_type >= 0)
+ if ((int) fixP->fx_r_type >= 0)
as_fatal (_("unhandled relocation type %s"),
bfd_get_reloc_code_name (fixP->fx_r_type));
- assert (-(int)fixP->fx_r_type < (int)alpha_num_operands);
- operand = &alpha_operands[-(int)fixP->fx_r_type];
+ assert (-(int) fixP->fx_r_type < (int) alpha_num_operands);
+ operand = &alpha_operands[-(int) fixP->fx_r_type];
/* The rest of these fixups only exist internally during symbol
resolution and have no representation in the object file.
as_bad_where (fixP->fx_file, fixP->fx_line,
_("non-absolute expression in constant field"));
- image = bfd_getl32(fixpos);
- image = insert_operand(image, operand, (offsetT)value,
- fixP->fx_file, fixP->fx_line);
+ image = bfd_getl32 (fixpos);
+ image = insert_operand (image, operand, (offsetT) value,
+ fixP->fx_file, fixP->fx_line);
}
goto write_done;
}
if (fixP->fx_addsy != 0 || fixP->fx_pcrel != 0)
- return 1;
+ return;
else
{
- as_warn_where(fixP->fx_file, fixP->fx_line,
- _("type %d reloc done?\n"), (int)fixP->fx_r_type);
+ as_warn_where (fixP->fx_file, fixP->fx_line,
+ _("type %d reloc done?\n"), (int) fixP->fx_r_type);
goto done;
}
write_done:
- md_number_to_chars(fixpos, image, 4);
+ md_number_to_chars (fixpos, image, 4);
done:
fixP->fx_done = 1;
- return 0;
}
-/*
- * Look for a register name in the given symbol.
- */
+/* Look for a register name in the given symbol. */
symbolS *
-md_undefined_symbol(name)
+md_undefined_symbol (name)
char *name;
{
if (*name == '$')
/* FALLTHRU */
case 'r':
- if (!isdigit(*++name))
+ if (!ISDIGIT (*++name))
break;
/* FALLTHRU */
case '5': case '6': case '7': case '8': case '9':
if (name[1] == '\0')
num = name[0] - '0';
- else if (name[0] != '0' && isdigit(name[1]) && name[2] == '\0')
+ else if (name[0] != '0' && ISDIGIT (name[1]) && name[2] == '\0')
{
num = (name[0] - '0') * 10 + name[1] - '0';
if (num >= 32)
else
break;
- if (!alpha_noat_on && num == AXP_REG_AT)
- as_warn(_("Used $at without \".set noat\""));
+ if (!alpha_noat_on && (num + is_float) == AXP_REG_AT)
+ as_warn (_("Used $at without \".set noat\""));
return alpha_register_table[num + is_float];
case 'a':
if (name[1] == 't' && name[2] == '\0')
{
if (!alpha_noat_on)
- as_warn(_("Used $at without \".set noat\""));
+ as_warn (_("Used $at without \".set noat\""));
return alpha_register_table[AXP_REG_AT];
}
break;
alpha_insn_label = sym;
}
+/* If we have a BRSGP reloc to a local symbol, adjust it to BRADDR and
+ let it get resolved at assembly time. */
+
+void
+alpha_validate_fix (f)
+ fixS *f;
+{
+#ifdef OBJ_ELF
+ int offset = 0;
+ const char *name;
+
+ if (f->fx_r_type != BFD_RELOC_ALPHA_BRSGP)
+ return;
+
+ if (! S_IS_DEFINED (f->fx_addsy))
+ return;
+
+ switch (S_GET_OTHER (f->fx_addsy) & STO_ALPHA_STD_GPLOAD)
+ {
+ case STO_ALPHA_NOPV:
+ break;
+ case STO_ALPHA_STD_GPLOAD:
+ offset = 8;
+ break;
+ default:
+ if (S_IS_LOCAL (f->fx_addsy))
+ name = "<local>";
+ else
+ name = S_GET_NAME (f->fx_addsy);
+ as_bad_where (f->fx_file, f->fx_line,
+ _("!samegp reloc against symbol without .prologue: %s"),
+ name);
+ break;
+ }
+
+ if (! (S_IS_EXTERN (f->fx_addsy) || S_IS_WEAK (f->fx_addsy)))
+ {
+ f->fx_r_type = BFD_RELOC_23_PCREL_S2;
+ f->fx_offset += offset;
+ }
+#endif
+}
+
/* Return true if we must always emit a reloc for a type and false if
- there is some hope of resolving it a assembly time. */
+ there is some hope of resolving it at assembly time. */
int
alpha_force_relocation (f)
case BFD_RELOC_ALPHA_GPDISP_HI16:
case BFD_RELOC_ALPHA_GPDISP_LO16:
case BFD_RELOC_ALPHA_GPDISP:
-#ifdef OBJ_ECOFF
case BFD_RELOC_ALPHA_LITERAL:
-#endif
-#ifdef OBJ_ELF
case BFD_RELOC_ALPHA_ELF_LITERAL:
-#endif
case BFD_RELOC_ALPHA_LITUSE:
+ case BFD_RELOC_GPREL16:
case BFD_RELOC_GPREL32:
-#ifdef OBJ_EVAX
+ case BFD_RELOC_ALPHA_GPREL_HI16:
+ case BFD_RELOC_ALPHA_GPREL_LO16:
case BFD_RELOC_ALPHA_LINKAGE:
case BFD_RELOC_ALPHA_CODEADDR:
-#endif
+ case BFD_RELOC_ALPHA_BRSGP:
+ case BFD_RELOC_VTABLE_INHERIT:
+ case BFD_RELOC_VTABLE_ENTRY:
+ case BFD_RELOC_ALPHA_TLSGD:
+ case BFD_RELOC_ALPHA_TLSLDM:
+ case BFD_RELOC_ALPHA_GOTDTPREL16:
+ case BFD_RELOC_ALPHA_DTPREL_HI16:
+ case BFD_RELOC_ALPHA_DTPREL_LO16:
+ case BFD_RELOC_ALPHA_DTPREL16:
+ case BFD_RELOC_ALPHA_GOTTPREL16:
+ case BFD_RELOC_ALPHA_TPREL_HI16:
+ case BFD_RELOC_ALPHA_TPREL_LO16:
+ case BFD_RELOC_ALPHA_TPREL16:
return 1;
case BFD_RELOC_23_PCREL_S2:
return 0;
default:
- assert((int)f->fx_r_type < 0 && -(int)f->fx_r_type < (int)alpha_num_operands);
return 0;
}
}
case BFD_RELOC_ALPHA_GPDISP_HI16:
case BFD_RELOC_ALPHA_GPDISP_LO16:
case BFD_RELOC_ALPHA_GPDISP:
+ case BFD_RELOC_ALPHA_BRSGP:
return 0;
-#ifdef OBJ_ECOFF
case BFD_RELOC_ALPHA_LITERAL:
-#endif
-#ifdef OBJ_ELF
case BFD_RELOC_ALPHA_ELF_LITERAL:
-#endif
-#ifdef OBJ_EVAX
+ case BFD_RELOC_ALPHA_LITUSE:
case BFD_RELOC_ALPHA_LINKAGE:
case BFD_RELOC_ALPHA_CODEADDR:
-#endif
return 1;
- case BFD_RELOC_ALPHA_LITUSE:
+ case BFD_RELOC_VTABLE_ENTRY:
+ case BFD_RELOC_VTABLE_INHERIT:
return 0;
+ case BFD_RELOC_GPREL16:
case BFD_RELOC_GPREL32:
+ case BFD_RELOC_ALPHA_GPREL_HI16:
+ case BFD_RELOC_ALPHA_GPREL_LO16:
case BFD_RELOC_23_PCREL_S2:
case BFD_RELOC_32:
case BFD_RELOC_64:
case BFD_RELOC_ALPHA_HINT:
return 1;
+ case BFD_RELOC_ALPHA_TLSGD:
+ case BFD_RELOC_ALPHA_TLSLDM:
+ case BFD_RELOC_ALPHA_GOTDTPREL16:
+ case BFD_RELOC_ALPHA_DTPREL_HI16:
+ case BFD_RELOC_ALPHA_DTPREL_LO16:
+ case BFD_RELOC_ALPHA_DTPREL16:
+ case BFD_RELOC_ALPHA_GOTTPREL16:
+ case BFD_RELOC_ALPHA_TPREL_HI16:
+ case BFD_RELOC_ALPHA_TPREL_LO16:
+ case BFD_RELOC_ALPHA_TPREL16:
+ /* ??? No idea why we can't return a reference to .tbss+10, but
+ we're preventing this in the other assemblers. Follow for now. */
+ return 0;
+
default:
- assert ((int)f->fx_r_type < 0
- && - (int)f->fx_r_type < (int)alpha_num_operands);
return 1;
}
/*NOTREACHED*/
/* Make sure none of our internal relocations make it this far.
They'd better have been fully resolved by this point. */
- assert ((int)fixp->fx_r_type > 0);
+ assert ((int) fixp->fx_r_type > 0);
reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type);
if (reloc->howto == NULL)
* at assembly time. bfd_perform_reloc doesn't know about this sort
* of thing, and as a result we need to fake it out here.
*/
- if ((S_IS_EXTERN (fixp->fx_addsy) || S_IS_WEAK (fixp->fx_addsy))
- && !S_IS_COMMON(fixp->fx_addsy))
+ if ((S_IS_EXTERN (fixp->fx_addsy) || S_IS_WEAK (fixp->fx_addsy)
+ || (S_GET_SEGMENT (fixp->fx_addsy)->flags & SEC_MERGE)
+ || (S_GET_SEGMENT (fixp->fx_addsy)->flags & SEC_THREAD_LOCAL))
+ && !S_IS_COMMON (fixp->fx_addsy))
reloc->addend -= symbol_get_bfdsym (fixp->fx_addsy)->value;
#endif
}
char c = get_symbol_end ();
symbolS *sym = md_undefined_symbol (s);
- *strchr(s, '\0') = c;
+ *strchr (s, '\0') = c;
if (sym && (framereg = S_GET_VALUE (sym)) <= 31)
goto found;
}
#endif /* OBJ_ECOFF */
\f
+static struct alpha_reloc_tag *
+get_alpha_reloc_tag (sequence)
+ long sequence;
+{
+ char buffer[ALPHA_RELOC_DIGITS];
+ struct alpha_reloc_tag *info;
+
+ sprintf (buffer, "!%ld", sequence);
+
+ info = (struct alpha_reloc_tag *) hash_find (alpha_literal_hash, buffer);
+ if (! info)
+ {
+ size_t len = strlen (buffer);
+ const char *errmsg;
+
+ info = (struct alpha_reloc_tag *)
+ xcalloc (sizeof (struct alpha_reloc_tag) + len, 1);
+
+ info->segment = now_seg;
+ info->sequence = sequence;
+ strcpy (info->string, buffer);
+ errmsg = hash_insert (alpha_literal_hash, info->string, (PTR) info);
+ if (errmsg)
+ as_fatal (errmsg);
+ }
+
+ return info;
+}
+
+/* Before the relocations are written, reorder them, so that user
+ supplied !lituse relocations follow the appropriate !literal
+ relocations, and similarly for !gpdisp relocations. */
+
+void
+alpha_adjust_symtab ()
+{
+ if (alpha_literal_hash)
+ bfd_map_over_sections (stdoutput, alpha_adjust_symtab_relocs, NULL);
+}
+
+static void
+alpha_adjust_symtab_relocs (abfd, sec, ptr)
+ bfd *abfd ATTRIBUTE_UNUSED;
+ asection *sec;
+ PTR ptr ATTRIBUTE_UNUSED;
+{
+ segment_info_type *seginfo = seg_info (sec);
+ fixS **prevP;
+ fixS *fixp;
+ fixS *next;
+ fixS *slave;
+
+ /* If seginfo is NULL, we did not create this section; don't do
+ anything with it. By using a pointer to a pointer, we can update
+ the links in place. */
+ if (seginfo == NULL)
+ return;
+
+ /* If there are no relocations, skip the section. */
+ if (! seginfo->fix_root)
+ return;
+
+ /* First rebuild the fixup chain without the expicit lituse and
+ gpdisp_lo16 relocs. */
+ prevP = &seginfo->fix_root;
+ for (fixp = seginfo->fix_root; fixp; fixp = next)
+ {
+ next = fixp->fx_next;
+ fixp->fx_next = (fixS *) 0;
+
+ switch (fixp->fx_r_type)
+ {
+ case BFD_RELOC_ALPHA_LITUSE:
+ if (fixp->tc_fix_data.info->n_master == 0)
+ as_bad_where (fixp->fx_file, fixp->fx_line,
+ _("No !literal!%ld was found"),
+ fixp->tc_fix_data.info->sequence);
+ if (fixp->fx_offset == LITUSE_TLSGD)
+ {
+ if (! fixp->tc_fix_data.info->saw_tlsgd)
+ as_bad_where (fixp->fx_file, fixp->fx_line,
+ _("No !tlsgd!%ld was found"),
+ fixp->tc_fix_data.info->sequence);
+ }
+ else if (fixp->fx_offset == LITUSE_TLSLDM)
+ {
+ if (! fixp->tc_fix_data.info->saw_tlsldm)
+ as_bad_where (fixp->fx_file, fixp->fx_line,
+ _("No !tlsldm!%ld was found"),
+ fixp->tc_fix_data.info->sequence);
+ }
+ break;
+
+ case BFD_RELOC_ALPHA_GPDISP_LO16:
+ if (fixp->tc_fix_data.info->n_master == 0)
+ as_bad_where (fixp->fx_file, fixp->fx_line,
+ _("No ldah !gpdisp!%ld was found"),
+ fixp->tc_fix_data.info->sequence);
+ break;
+
+ case BFD_RELOC_ALPHA_ELF_LITERAL:
+ if (fixp->tc_fix_data.info->saw_tlsgd
+ || fixp->tc_fix_data.info->saw_tlsldm)
+ break;
+ /* FALLTHRU */
+
+ default:
+ *prevP = fixp;
+ prevP = &fixp->fx_next;
+ break;
+ }
+ }
+
+ /* Go back and re-chain dependent relocations. They are currently
+ linked through the next_reloc field in reverse order, so as we
+ go through the next_reloc chain, we effectively reverse the chain
+ once again.
+
+ Except if there is more than one !literal for a given sequence
+ number. In that case, the programmer and/or compiler is not sure
+ how control flows from literal to lituse, and we can't be sure to
+ get the relaxation correct.
+
+ ??? Well, actually we could, if there are enough lituses such that
+ we can make each literal have at least one of each lituse type
+ present. Not implemented.
+
+ Also suppress the optimization if the !literals/!lituses are spread
+ in different segments. This can happen with "intersting" uses of
+ inline assembly; examples are present in the Linux kernel semaphores. */
+
+ for (fixp = seginfo->fix_root; fixp; fixp = next)
+ {
+ next = fixp->fx_next;
+ switch (fixp->fx_r_type)
+ {
+ case BFD_RELOC_ALPHA_TLSGD:
+ case BFD_RELOC_ALPHA_TLSLDM:
+ if (!fixp->tc_fix_data.info)
+ break;
+ if (fixp->tc_fix_data.info->n_master == 0)
+ break;
+ else if (fixp->tc_fix_data.info->n_master > 1)
+ {
+ as_bad_where (fixp->fx_file, fixp->fx_line,
+ _("too many !literal!%ld for %s"),
+ fixp->tc_fix_data.info->sequence,
+ (fixp->fx_r_type == BFD_RELOC_ALPHA_TLSGD
+ ? "!tlsgd" : "!tlsldm"));
+ break;
+ }
+
+ fixp->tc_fix_data.info->master->fx_next = fixp->fx_next;
+ fixp->fx_next = fixp->tc_fix_data.info->master;
+ fixp = fixp->fx_next;
+ /* FALLTHRU */
+
+ case BFD_RELOC_ALPHA_ELF_LITERAL:
+ if (fixp->tc_fix_data.info->n_master == 1
+ && ! fixp->tc_fix_data.info->multi_section_p)
+ {
+ for (slave = fixp->tc_fix_data.info->slaves;
+ slave != (fixS *) 0;
+ slave = slave->tc_fix_data.next_reloc)
+ {
+ slave->fx_next = fixp->fx_next;
+ fixp->fx_next = slave;
+ }
+ }
+ break;
+
+ case BFD_RELOC_ALPHA_GPDISP_HI16:
+ if (fixp->tc_fix_data.info->n_slaves == 0)
+ as_bad_where (fixp->fx_file, fixp->fx_line,
+ _("No lda !gpdisp!%ld was found"),
+ fixp->tc_fix_data.info->sequence);
+ else
+ {
+ slave = fixp->tc_fix_data.info->slaves;
+ slave->fx_next = next;
+ fixp->fx_next = slave;
+ }
+ break;
+
+ default:
+ break;
+ }
+ }
+}
+\f
+#ifdef DEBUG_ALPHA
+static void
+debug_exp (tok, ntok)
+ expressionS tok[];
+ int ntok;
+{
+ int i;
+
+ fprintf (stderr, "debug_exp: %d tokens", ntok);
+ for (i = 0; i < ntok; i++)
+ {
+ expressionS *t = &tok[i];
+ const char *name;
+ switch (t->X_op)
+ {
+ default: name = "unknown"; break;
+ case O_illegal: name = "O_illegal"; break;
+ case O_absent: name = "O_absent"; break;
+ case O_constant: name = "O_constant"; break;
+ case O_symbol: name = "O_symbol"; break;
+ case O_symbol_rva: name = "O_symbol_rva"; break;
+ case O_register: name = "O_register"; break;
+ case O_big: name = "O_big"; break;
+ case O_uminus: name = "O_uminus"; break;
+ case O_bit_not: name = "O_bit_not"; break;
+ case O_logical_not: name = "O_logical_not"; break;
+ case O_multiply: name = "O_multiply"; break;
+ case O_divide: name = "O_divide"; break;
+ case O_modulus: name = "O_modulus"; break;
+ case O_left_shift: name = "O_left_shift"; break;
+ case O_right_shift: name = "O_right_shift"; break;
+ case O_bit_inclusive_or: name = "O_bit_inclusive_or"; break;
+ case O_bit_or_not: name = "O_bit_or_not"; break;
+ case O_bit_exclusive_or: name = "O_bit_exclusive_or"; break;
+ case O_bit_and: name = "O_bit_and"; break;
+ case O_add: name = "O_add"; break;
+ case O_subtract: name = "O_subtract"; break;
+ case O_eq: name = "O_eq"; break;
+ case O_ne: name = "O_ne"; break;
+ case O_lt: name = "O_lt"; break;
+ case O_le: name = "O_le"; break;
+ case O_ge: name = "O_ge"; break;
+ case O_gt: name = "O_gt"; break;
+ case O_logical_and: name = "O_logical_and"; break;
+ case O_logical_or: name = "O_logical_or"; break;
+ case O_index: name = "O_index"; break;
+ case O_pregister: name = "O_pregister"; break;
+ case O_cpregister: name = "O_cpregister"; break;
+ case O_literal: name = "O_literal"; break;
+ case O_lituse_addr: name = "O_lituse_addr"; break;
+ case O_lituse_base: name = "O_lituse_base"; break;
+ case O_lituse_bytoff: name = "O_lituse_bytoff"; break;
+ case O_lituse_jsr: name = "O_lituse_jsr"; break;
+ case O_lituse_tlsgd: name = "O_lituse_tlsgd"; break;
+ case O_lituse_tlsldm: name = "O_lituse_tlsldm"; break;
+ case O_gpdisp: name = "O_gpdisp"; break;
+ case O_gprelhigh: name = "O_gprelhigh"; break;
+ case O_gprellow: name = "O_gprellow"; break;
+ case O_gprel: name = "O_gprel"; break;
+ case O_samegp: name = "O_samegp"; break;
+ case O_tlsgd: name = "O_tlsgd"; break;
+ case O_tlsldm: name = "O_tlsldm"; break;
+ case O_gotdtprel: name = "O_gotdtprel"; break;
+ case O_dtprelhi: name = "O_dtprelhi"; break;
+ case O_dtprello: name = "O_dtprello"; break;
+ case O_dtprel: name = "O_dtprel"; break;
+ case O_gottprel: name = "O_gottprel"; break;
+ case O_tprelhi: name = "O_tprelhi"; break;
+ case O_tprello: name = "O_tprello"; break;
+ case O_tprel: name = "O_tprel"; break;
+ }
+
+ fprintf (stderr, ", %s(%s, %s, %d)", name,
+ (t->X_add_symbol) ? S_GET_NAME (t->X_add_symbol) : "--",
+ (t->X_op_symbol) ? S_GET_NAME (t->X_op_symbol) : "--",
+ (int) t->X_add_number);
+ }
+ fprintf (stderr, "\n");
+ fflush (stderr);
+}
+#endif
+
/* Parse the arguments to an opcode. */
static int
expressionS *end_tok = tok + ntok;
char *old_input_line_pointer;
int saw_comma = 0, saw_arg = 0;
+#ifdef DEBUG_ALPHA
+ expressionS *orig_tok = tok;
+#endif
+ char *p;
+ const struct alpha_reloc_op_tag *r;
+ int c, i;
+ size_t len;
+ int reloc_found_p = 0;
memset (tok, 0, sizeof (*tok) * ntok);
old_input_line_pointer = input_line_pointer;
input_line_pointer = str;
+#ifdef RELOC_OP_P
+ /* ??? Wrest control of ! away from the regular expression parser. */
+ is_end_of_line[(unsigned char) '!'] = 1;
+#endif
+
while (tok < end_tok && *input_line_pointer)
{
SKIP_WHITESPACE ();
case '\0':
goto fini;
+#ifdef RELOC_OP_P
+ case '!':
+ /* A relocation operand can be placed after the normal operand on an
+ assembly language statement, and has the following form:
+ !relocation_type!sequence_number. */
+ if (reloc_found_p)
+ { /* only support one relocation op per insn */
+ as_bad (_("More than one relocation op per insn"));
+ goto err_report;
+ }
+
+ if (!saw_arg)
+ goto err;
+
+ ++input_line_pointer;
+ SKIP_WHITESPACE ();
+ p = input_line_pointer;
+ c = get_symbol_end ();
+
+ /* Parse !relocation_type */
+ len = input_line_pointer - p;
+ if (len == 0)
+ {
+ as_bad (_("No relocation operand"));
+ goto err_report;
+ }
+
+ r = &alpha_reloc_op[0];
+ for (i = alpha_num_reloc_op - 1; i >= 0; i--, r++)
+ if (len == r->length && memcmp (p, r->name, len) == 0)
+ break;
+ if (i < 0)
+ {
+ as_bad (_("Unknown relocation operand: !%s"), p);
+ goto err_report;
+ }
+
+ *input_line_pointer = c;
+ SKIP_WHITESPACE ();
+ if (*input_line_pointer != '!')
+ {
+ if (r->require_seq)
+ {
+ as_bad (_("no sequence number after !%s"), p);
+ goto err_report;
+ }
+
+ tok->X_add_number = 0;
+ }
+ else
+ {
+ if (! r->allow_seq)
+ {
+ as_bad (_("!%s does not use a sequence number"), p);
+ goto err_report;
+ }
+
+ input_line_pointer++;
+
+ /* Parse !sequence_number */
+ expression (tok);
+ if (tok->X_op != O_constant || tok->X_add_number <= 0)
+ {
+ as_bad (_("Bad sequence number: !%s!%s"),
+ r->name, input_line_pointer);
+ goto err_report;
+ }
+ }
+
+ tok->X_op = r->op;
+ reloc_found_p = 1;
+ ++tok;
+ break;
+#endif /* RELOC_OP_P */
+
case ',':
++input_line_pointer;
if (saw_comma || !saw_arg)
{
char *hold = input_line_pointer++;
- /* First try for parenthesized register ... */
+ /* First try for parenthesized register ... */
expression (tok);
if (*input_line_pointer == ')' && tok->X_op == O_register)
{
default:
if (saw_arg && !saw_comma)
goto err;
+
expression (tok);
if (tok->X_op == O_illegal || tok->X_op == O_absent)
goto err;
if (saw_comma)
goto err;
input_line_pointer = old_input_line_pointer;
+
+#ifdef DEBUG_ALPHA
+ debug_exp (orig_tok, ntok - (end_tok - tok));
+#endif
+#ifdef RELOC_OP_P
+ is_end_of_line[(unsigned char) '!'] = 0;
+#endif
+
return ntok - (end_tok - tok);
err:
+#ifdef RELOC_OP_P
+ is_end_of_line[(unsigned char) '!'] = 0;
+#endif
input_line_pointer = old_input_line_pointer;
- return -1;
+ return TOKENIZE_ERROR;
+
+err_report:
+#ifdef RELOC_OP_P
+ is_end_of_line[(unsigned char) '!'] = 0;
+#endif
+ input_line_pointer = old_input_line_pointer;
+ return TOKENIZE_ERROR_REPORT;
}
/* Search forward through all variants of an opcode looking for a
syntax match. */
static const struct alpha_opcode *
-find_opcode_match(first_opcode, tok, pntok, pcpumatch)
+find_opcode_match (first_opcode, tok, pntok, pcpumatch)
const struct alpha_opcode *first_opcode;
const expressionS *tok;
int *pntok;
{
case AXP_OPERAND_IR:
if (tok[tokidx].X_op != O_register
- || !is_ir_num(tok[tokidx].X_add_number))
+ || !is_ir_num (tok[tokidx].X_add_number))
goto match_failed;
break;
case AXP_OPERAND_FPR:
if (tok[tokidx].X_op != O_register
- || !is_fpr_num(tok[tokidx].X_add_number))
+ || !is_fpr_num (tok[tokidx].X_add_number))
goto match_failed;
break;
- case AXP_OPERAND_IR|AXP_OPERAND_PARENS:
+ case AXP_OPERAND_IR | AXP_OPERAND_PARENS:
if (tok[tokidx].X_op != O_pregister
- || !is_ir_num(tok[tokidx].X_add_number))
+ || !is_ir_num (tok[tokidx].X_add_number))
goto match_failed;
break;
- case AXP_OPERAND_IR|AXP_OPERAND_PARENS|AXP_OPERAND_COMMA:
+ case AXP_OPERAND_IR | AXP_OPERAND_PARENS | AXP_OPERAND_COMMA:
if (tok[tokidx].X_op != O_cpregister
- || !is_ir_num(tok[tokidx].X_add_number))
+ || !is_ir_num (tok[tokidx].X_add_number))
goto match_failed;
break;
default:
/* everything else should have been fake */
- abort();
+ abort ();
}
++tokidx;
}
match_failed:;
}
- while (++opcode-alpha_opcodes < alpha_num_opcodes
- && !strcmp(opcode->name, first_opcode->name));
+ while (++opcode - alpha_opcodes < alpha_num_opcodes
+ && !strcmp (opcode->name, first_opcode->name));
if (*pcpumatch)
- *pcpumatch = got_cpu_match;
+ *pcpumatch = got_cpu_match;
return NULL;
}
match. */
static const struct alpha_macro *
-find_macro_match(first_macro, tok, pntok)
+find_macro_match (first_macro, tok, pntok)
const struct alpha_macro *first_macro;
const expressionS *tok;
int *pntok;
tokidx = 0;
break;
+ /* index register */
case MACRO_IR:
if (tokidx >= ntok || tok[tokidx].X_op != O_register
- || !is_ir_num(tok[tokidx].X_add_number))
+ || !is_ir_num (tok[tokidx].X_add_number))
goto match_failed;
++tokidx;
break;
+
+ /* parenthesized index register */
case MACRO_PIR:
if (tokidx >= ntok || tok[tokidx].X_op != O_pregister
- || !is_ir_num(tok[tokidx].X_add_number))
+ || !is_ir_num (tok[tokidx].X_add_number))
goto match_failed;
++tokidx;
break;
+
+ /* optional parenthesized index register */
+ case MACRO_OPIR:
+ if (tokidx < ntok && tok[tokidx].X_op == O_pregister
+ && is_ir_num (tok[tokidx].X_add_number))
+ ++tokidx;
+ break;
+
+ /* leading comma with a parenthesized index register */
case MACRO_CPIR:
if (tokidx >= ntok || tok[tokidx].X_op != O_cpregister
- || !is_ir_num(tok[tokidx].X_add_number))
+ || !is_ir_num (tok[tokidx].X_add_number))
goto match_failed;
++tokidx;
break;
+
+ /* floating point register */
case MACRO_FPR:
if (tokidx >= ntok || tok[tokidx].X_op != O_register
- || !is_fpr_num(tok[tokidx].X_add_number))
+ || !is_fpr_num (tok[tokidx].X_add_number))
goto match_failed;
++tokidx;
break;
+ /* normal expression */
case MACRO_EXP:
if (tokidx >= ntok)
goto match_failed;
case O_register:
case O_pregister:
case O_cpregister:
+ case O_literal:
+ case O_lituse_base:
+ case O_lituse_bytoff:
+ case O_lituse_jsr:
+ case O_gpdisp:
+ case O_gprelhigh:
+ case O_gprellow:
+ case O_gprel:
+ case O_samegp:
goto match_failed;
default:
++arg;
}
}
- while (++macro-alpha_macros < alpha_num_macros
- && !strcmp(macro->name, first_macro->name));
+ while (++macro - alpha_macros < alpha_num_macros
+ && !strcmp (macro->name, first_macro->name));
return NULL;
}
/* Insert an operand value into an instruction. */
static unsigned
-insert_operand(insn, operand, val, file, line)
+insert_operand (insn, operand, val, file, line)
unsigned insn;
const struct alpha_operand *operand;
offsetT val;
_("operand out of range (%s not between %d and %d)");
char buf[sizeof (val) * 3 + 2];
- sprint_value(buf, val);
+ sprint_value (buf, val);
if (file)
- as_warn_where(file, line, err, buf, min, max);
+ as_warn_where (file, line, err, buf, min, max);
else
- as_warn(err, buf, min, max);
+ as_warn (err, buf, min, max);
}
}
*/
static void
-assemble_insn(opcode, tok, ntok, insn)
+assemble_insn (opcode, tok, ntok, insn, reloc)
const struct alpha_opcode *opcode;
const expressionS *tok;
int ntok;
struct alpha_insn *insn;
+ bfd_reloc_code_real_type reloc;
{
+ const struct alpha_operand *reloc_operand = NULL;
+ const expressionS *reloc_exp = NULL;
const unsigned char *argidx;
unsigned image;
int tokidx = 0;
for (argidx = opcode->operands; *argidx; ++argidx)
{
const struct alpha_operand *operand = &alpha_operands[*argidx];
- const expressionS *t = (const expressionS *)0;
+ const expressionS *t = (const expressionS *) 0;
if (operand->flags & AXP_OPERAND_FAKE)
{
/* fake operands take no value and generate no fixup */
- image = insert_operand(image, operand, 0, NULL, 0);
+ image = insert_operand (image, operand, 0, NULL, 0);
continue;
}
}
break;
default:
- abort();
+ abort ();
}
}
else
case O_register:
case O_pregister:
case O_cpregister:
- image = insert_operand(image, operand, regno(t->X_add_number),
- NULL, 0);
+ image = insert_operand (image, operand, regno (t->X_add_number),
+ NULL, 0);
break;
case O_constant:
- image = insert_operand(image, operand, t->X_add_number, NULL, 0);
+ image = insert_operand (image, operand, t->X_add_number, NULL, 0);
+ assert (reloc_operand == NULL);
+ reloc_operand = operand;
+ reloc_exp = t;
break;
default:
- {
- struct alpha_fixup *fixup;
+ /* This is only 0 for fields that should contain registers,
+ which means this pattern shouldn't have matched. */
+ if (operand->default_reloc == 0)
+ abort ();
+
+ /* There is one special case for which an insn receives two
+ relocations, and thus the user-supplied reloc does not
+ override the operand reloc. */
+ if (operand->default_reloc == BFD_RELOC_ALPHA_HINT)
+ {
+ struct alpha_fixup *fixup;
- if (insn->nfixups >= MAX_INSN_FIXUPS)
- as_fatal(_("too many fixups"));
+ if (insn->nfixups >= MAX_INSN_FIXUPS)
+ as_fatal (_("too many fixups"));
- fixup = &insn->fixups[insn->nfixups++];
+ fixup = &insn->fixups[insn->nfixups++];
+ fixup->exp = *t;
+ fixup->reloc = BFD_RELOC_ALPHA_HINT;
+ }
+ else
+ {
+ if (reloc == BFD_RELOC_UNUSED)
+ reloc = operand->default_reloc;
- fixup->exp = *t;
- fixup->reloc = operand->default_reloc;
- }
+ assert (reloc_operand == NULL);
+ reloc_operand = operand;
+ reloc_exp = t;
+ }
break;
}
}
+ if (reloc != BFD_RELOC_UNUSED)
+ {
+ struct alpha_fixup *fixup;
+
+ if (insn->nfixups >= MAX_INSN_FIXUPS)
+ as_fatal (_("too many fixups"));
+
+ /* ??? My but this is hacky. But the OSF/1 assembler uses the same
+ relocation tag for both ldah and lda with gpdisp. Choose the
+ correct internal relocation based on the opcode. */
+ if (reloc == BFD_RELOC_ALPHA_GPDISP)
+ {
+ if (strcmp (opcode->name, "ldah") == 0)
+ reloc = BFD_RELOC_ALPHA_GPDISP_HI16;
+ else if (strcmp (opcode->name, "lda") == 0)
+ reloc = BFD_RELOC_ALPHA_GPDISP_LO16;
+ else
+ as_bad (_("invalid relocation for instruction"));
+ }
+
+ /* If this is a real relocation (as opposed to a lituse hint), then
+ the relocation width should match the operand width. */
+ else if (reloc < BFD_RELOC_UNUSED)
+ {
+ reloc_howto_type *reloc_howto
+ = bfd_reloc_type_lookup (stdoutput, reloc);
+ if (reloc_howto->bitsize != reloc_operand->bits)
+ {
+ as_bad (_("invalid relocation for field"));
+ return;
+ }
+ }
+
+ fixup = &insn->fixups[insn->nfixups++];
+ if (reloc_exp)
+ fixup->exp = *reloc_exp;
+ else
+ fixup->exp.X_op = O_absent;
+ fixup->reloc = reloc;
+ }
+
insn->insn = image;
}
static void
emit_insn (insn)
- struct alpha_insn *insn;
+ struct alpha_insn *insn;
{
char *f;
int i;
- /* Take care of alignment duties */
+ /* Take care of alignment duties. */
if (alpha_auto_align_on && alpha_current_align < 2)
alpha_align (2, (char *) NULL, alpha_insn_label, 0);
if (alpha_current_align > 2)
f = frag_more (4);
md_number_to_chars (f, insn->insn, 4);
+#ifdef OBJ_ELF
+ dwarf2_emit_insn (4);
+#endif
+
/* Apply the fixups in order */
for (i = 0; i < insn->nfixups; ++i)
{
- const struct alpha_operand *operand = (const struct alpha_operand *)0;
+ const struct alpha_operand *operand = (const struct alpha_operand *) 0;
struct alpha_fixup *fixup = &insn->fixups[i];
+ struct alpha_reloc_tag *info = NULL;
int size, pcrel;
fixS *fixP;
/* Some fixups are only used internally and so have no howto */
- if ((int)fixup->reloc < 0)
+ if ((int) fixup->reloc < 0)
{
- operand = &alpha_operands[-(int)fixup->reloc];
+ operand = &alpha_operands[-(int) fixup->reloc];
size = 4;
pcrel = ((operand->flags & AXP_OPERAND_RELATIVE) != 0);
}
-#ifdef OBJ_ELF
- /* These relocation types are only used internally. */
- else if (fixup->reloc == BFD_RELOC_ALPHA_GPDISP_HI16
+ else if (fixup->reloc > BFD_RELOC_UNUSED
+ || fixup->reloc == BFD_RELOC_ALPHA_GPDISP_HI16
|| fixup->reloc == BFD_RELOC_ALPHA_GPDISP_LO16)
{
- size = 2, pcrel = 0;
+ size = 2;
+ pcrel = 0;
}
-#endif
else
{
reloc_howto_type *reloc_howto
assert (reloc_howto);
size = bfd_get_reloc_size (reloc_howto);
+ assert (size >= 1 && size <= 4);
+
pcrel = reloc_howto->pc_relative;
}
- assert (size >= 1 && size <= 4);
fixP = fix_new_exp (frag_now, f - frag_now->fr_literal, size,
&fixup->exp, pcrel, fixup->reloc);
- /* Turn off complaints that the addend is too large for some fixups */
+ /* Turn off complaints that the addend is too large for some fixups,
+ and copy in the sequence number for the explicit relocations. */
switch (fixup->reloc)
{
+ case BFD_RELOC_ALPHA_HINT:
+ case BFD_RELOC_GPREL32:
+ case BFD_RELOC_GPREL16:
+ case BFD_RELOC_ALPHA_GPREL_HI16:
+ case BFD_RELOC_ALPHA_GPREL_LO16:
+ case BFD_RELOC_ALPHA_GOTDTPREL16:
+ case BFD_RELOC_ALPHA_DTPREL_HI16:
+ case BFD_RELOC_ALPHA_DTPREL_LO16:
+ case BFD_RELOC_ALPHA_DTPREL16:
+ case BFD_RELOC_ALPHA_GOTTPREL16:
+ case BFD_RELOC_ALPHA_TPREL_HI16:
+ case BFD_RELOC_ALPHA_TPREL_LO16:
+ case BFD_RELOC_ALPHA_TPREL16:
+ fixP->fx_no_overflow = 1;
+ break;
+
+ case BFD_RELOC_ALPHA_GPDISP_HI16:
+ fixP->fx_no_overflow = 1;
+ fixP->fx_addsy = section_symbol (now_seg);
+ fixP->fx_offset = 0;
+
+ info = get_alpha_reloc_tag (insn->sequence);
+ if (++info->n_master > 1)
+ as_bad (_("too many ldah insns for !gpdisp!%ld"), insn->sequence);
+ if (info->segment != now_seg)
+ as_bad (_("both insns for !gpdisp!%ld must be in the same section"),
+ insn->sequence);
+ fixP->tc_fix_data.info = info;
+ break;
+
case BFD_RELOC_ALPHA_GPDISP_LO16:
-#ifdef OBJ_ECOFF
+ fixP->fx_no_overflow = 1;
+
+ info = get_alpha_reloc_tag (insn->sequence);
+ if (++info->n_slaves > 1)
+ as_bad (_("too many lda insns for !gpdisp!%ld"), insn->sequence);
+ if (info->segment != now_seg)
+ as_bad (_("both insns for !gpdisp!%ld must be in the same section"),
+ insn->sequence);
+ fixP->tc_fix_data.info = info;
+ info->slaves = fixP;
+ break;
+
case BFD_RELOC_ALPHA_LITERAL:
-#endif
-#ifdef OBJ_ELF
case BFD_RELOC_ALPHA_ELF_LITERAL:
-#endif
- case BFD_RELOC_GPREL32:
fixP->fx_no_overflow = 1;
+
+ if (insn->sequence == 0)
+ break;
+ info = get_alpha_reloc_tag (insn->sequence);
+ info->master = fixP;
+ info->n_master++;
+ if (info->segment != now_seg)
+ info->multi_section_p = 1;
+ fixP->tc_fix_data.info = info;
+ break;
+
+ case DUMMY_RELOC_LITUSE_ADDR:
+ fixP->fx_offset = LITUSE_ADDR;
+ goto do_lituse;
+ case DUMMY_RELOC_LITUSE_BASE:
+ fixP->fx_offset = LITUSE_BASE;
+ goto do_lituse;
+ case DUMMY_RELOC_LITUSE_BYTOFF:
+ fixP->fx_offset = LITUSE_BYTOFF;
+ goto do_lituse;
+ case DUMMY_RELOC_LITUSE_JSR:
+ fixP->fx_offset = LITUSE_JSR;
+ goto do_lituse;
+ case DUMMY_RELOC_LITUSE_TLSGD:
+ fixP->fx_offset = LITUSE_TLSGD;
+ goto do_lituse;
+ case DUMMY_RELOC_LITUSE_TLSLDM:
+ fixP->fx_offset = LITUSE_TLSLDM;
+ goto do_lituse;
+ do_lituse:
+ fixP->fx_addsy = section_symbol (now_seg);
+ fixP->fx_r_type = BFD_RELOC_ALPHA_LITUSE;
+
+ info = get_alpha_reloc_tag (insn->sequence);
+ if (fixup->reloc == DUMMY_RELOC_LITUSE_TLSGD)
+ info->saw_lu_tlsgd = 1;
+ else if (fixup->reloc == DUMMY_RELOC_LITUSE_TLSLDM)
+ info->saw_lu_tlsldm = 1;
+ if (++info->n_slaves > 1)
+ {
+ if (info->saw_lu_tlsgd)
+ as_bad (_("too many lituse insns for !lituse_tlsgd!%ld"),
+ insn->sequence);
+ else if (info->saw_lu_tlsldm)
+ as_bad (_("too many lituse insns for !lituse_tlsldm!%ld"),
+ insn->sequence);
+ }
+ fixP->tc_fix_data.info = info;
+ fixP->tc_fix_data.next_reloc = info->slaves;
+ info->slaves = fixP;
+ if (info->segment != now_seg)
+ info->multi_section_p = 1;
+ break;
+
+ case BFD_RELOC_ALPHA_TLSGD:
+ fixP->fx_no_overflow = 1;
+
+ if (insn->sequence == 0)
+ break;
+ info = get_alpha_reloc_tag (insn->sequence);
+ if (info->saw_tlsgd)
+ as_bad (_("duplicate !tlsgd!%ld"), insn->sequence);
+ else if (info->saw_tlsldm)
+ as_bad (_("sequence number in use for !tlsldm!%ld"),
+ insn->sequence);
+ else
+ info->saw_tlsgd = 1;
+ fixP->tc_fix_data.info = info;
+ break;
+
+ case BFD_RELOC_ALPHA_TLSLDM:
+ fixP->fx_no_overflow = 1;
+
+ if (insn->sequence == 0)
+ break;
+ info = get_alpha_reloc_tag (insn->sequence);
+ if (info->saw_tlsldm)
+ as_bad (_("duplicate !tlsldm!%ld"), insn->sequence);
+ else if (info->saw_tlsgd)
+ as_bad (_("sequence number in use for !tlsgd!%ld"),
+ insn->sequence);
+ else
+ info->saw_tlsldm = 1;
+ fixP->tc_fix_data.info = info;
break;
default:
- if ((int)fixup->reloc < 0)
+ if ((int) fixup->reloc < 0)
{
if (operand->flags & AXP_OPERAND_NOOVERFLOW)
fixP->fx_no_overflow = 1;
than one insn in an insn structure. */
static void
-assemble_tokens_to_insn(opname, tok, ntok, insn)
+assemble_tokens_to_insn (opname, tok, ntok, insn)
const char *opname;
const expressionS *tok;
int ntok;
opcode = find_opcode_match (opcode, tok, &ntok, &cpumatch);
if (opcode)
{
- assemble_insn (opcode, tok, ntok, insn);
+ assemble_insn (opcode, tok, ntok, insn, BFD_RELOC_UNUSED);
return;
}
else if (cpumatch)
as_bad (_("inappropriate arguments for opcode `%s'"), opname);
else
as_bad (_("opcode `%s' not supported for target %s"), opname,
- alpha_target_name);
+ alpha_target_name);
}
else
as_bad (_("unknown opcode `%s'"), opname);
const struct alpha_opcode *opcode;
const struct alpha_macro *macro;
int cpumatch = 1;
+ bfd_reloc_code_real_type reloc = BFD_RELOC_UNUSED;
- /* search macros */
+#ifdef RELOC_OP_P
+ /* If a user-specified relocation is present, this is not a macro. */
+ if (ntok && USER_RELOC_P (tok[ntok - 1].X_op))
+ {
+ reloc = ALPHA_RELOC_TABLE (tok[ntok - 1].X_op)->reloc;
+ ntok--;
+ }
+ else
+#endif
if (local_macros_on)
{
macro = ((const struct alpha_macro *)
if (opcode)
{
struct alpha_insn insn;
- assemble_insn (opcode, tok, ntok, &insn);
+ assemble_insn (opcode, tok, ntok, &insn, reloc);
+
+ /* Copy the sequence number for the reloc from the reloc token. */
+ if (reloc != BFD_RELOC_UNUSED)
+ insn.sequence = tok[ntok].X_add_number;
+
emit_insn (&insn);
return;
}
}
if (found_something)
- if (cpumatch)
- as_bad (_("inappropriate arguments for opcode `%s'"), opname);
- else
- as_bad (_("opcode `%s' not supported for target %s"), opname,
- alpha_target_name);
+ {
+ if (cpumatch)
+ as_bad (_("inappropriate arguments for opcode `%s'"), opname);
+ else
+ as_bad (_("opcode `%s' not supported for target %s"), opname,
+ alpha_target_name);
+ }
else
as_bad (_("unknown opcode `%s'"), opname);
}
-
\f
/* Some instruction sets indexed by lg(size) */
static const char * const sextX_op[] = { "sextb", "sextw", "sextl", NULL };
static const char * const mskXl_op[] = { "mskbl", "mskwl", "mskll", "mskql" };
static const char * const mskXh_op[] = { NULL, "mskwh", "msklh", "mskqh" };
static const char * const stX_op[] = { "stb", "stw", "stl", "stq" };
-static const char * const ldX_op[] = { "ldb", "ldw", "ldll", "ldq" };
static const char * const ldXu_op[] = { "ldbu", "ldwu", NULL, NULL };
/* Implement the ldgp macro. */
insn.nfixups = 1;
insn.fixups[0].exp = addend;
insn.fixups[0].reloc = BFD_RELOC_ALPHA_GPDISP_HI16;
+ insn.sequence = next_sequence_num;
emit_insn (&insn);
insn.nfixups = 1;
insn.fixups[0].exp = addend;
insn.fixups[0].reloc = BFD_RELOC_ALPHA_GPDISP_LO16;
+ insn.sequence = next_sequence_num--;
emit_insn (&insn);
#endif /* OBJ_ECOFF || OBJ_ELF */
{
if (range_signed_16 (offset))
{
- return offset;
+ return offset;
}
}
}
i.e. "ldq $targ, LIT($gp); addq $targ, $0, $targ". Odd, perhaps,
but this is what OSF/1 does.
- Finally, the return value is true if the calling macro may emit a
- LITUSE reloc if otherwise appropriate. */
+ If explicit relocations of the form !literal!<number> are allowed,
+ and used, then explict_reloc with be an expression pointer.
-static int
+ Finally, the return value is nonzero if the calling macro may emit
+ a LITUSE reloc if otherwise appropriate; the return value is the
+ sequence number to use. */
+
+static long
load_expression (targreg, exp, pbasereg, poffset)
int targreg;
const expressionS *exp;
int *pbasereg;
expressionS *poffset;
{
- int emit_lituse = 0;
+ long emit_lituse = 0;
offsetT addend = exp->X_add_number;
int basereg = *pbasereg;
struct alpha_insn insn;
assert (insn.nfixups == 1);
insn.fixups[0].reloc = BFD_RELOC_ALPHA_LITERAL;
+ insn.sequence = emit_lituse = next_sequence_num--;
#endif /* OBJ_ECOFF */
#ifdef OBJ_ELF
/* emit "ldq r, gotoff(gp)" */
/* XXX: Disable this .got minimizing optimization so that we can get
better instruction offset knowledge in the compiler. This happens
very infrequently anyway. */
- if (1 || (!range_signed_32 (addend)
- && (alpha_noat_on || targreg == AXP_REG_AT)))
+ if (1
+ || (!range_signed_32 (addend)
+ && (alpha_noat_on || targreg == AXP_REG_AT)))
{
newtok[1] = *exp;
addend = 0;
assert (insn.nfixups == 1);
insn.fixups[0].reloc = BFD_RELOC_ALPHA_ELF_LITERAL;
+ insn.sequence = emit_lituse = next_sequence_num--;
#endif /* OBJ_ELF */
#ifdef OBJ_EVAX
offsetT link;
}
#endif /* OBJ_EVAX */
- emit_insn(&insn);
+ emit_insn (&insn);
#ifndef OBJ_EVAX
- emit_lituse = 1;
-
if (basereg != alpha_gp_register && basereg != AXP_REG_ZERO)
{
/* emit "addq r, base, r" */
case O_subtract:
/* Assume that this difference expression will be resolved to an
- absolute value and that that value will fit in 16 bits. */
+ absolute value and that that value will fit in 16 bits. */
set_tok_reg (newtok[0], targreg);
newtok[1] = *exp;
if (!range_signed_32 (addend))
{
offsetT lit;
+ long seq_num = next_sequence_num--;
- /* for 64-bit addends, just put it in the literal pool */
+ /* For 64-bit addends, just put it in the literal pool. */
#ifdef OBJ_EVAX
/* emit "ldq targreg, lit(basereg)" */
#ifdef OBJ_ELF
insn.fixups[0].reloc = BFD_RELOC_ALPHA_ELF_LITERAL;
#endif
+ insn.sequence = seq_num;
emit_insn (&insn);
assemble_tokens_to_insn ("ldq", newtok, 3, &insn);
assert (insn.nfixups < MAX_INSN_FIXUPS);
- if (insn.nfixups > 0)
- {
- memmove (&insn.fixups[1], &insn.fixups[0],
- sizeof(struct alpha_fixup) * insn.nfixups);
- }
+ insn.fixups[insn.nfixups].reloc = DUMMY_RELOC_LITUSE_BASE;
+ insn.fixups[insn.nfixups].exp.X_op = O_absent;
insn.nfixups++;
- insn.fixups[0].reloc = BFD_RELOC_ALPHA_LITUSE;
- insn.fixups[0].exp.X_op = O_symbol;
- insn.fixups[0].exp.X_add_symbol = section_symbol (now_seg);
- insn.fixups[0].exp.X_add_number = 1;
+ insn.sequence = seq_num;
emit_lituse = 0;
emit_insn (&insn);
int ntok;
const PTR opname;
{
- int basereg, lituse;
+ int basereg;
+ long lituse;
expressionS newtok[3];
struct alpha_insn insn;
newtok[0] = tok[0];
set_tok_preg (newtok[2], basereg);
- assemble_tokens_to_insn ((const char *)opname, newtok, 3, &insn);
+ assemble_tokens_to_insn ((const char *) opname, newtok, 3, &insn);
if (lituse)
{
assert (insn.nfixups < MAX_INSN_FIXUPS);
- if (insn.nfixups > 0)
- {
- memmove (&insn.fixups[1], &insn.fixups[0],
- sizeof(struct alpha_fixup) * insn.nfixups);
- }
+ insn.fixups[insn.nfixups].reloc = DUMMY_RELOC_LITUSE_BASE;
+ insn.fixups[insn.nfixups].exp.X_op = O_absent;
insn.nfixups++;
- insn.fixups[0].reloc = BFD_RELOC_ALPHA_LITUSE;
- insn.fixups[0].exp.X_op = O_symbol;
- insn.fixups[0].exp.X_add_symbol = section_symbol (now_seg);
- insn.fixups[0].exp.X_add_number = 1;
+ insn.sequence = lituse;
}
emit_insn (&insn);
int ntok;
const PTR opname;
{
- int basereg, lituse;
+ int basereg;
+ long lituse;
expressionS newtok[3];
struct alpha_insn insn;
else
basereg = tok[2].X_add_number;
- if (tok[1].X_op != O_constant || !range_signed_16(tok[1].X_add_number))
+ if (tok[1].X_op != O_constant || !range_signed_16 (tok[1].X_add_number))
{
if (alpha_noat_on)
as_bad (_("macro requires $at register while noat in effect"));
newtok[0] = tok[0];
set_tok_preg (newtok[2], basereg);
- assemble_tokens_to_insn ((const char *)opname, newtok, 3, &insn);
+ assemble_tokens_to_insn ((const char *) opname, newtok, 3, &insn);
if (lituse)
{
assert (insn.nfixups < MAX_INSN_FIXUPS);
- if (insn.nfixups > 0)
- {
- memmove (&insn.fixups[1], &insn.fixups[0],
- sizeof(struct alpha_fixup) * insn.nfixups);
- }
+ insn.fixups[insn.nfixups].reloc = DUMMY_RELOC_LITUSE_BASE;
+ insn.fixups[insn.nfixups].exp.X_op = O_absent;
insn.nfixups++;
- insn.fixups[0].reloc = BFD_RELOC_ALPHA_LITUSE;
- insn.fixups[0].exp.X_op = O_symbol;
- insn.fixups[0].exp.X_add_symbol = section_symbol (now_seg);
- insn.fixups[0].exp.X_add_number = 1;
+ insn.sequence = lituse;
}
emit_insn (&insn);
const PTR vlgsize;
{
if (alpha_target & AXP_OPCODE_BWX)
- emit_ir_load (tok, ntok, ldXu_op[(long)vlgsize]);
+ emit_ir_load (tok, ntok, ldXu_op[(long) vlgsize]);
else
{
expressionS newtok[3];
+ struct alpha_insn insn;
+ int basereg;
+ long lituse;
if (alpha_noat_on)
as_bad (_("macro requires $at register while noat in effect"));
+ if (ntok == 2)
+ basereg = (tok[1].X_op == O_constant
+ ? AXP_REG_ZERO : alpha_gp_register);
+ else
+ basereg = tok[2].X_add_number;
+
/* emit "lda $at, exp" */
- memcpy (newtok, tok, sizeof (expressionS) * ntok);
- newtok[0].X_add_number = AXP_REG_AT;
- assemble_tokens ("lda", newtok, ntok, 1);
+ lituse = load_expression (AXP_REG_AT, &tok[1], &basereg, NULL);
/* emit "ldq_u targ, 0($at)" */
newtok[0] = tok[0];
set_tok_const (newtok[1], 0);
- set_tok_preg (newtok[2], AXP_REG_AT);
- assemble_tokens ("ldq_u", newtok, 3, 1);
+ set_tok_preg (newtok[2], basereg);
+ assemble_tokens_to_insn ("ldq_u", newtok, 3, &insn);
+
+ if (lituse)
+ {
+ assert (insn.nfixups < MAX_INSN_FIXUPS);
+ insn.fixups[insn.nfixups].reloc = DUMMY_RELOC_LITUSE_BASE;
+ insn.fixups[insn.nfixups].exp.X_op = O_absent;
+ insn.nfixups++;
+ insn.sequence = lituse;
+ }
+
+ emit_insn (&insn);
/* emit "extXl targ, $at, targ" */
- set_tok_reg (newtok[1], AXP_REG_AT);
+ set_tok_reg (newtok[1], basereg);
newtok[2] = newtok[0];
- assemble_tokens (extXl_op[(long)vlgsize], newtok, 3, 1);
+ assemble_tokens_to_insn (extXl_op[(long) vlgsize], newtok, 3, &insn);
+
+ if (lituse)
+ {
+ assert (insn.nfixups < MAX_INSN_FIXUPS);
+ insn.fixups[insn.nfixups].reloc = DUMMY_RELOC_LITUSE_BYTOFF;
+ insn.fixups[insn.nfixups].exp.X_op = O_absent;
+ insn.nfixups++;
+ insn.sequence = lituse;
+ }
+
+ emit_insn (&insn);
}
}
const PTR vlgsize;
{
emit_ldXu (tok, ntok, vlgsize);
- assemble_tokens (sextX_op[(long)vlgsize], tok, 1, 1);
+ assemble_tokens (sextX_op[(long) vlgsize], tok, 1, 1);
}
/* Load an integral value from an unaligned address as an unsigned
int ntok;
const PTR vlgsize;
{
- long lgsize = (long)vlgsize;
+ long lgsize = (long) vlgsize;
expressionS newtok[3];
if (alpha_noat_on)
/* emit "ldq_u $t10, size-1($at)" */
set_tok_reg (newtok[0], AXP_REG_T10);
- set_tok_const (newtok[1], (1<<lgsize)-1);
+ set_tok_const (newtok[1], (1 << lgsize) - 1);
assemble_tokens ("ldq_u", newtok, 3, 1);
/* emit "extXl $t9, $at, $t9" */
const PTR vlgsize;
{
emit_uldXu (tok, ntok, vlgsize);
- assemble_tokens (sextX_op[(long)vlgsize], tok, 1, 1);
+ assemble_tokens (sextX_op[(long) vlgsize], tok, 1, 1);
}
/* Implement the ldil macro. */
{
expressionS newtok[2];
- memcpy (newtok, tok, sizeof(newtok));
+ memcpy (newtok, tok, sizeof (newtok));
newtok[1].X_add_number = sign_extend_32 (tok[1].X_add_number);
assemble_tokens ("lda", newtok, ntok, 1);
int ntok;
const PTR vlgsize;
{
- int lgsize = (int)(long)vlgsize;
+ int lgsize = (int) (long) vlgsize;
if (alpha_target & AXP_OPCODE_BWX)
emit_loadstore (tok, ntok, stX_op[lgsize]);
else
{
expressionS newtok[3];
+ struct alpha_insn insn;
+ int basereg;
+ long lituse;
if (alpha_noat_on)
- as_bad(_("macro requires $at register while noat in effect"));
+ as_bad (_("macro requires $at register while noat in effect"));
+
+ if (ntok == 2)
+ basereg = (tok[1].X_op == O_constant
+ ? AXP_REG_ZERO : alpha_gp_register);
+ else
+ basereg = tok[2].X_add_number;
/* emit "lda $at, exp" */
- memcpy (newtok, tok, sizeof (expressionS) * ntok);
- newtok[0].X_add_number = AXP_REG_AT;
- assemble_tokens ("lda", newtok, ntok, 1);
+ lituse = load_expression (AXP_REG_AT, &tok[1], &basereg, NULL);
/* emit "ldq_u $t9, 0($at)" */
set_tok_reg (newtok[0], AXP_REG_T9);
set_tok_const (newtok[1], 0);
- set_tok_preg (newtok[2], AXP_REG_AT);
- assemble_tokens ("ldq_u", newtok, 3, 1);
+ set_tok_preg (newtok[2], basereg);
+ assemble_tokens_to_insn ("ldq_u", newtok, 3, &insn);
+
+ if (lituse)
+ {
+ assert (insn.nfixups < MAX_INSN_FIXUPS);
+ insn.fixups[insn.nfixups].reloc = DUMMY_RELOC_LITUSE_BASE;
+ insn.fixups[insn.nfixups].exp.X_op = O_absent;
+ insn.nfixups++;
+ insn.sequence = lituse;
+ }
+
+ emit_insn (&insn);
/* emit "insXl src, $at, $t10" */
newtok[0] = tok[0];
- set_tok_reg (newtok[1], AXP_REG_AT);
+ set_tok_reg (newtok[1], basereg);
set_tok_reg (newtok[2], AXP_REG_T10);
- assemble_tokens (insXl_op[lgsize], newtok, 3, 1);
+ assemble_tokens_to_insn (insXl_op[lgsize], newtok, 3, &insn);
+
+ if (lituse)
+ {
+ assert (insn.nfixups < MAX_INSN_FIXUPS);
+ insn.fixups[insn.nfixups].reloc = DUMMY_RELOC_LITUSE_BYTOFF;
+ insn.fixups[insn.nfixups].exp.X_op = O_absent;
+ insn.nfixups++;
+ insn.sequence = lituse;
+ }
+
+ emit_insn (&insn);
/* emit "mskXl $t9, $at, $t9" */
set_tok_reg (newtok[0], AXP_REG_T9);
newtok[2] = newtok[0];
- assemble_tokens (mskXl_op[lgsize], newtok, 3, 1);
+ assemble_tokens_to_insn (mskXl_op[lgsize], newtok, 3, &insn);
+
+ if (lituse)
+ {
+ assert (insn.nfixups < MAX_INSN_FIXUPS);
+ insn.fixups[insn.nfixups].reloc = DUMMY_RELOC_LITUSE_BYTOFF;
+ insn.fixups[insn.nfixups].exp.X_op = O_absent;
+ insn.nfixups++;
+ insn.sequence = lituse;
+ }
+
+ emit_insn (&insn);
/* emit "or $t9, $t10, $t9" */
/* emit "stq_u $t9, 0($at) */
- set_tok_const (newtok[1], 0);
+ set_tok_const(newtok[1], 0);
set_tok_preg (newtok[2], AXP_REG_AT);
- assemble_tokens ("stq_u", newtok, 3, 1);
+ assemble_tokens_to_insn ("stq_u", newtok, 3, &insn);
+
+ if (lituse)
+ {
+ assert (insn.nfixups < MAX_INSN_FIXUPS);
+ insn.fixups[insn.nfixups].reloc = DUMMY_RELOC_LITUSE_BASE;
+ insn.fixups[insn.nfixups].exp.X_op = O_absent;
+ insn.nfixups++;
+ insn.sequence = lituse;
+ }
+
+ emit_insn (&insn);
}
}
int ntok;
const PTR vlgsize;
{
- int lgsize = (int)(long)vlgsize;
+ int lgsize = (int) (long) vlgsize;
expressionS newtok[3];
/* emit "lda $at, exp" */
/* emit "ldq_u $10, size-1($at)" */
set_tok_reg (newtok[0], AXP_REG_T10);
- set_tok_const (newtok[1], (1 << lgsize)-1);
+ set_tok_const (newtok[1], (1 << lgsize) - 1);
assemble_tokens ("ldq_u", newtok, 3, 1);
/* emit "insXl src, $at, $t11" */
/* emit "stq_u $t10, size-1($at)" */
set_tok_reg (newtok[0], AXP_REG_T10);
- set_tok_const (newtok[1], (1 << lgsize)-1);
+ set_tok_const (newtok[1], (1 << lgsize) - 1);
assemble_tokens ("stq_u", newtok, 3, 1);
}
int ntok;
const PTR vlgsize;
{
- long lgsize = (long)vlgsize;
+ long lgsize = (long) vlgsize;
if (alpha_target & AXP_OPCODE_BWX)
assemble_tokens (sextX_op[lgsize], tok, ntok, 0);
{
set_tok_reg (newtok[0], xr);
set_tok_reg (newtok[1], AXP_REG_R16);
- assemble_tokens ("mov", newtok, 2, 1);
+ assemble_tokens ("mov", newtok, 2, 1);
}
if (yr != AXP_REG_R16 && yr != AXP_REG_R17)
}
}
- sym = symbol_find_or_make ((const char *)symname);
+ sym = symbol_find_or_make ((const char *) symname);
set_tok_reg (newtok[0], AXP_REG_AT);
set_tok_sym (newtok[1], sym, 0);
else
rr = regno (tok[2].X_add_number);
- sym = symbol_find_or_make ((const char *)symname);
+ sym = symbol_find_or_make ((const char *) symname);
/* Move the operands into the right place */
if (yr == AXP_REG_T10 && xr == AXP_REG_T11)
{
set_tok_reg (newtok[0], xr);
set_tok_reg (newtok[1], AXP_REG_T10);
- assemble_tokens ("mov", newtok, 2, 1);
+ assemble_tokens ("mov", newtok, 2, 1);
}
if (yr != AXP_REG_T10 && yr != AXP_REG_T11)
const char *opname = (const char *) vopname;
struct alpha_insn insn;
expressionS newtok[3];
- int r, tokidx = 0, lituse = 0;
+ int r, tokidx = 0;
+ long lituse = 0;
if (tokidx < ntok && tok[tokidx].X_op == O_register)
r = regno (tok[tokidx++].X_add_number);
assemble_tokens_to_insn (opname, newtok, 3, &insn);
- /* add the LITUSE fixup */
if (lituse)
{
assert (insn.nfixups < MAX_INSN_FIXUPS);
- if (insn.nfixups > 0)
- {
- memmove (&insn.fixups[1], &insn.fixups[0],
- sizeof(struct alpha_fixup) * insn.nfixups);
- }
+ insn.fixups[insn.nfixups].reloc = DUMMY_RELOC_LITUSE_JSR;
+ insn.fixups[insn.nfixups].exp.X_op = O_absent;
insn.nfixups++;
- insn.fixups[0].reloc = BFD_RELOC_ALPHA_LITUSE;
- insn.fixups[0].exp.X_op = O_symbol;
- insn.fixups[0].exp.X_add_symbol = section_symbol (now_seg);
- insn.fixups[0].exp.X_add_number = 3;
+ insn.sequence = lituse;
}
emit_insn (&insn);
int ntok;
const PTR vopname;
{
- const char *opname = (const char *)vopname;
+ const char *opname = (const char *) vopname;
expressionS newtok[3];
int r, tokidx = 0;
if (tokidx < ntok)
newtok[2] = tok[tokidx];
else
- set_tok_const (newtok[2], strcmp(opname, "ret") == 0);
+ set_tok_const (newtok[2], strcmp (opname, "ret") == 0);
assemble_tokens (opname, newtok, 3, 0);
}
int i;
{
+#ifdef OBJ_ELF
+ obj_elf_text (i);
+#else
s_text (i);
+#endif
alpha_insn_label = NULL;
alpha_auto_align_on = 1;
alpha_current_align = 0;
s_alpha_data (i)
int i;
{
+#ifdef OBJ_ELF
+ obj_elf_data (i);
+#else
s_data (i);
+#endif
alpha_insn_label = NULL;
alpha_auto_align_on = 1;
alpha_current_align = 0;
{
offsetT align;
- input_line_pointer++;
+ input_line_pointer++;
align = get_absolute_expression ();
bfd_set_section_alignment (stdoutput, new_seg, align);
}
#ifdef OBJ_EVAX
if (bfd_section_size (stdoutput, new_seg) > 0)
- {
+ {
if (bfd_section_size (stdoutput, new_seg) != temp)
as_bad (_("Length of .comm \"%s\" is already %ld. Not changed to %ld."),
S_GET_NAME (symbolP),
#endif
else
{
-#ifdef OBJ_EVAX
+#ifdef OBJ_EVAX
subseg_set (new_seg, 0);
p = frag_more (temp);
new_seg->flags |= SEC_IS_COMMON;
input_line_pointer++;
SKIP_WHITESPACE ();
}
- if (isdigit (*input_line_pointer) || *input_line_pointer == '-')
+ if (ISDIGIT (*input_line_pointer) || *input_line_pointer == '-')
(void) get_absolute_expression ();
}
demand_empty_rest_of_line ();
(expressionS *) xmalloc (sizeof (expressionS));
symbol_get_obj (sym)->size->X_op = O_subtract;
symbol_get_obj (sym)->size->X_add_symbol
- = symbol_new ("L0\001", now_seg, frag_now_fix (), frag_now);
+ = symbol_new ("L0\001", now_seg, frag_now_fix (), frag_now);
symbol_get_obj (sym)->size->X_op_symbol = sym;
symbol_get_obj (sym)->size->X_add_number = 0;
}
if (ECOFF_DEBUGGING)
{
if (fp)
- ecoff_directive_fmask (0);
+ ecoff_directive_fmask (0);
else
- ecoff_directive_mask (0);
+ ecoff_directive_mask (0);
}
else
discard_rest_of_line ();
switch (arg)
{
- case 0: /* No PV required. */
- S_SET_OTHER (sym, STO_ALPHA_NOPV);
- break;
- case 1: /* Std GP load. */
- S_SET_OTHER (sym, STO_ALPHA_STD_GPLOAD);
- break;
- case 2: /* Non-std use of PV. */
- break;
-
- default:
- as_bad (_("Invalid argument %d to .prologue."), arg);
- break;
- }
+ case 0: /* No PV required. */
+ S_SET_OTHER (sym, STO_ALPHA_NOPV
+ | (S_GET_OTHER (sym) & ~STO_ALPHA_STD_GPLOAD));
+ break;
+ case 1: /* Std GP load. */
+ S_SET_OTHER (sym, STO_ALPHA_STD_GPLOAD
+ | (S_GET_OTHER (sym) & ~STO_ALPHA_STD_GPLOAD));
+ break;
+ case 2: /* Non-std use of PV. */
+ break;
+
+ default:
+ as_bad (_("Invalid argument %d to .prologue."), arg);
+ break;
+ }
+}
+
+static char *first_file_directive;
+
+static void
+s_alpha_file (ignore)
+ int ignore ATTRIBUTE_UNUSED;
+{
+ /* Save the first .file directive we see, so that we can change our
+ minds about whether ecoff debugging should or shouldn't be enabled. */
+ if (alpha_flag_mdebug < 0 && ! first_file_directive)
+ {
+ char *start = input_line_pointer;
+ size_t len;
+
+ discard_rest_of_line ();
+
+ len = input_line_pointer - start;
+ first_file_directive = xmalloc (len + 1);
+ memcpy (first_file_directive, start, len);
+ first_file_directive[len] = '\0';
+
+ input_line_pointer = start;
+ }
+
+ if (ECOFF_DEBUGGING)
+ ecoff_directive_file (0);
+ else
+ dwarf2_directive_file (0);
+}
+
+static void
+s_alpha_loc (ignore)
+ int ignore ATTRIBUTE_UNUSED;
+{
+ if (ECOFF_DEBUGGING)
+ ecoff_directive_loc (0);
+ else
+ dwarf2_directive_loc (0);
+}
+
+static void
+s_alpha_stab (n)
+ int n;
+{
+ /* If we've been undecided about mdebug, make up our minds in favour. */
+ if (alpha_flag_mdebug < 0)
+ {
+ segT sec = subseg_new (".mdebug", 0);
+ bfd_set_section_flags (stdoutput, sec, SEC_HAS_CONTENTS | SEC_READONLY);
+ bfd_set_section_alignment (stdoutput, sec, 3);
+
+ ecoff_read_begin_hook ();
+
+ if (first_file_directive)
+ {
+ char *save_ilp = input_line_pointer;
+ input_line_pointer = first_file_directive;
+ ecoff_directive_file (0);
+ input_line_pointer = save_ilp;
+ free (first_file_directive);
+ }
+
+ alpha_flag_mdebug = 1;
+ }
+ s_stab (n);
}
static void
ecoff_directive_def,
ecoff_directive_dim,
ecoff_directive_endef,
- ecoff_directive_file,
ecoff_directive_scl,
ecoff_directive_tag,
ecoff_directive_val,
- ecoff_directive_loc,
};
- assert (which >= 0 && which < (int)(sizeof(fns)/sizeof(*fns)));
+ assert (which >= 0 && which < (int) (sizeof (fns)/sizeof (*fns)));
if (ECOFF_DEBUGGING)
- (*fns[which])(0);
+ (*fns[which]) (0);
else
{
as_bad (_("ECOFF debugging is disabled."));
#endif /* OBJ_ELF */
#ifdef OBJ_EVAX
-
+
/* Handle the section specific pseudo-op. */
-
+
static void
s_alpha_section (secid)
int secid;
{
int temp;
#define EVAX_SECTION_COUNT 5
- static char *section_name[EVAX_SECTION_COUNT+1] =
+ static char *section_name[EVAX_SECTION_COUNT + 1] =
{ "NULL", ".rdata", ".comm", ".link", ".ctors", ".dtors" };
if ((secid <= 0) || (secid > EVAX_SECTION_COUNT))
alpha_current_align = 0;
}
-
/* Parse .ent directives. */
static void
return;
}
-
/* Parse .frame <framreg>,<framesize>,RA,<rsa_offset> directives. */
static void
name = input_line_pointer;
name_end = get_symbol_end ();
- if (strncmp(name, "stack", 5) == 0)
+ if (strncmp (name, "stack", 5) == 0)
{
alpha_evax_proc.pdsckind = PDSC_S_K_KIND_FP_STACK;
}
- else if (strncmp(name, "reg", 3) == 0)
+ else if (strncmp (name, "reg", 3) == 0)
{
alpha_evax_proc.pdsckind = PDSC_S_K_KIND_FP_REGISTER;
}
- else if (strncmp(name, "null", 4) == 0)
+ else if (strncmp (name, "null", 4) == 0)
{
alpha_evax_proc.pdsckind = PDSC_S_K_KIND_NULL;
}
seginfo->literal_pool_size += 16;
*p = alpha_evax_proc.pdsckind
- | ((alpha_evax_proc.framereg == 29) ? PDSC_S_M_BASE_REG_IS_FP : 0);
- *(p+1) = PDSC_S_M_NATIVE
- | PDSC_S_M_NO_JACKET;
+ | ((alpha_evax_proc.framereg == 29) ? PDSC_S_M_BASE_REG_IS_FP : 0);
+ *(p + 1) = PDSC_S_M_NATIVE | PDSC_S_M_NO_JACKET;
switch (alpha_evax_proc.pdsckind)
{
- case PDSC_S_K_KIND_NULL:
- *(p+2) = 0;
- *(p+3) = 0;
- break;
- case PDSC_S_K_KIND_FP_REGISTER:
- *(p+2) = alpha_evax_proc.fp_save;
- *(p+3) = alpha_evax_proc.ra_save;
- break;
- case PDSC_S_K_KIND_FP_STACK:
- md_number_to_chars (p+2, (valueT)alpha_evax_proc.rsa_offset, 2);
- break;
- default: /* impossible */
- break;
+ case PDSC_S_K_KIND_NULL:
+ *(p + 2) = 0;
+ *(p + 3) = 0;
+ break;
+ case PDSC_S_K_KIND_FP_REGISTER:
+ *(p + 2) = alpha_evax_proc.fp_save;
+ *(p + 3) = alpha_evax_proc.ra_save;
+ break;
+ case PDSC_S_K_KIND_FP_STACK:
+ md_number_to_chars (p + 2, (valueT) alpha_evax_proc.rsa_offset, 2);
+ break;
+ default: /* impossible */
+ break;
}
- *(p+4) = 0;
- *(p+5) = alpha_evax_proc.type & 0x0f;
+ *(p + 4) = 0;
+ *(p + 5) = alpha_evax_proc.type & 0x0f;
/* Signature offset. */
- md_number_to_chars (p+6, (valueT)0, 2);
+ md_number_to_chars (p + 6, (valueT) 0, 2);
- fix_new_exp (frag_now, p-frag_now->fr_literal+8, 8, &exp, 0, BFD_RELOC_64);
+ fix_new_exp (frag_now, p - frag_now->fr_literal+8, 8, &exp, 0, BFD_RELOC_64);
if (alpha_evax_proc.pdsckind == PDSC_S_K_KIND_NULL)
return;
seginfo->literal_pool_size += 8;
/* pdesc+16: Size. */
- md_number_to_chars (p, (valueT)alpha_evax_proc.framesize, 4);
+ md_number_to_chars (p, (valueT) alpha_evax_proc.framesize, 4);
- md_number_to_chars (p+4, (valueT)0, 2);
+ md_number_to_chars (p + 4, (valueT) 0, 2);
/* Entry length. */
- md_number_to_chars (p+6, alpha_evax_proc.prologue, 2);
+ md_number_to_chars (p + 6, alpha_evax_proc.prologue, 2);
if (alpha_evax_proc.pdsckind == PDSC_S_K_KIND_FP_REGISTER)
return;
/* pdesc+24: register masks. */
md_number_to_chars (p, alpha_evax_proc.imask, 4);
- md_number_to_chars (p+4, alpha_evax_proc.fmask, 4);
+ md_number_to_chars (p + 4, alpha_evax_proc.fmask, 4);
return;
}
-
/* Support for crash debug on vms. */
static void
p = frag_more (8);
seginfo->literal_pool_size += 8;
- fix_new_exp (frag_now, p-frag_now->fr_literal, 8, &exp, 0, BFD_RELOC_64);
+ fix_new_exp (frag_now, p - frag_now->fr_literal, 8, &exp, 0, BFD_RELOC_64);
return;
}
-
static void
s_alpha_linkage (ignore)
int ignore;
return;
}
-
static void
s_alpha_code_address (ignore)
int ignore;
return;
}
-
static void
s_alpha_fp_save (ignore)
int ignore;
return;
}
-
static void
s_alpha_mask (ignore)
int ignore;
else
{
alpha_evax_proc.imask = val;
- (void)get_absolute_expression ();
+ (void) get_absolute_expression ();
}
demand_empty_rest_of_line ();
return;
}
-
static void
s_alpha_fmask (ignore)
int ignore;
return;
}
-
static void
s_alpha_file (ignore)
int ignore;
switch (e.X_op)
{
case O_constant:
- e.X_add_symbol = section_symbol(absolute_section);
+ e.X_add_symbol = section_symbol (absolute_section);
e.X_op = O_symbol;
/* FALLTHRU */
case O_symbol:
break;
default:
- abort();
+ abort ();
}
#else
#ifdef OBJ_ECOFF
p = frag_more (4);
memset (p, 0, 4);
- fix_new_exp (frag_now, p-frag_now->fr_literal, 4,
+ fix_new_exp (frag_now, p - frag_now->fr_literal, 4,
&e, 0, BFD_RELOC_GPREL32);
}
ch = get_symbol_end ();
for (p = cpu_types; p->name; ++p)
- if (strcmp(name, p->name) == 0)
+ if (strcmp (name, p->name) == 0)
{
- alpha_target_name = p->name, alpha_target = p->flags;
+ alpha_target_name = p->name, alpha_target = p->flags;
goto found;
}
- as_warn("Unknown CPU identifier `%s'", name);
+ as_warn ("Unknown CPU identifier `%s'", name);
found:
*input_line_pointer = ch;
demand_empty_rest_of_line ();
}
-
\f
-
#ifdef DEBUG1
/* print token expression with alpha specific extension. */
static void
-alpha_print_token(f, exp)
- FILE *f;
- const expressionS *exp;
+alpha_print_token (f, exp)
+ FILE *f;
+ const expressionS *exp;
{
switch (exp->X_op)
{
- case O_cpregister:
- putc (',', f);
- /* FALLTHRU */
- case O_pregister:
- putc ('(', f);
- {
- expressionS nexp = *exp;
- nexp.X_op = O_register;
- print_expr (f, &nexp);
- }
- putc (')', f);
- break;
- default:
- print_expr (f, exp);
- break;
+ case O_cpregister:
+ putc (',', f);
+ /* FALLTHRU */
+ case O_pregister:
+ putc ('(', f);
+ {
+ expressionS nexp = *exp;
+ nexp.X_op = O_register;
+ print_expr (f, &nexp);
+ }
+ putc (')', f);
+ break;
+ default:
+ print_expr (f, exp);
+ break;
}
return;
}
\f
/* The target specific pseudo-ops which we support. */
-const pseudo_typeS md_pseudo_table[] =
-{
+const pseudo_typeS md_pseudo_table[] = {
#ifdef OBJ_ECOFF
{"comm", s_alpha_comm, 0}, /* osf1 compiler does this */
{"rdata", s_alpha_rdata, 0},
{"fmask", s_alpha_mask, 1},
{"frame", s_alpha_frame, 0},
{"prologue", s_alpha_prologue, 0},
+ {"file", s_alpha_file, 5},
+ {"loc", s_alpha_loc, 9},
+ {"stabs", s_alpha_stab, 's'},
+ {"stabn", s_alpha_stab, 'n'},
/* COFF debugging related pseudos. */
{"begin", s_alpha_coff_wrapper, 0},
{"bend", s_alpha_coff_wrapper, 1},
{"def", s_alpha_coff_wrapper, 2},
{"dim", s_alpha_coff_wrapper, 3},
{"endef", s_alpha_coff_wrapper, 4},
- {"file", s_alpha_coff_wrapper, 5},
- {"scl", s_alpha_coff_wrapper, 6},
- {"tag", s_alpha_coff_wrapper, 7},
- {"val", s_alpha_coff_wrapper, 8},
- {"loc", s_alpha_coff_wrapper, 9},
+ {"scl", s_alpha_coff_wrapper, 5},
+ {"tag", s_alpha_coff_wrapper, 6},
+ {"val", s_alpha_coff_wrapper, 7},
#else
{"prologue", s_ignore, 0},
#endif
{NULL, 0, 0},
};
-
\f
/* Build a BFD section with its flags set appropriately for the .lita,
.lit8, or .lit4 sections. */
assert (alpha_gp_value == 0);
/* Get minus-one in whatever width... */
- alpha_gp_value = 0; alpha_gp_value--;
+ alpha_gp_value = 0;
+ alpha_gp_value--;
/* Select the smallest VMA of these existing sections. */
maybe_set_gp (alpha_lita_section);
}
#endif /* OBJ_ECOFF */
+#ifdef OBJ_ELF
+/* Map 's' to SHF_ALPHA_GPREL. */
+
+int
+alpha_elf_section_letter (letter, ptr_msg)
+ int letter;
+ char **ptr_msg;
+{
+ if (letter == 's')
+ return SHF_ALPHA_GPREL;
+
+ *ptr_msg = _("Bad .section directive: want a,s,w,x,M,S,G,T in string");
+ return 0;
+}
+
+/* Map SHF_ALPHA_GPREL to SEC_SMALL_DATA. */
+
+flagword
+alpha_elf_section_flags (flags, attr, type)
+ flagword flags;
+ int attr, type ATTRIBUTE_UNUSED;
+{
+ if (attr & SHF_ALPHA_GPREL)
+ flags |= SEC_SMALL_DATA;
+ return flags;
+}
+#endif /* OBJ_ELF */
+
/* Called internally to handle all alignment needs. This takes care
of eliding calls to frag_align if'n the cached current alignment
says we've already got it, as well as taking care of the auto-align
if (pfill == NULL)
{
- if (n > 2
- && (bfd_get_section_flags (stdoutput, now_seg) & SEC_CODE) != 0)
- {
- static char const unop[4] = { 0x00, 0x00, 0xe0, 0x2f };
- static char const nopunop[8] = {
- 0x1f, 0x04, 0xff, 0x47,
- 0x00, 0x00, 0xe0, 0x2f
- };
-
- /* First, make sure we're on a four-byte boundary, in case
- someone has been putting .byte values into the text
- section. The DEC assembler silently fills with unaligned
- no-op instructions. This will zero-fill, then nop-fill
- with proper alignment. */
- if (alpha_current_align < 2)
- frag_align (2, 0, 0);
- if (alpha_current_align < 3)
- frag_align_pattern (3, unop, sizeof unop, 0);
- if (n > 3)
- frag_align_pattern (n, nopunop, sizeof nopunop, 0);
- }
+ if (subseg_text_p (now_seg))
+ frag_align_code (n, 0);
else
frag_align (n, 0, 0);
}
record_alignment (now_seg, n);
- /* ??? if alpha_flag_relax && force && elf, record the requested alignment
+ /* ??? If alpha_flag_relax && force && elf, record the requested alignment
in a reloc for the linker to see. */
}
+/* This is called from HANDLE_ALIGN in write.c. Fill in the contents
+ of an rs_align_code fragment. */
+
+void
+alpha_handle_align (fragp)
+ fragS *fragp;
+{
+ static char const unop[4] = { 0x00, 0x00, 0xfe, 0x2f };
+ static char const nopunop[8] = {
+ 0x1f, 0x04, 0xff, 0x47,
+ 0x00, 0x00, 0xfe, 0x2f
+ };
+
+ int bytes, fix;
+ char *p;
+
+ if (fragp->fr_type != rs_align_code)
+ return;
+
+ bytes = fragp->fr_next->fr_address - fragp->fr_address - fragp->fr_fix;
+ p = fragp->fr_literal + fragp->fr_fix;
+ fix = 0;
+
+ if (bytes & 3)
+ {
+ fix = bytes & 3;
+ memset (p, 0, fix);
+ p += fix;
+ bytes -= fix;
+ }
+
+ if (bytes & 4)
+ {
+ memcpy (p, unop, 4);
+ p += 4;
+ bytes -= 4;
+ fix += 4;
+ }
+
+ memcpy (p, nopunop, 8);
+
+ fragp->fr_fix += fix;
+ fragp->fr_var = 8;
+}
+
/* The Alpha has support for some VAX floating point types, as well as for
IEEE floating point. We consider IEEE to be the primary floating point
format, and sneak in the VAX floating point support here. */
projects / deliverable / binutils-gdb.git / blobdiff