/* tc-alpha.c - Processor-specific code for the DEC Alpha AXP CPU.
- Copyright 1989, 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001
- Free Software Foundation, Inc.
+ Copyright 1989, 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000,
+ 2001, 2002, 2003, 2004, 2005 Free Software Foundation, Inc.
Contributed by Carnegie Mellon University, 1993.
Written by Alessandro Forin, based on earlier gas-1.38 target CPU files.
Modified by Ken Raeburn for gas-2.x and ECOFF support.
You should have received a copy of the GNU General Public License
along with GAS; see the file COPYING. If not, write to the Free
- Software Foundation, 59 Temple Place - Suite 330, Boston, MA
- 02111-1307, USA. */
-
-/*
- * Mach Operating System
- * Copyright (c) 1993 Carnegie Mellon University
- * All Rights Reserved.
- *
- * Permission to use, copy, modify and distribute this software and its
- * documentation is hereby granted, provided that both the copyright
- * notice and this permission notice appear in all copies of the
- * software, derivative works or modified versions, and any portions
- * thereof, and that both notices appear in supporting documentation.
- *
- * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS
- * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND FOR
- * ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
- *
- * Carnegie Mellon requests users of this software to return to
- *
- * Software Distribution Coordinator or Software.Distribution@CS.CMU.EDU
- * School of Computer Science
- * Carnegie Mellon University
- * Pittsburgh PA 15213-3890
- *
- * any improvements or extensions that they make and grant Carnegie the
- * rights to redistribute these changes.
- */
+ Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA
+ 02110-1301, USA. */
+
+/* Mach Operating System
+ Copyright (c) 1993 Carnegie Mellon University
+ All Rights Reserved.
+
+ Permission to use, copy, modify and distribute this software and its
+ documentation is hereby granted, provided that both the copyright
+ notice and this permission notice appear in all copies of the
+ software, derivative works or modified versions, and any portions
+ thereof, and that both notices appear in supporting documentation.
+
+ CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS
+ CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND FOR
+ ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
+
+ Carnegie Mellon requests users of this software to return to
+
+ Software Distribution Coordinator or Software.Distribution@CS.CMU.EDU
+ School of Computer Science
+ Carnegie Mellon University
+ Pittsburgh PA 15213-3890
+
+ any improvements or extensions that they make and grant Carnegie the
+ rights to redistribute these changes. */
#include "as.h"
#include "subsegs.h"
#include "dwarf2dbg.h"
#endif
-#include <ctype.h>
+#include "dw2gencfi.h"
+#include "safe-ctype.h"
\f
-/* Local types */
+/* Local types. */
-#define TOKENIZE_ERROR -1
-#define TOKENIZE_ERROR_REPORT -2
+#define TOKENIZE_ERROR -1
+#define TOKENIZE_ERROR_REPORT -2
+#define MAX_INSN_FIXUPS 2
+#define MAX_INSN_ARGS 5
-#define MAX_INSN_FIXUPS 2
-#define MAX_INSN_ARGS 5
-
-struct alpha_fixup {
+struct alpha_fixup
+{
expressionS exp;
bfd_reloc_code_real_type reloc;
};
-struct alpha_insn {
+struct alpha_insn
+{
unsigned insn;
int nfixups;
struct alpha_fixup fixups[MAX_INSN_FIXUPS];
- unsigned sequence[MAX_INSN_FIXUPS];
+ long sequence;
};
-enum alpha_macro_arg {
- MACRO_EOA = 1,
- MACRO_IR,
- MACRO_PIR,
- MACRO_OPIR,
- MACRO_CPIR,
- MACRO_FPR,
- MACRO_EXP,
- MACRO_LITERAL,
- MACRO_BASE,
- MACRO_BYTOFF,
- MACRO_JSR
-};
+enum alpha_macro_arg
+ {
+ MACRO_EOA = 1,
+ MACRO_IR,
+ MACRO_PIR,
+ MACRO_OPIR,
+ MACRO_CPIR,
+ MACRO_FPR,
+ MACRO_EXP,
+ };
-struct alpha_macro {
+struct alpha_macro
+{
const char *name;
- void (*emit) PARAMS ((const expressionS *, int, const PTR));
- const PTR arg;
+ void (*emit) (const expressionS *, int, const void *);
+ const void * arg;
enum alpha_macro_arg argsets[16];
};
/* Extra expression types. */
-#define O_pregister O_md1 /* O_register, in parentheses */
-#define O_cpregister O_md2 /* + a leading comma */
-
-#ifdef RELOC_OP_P
-/* Note, the alpha_reloc_op table below depends on the ordering
- of O_literal .. O_gprelow. */
-#define O_literal O_md3 /* !literal relocation */
-#define O_lituse_base O_md4 /* !lituse_base relocation */
-#define O_lituse_bytoff O_md5 /* !lituse_bytoff relocation */
-#define O_lituse_jsr O_md6 /* !lituse_jsr relocation */
-#define O_gpdisp O_md7 /* !gpdisp relocation */
-#define O_gprelhigh O_md8 /* !gprelhigh relocation */
-#define O_gprellow O_md9 /* !gprellow relocation */
-
-#define USER_RELOC_P(R) ((R) >= O_literal && (R) <= O_gprellow)
-#endif
-
-/* Macros for extracting the type and number of encoded register tokens */
+#define O_pregister O_md1 /* O_register, in parentheses. */
+#define O_cpregister O_md2 /* + a leading comma. */
+
+/* The alpha_reloc_op table below depends on the ordering of these. */
+#define O_literal O_md3 /* !literal relocation. */
+#define O_lituse_addr O_md4 /* !lituse_addr relocation. */
+#define O_lituse_base O_md5 /* !lituse_base relocation. */
+#define O_lituse_bytoff O_md6 /* !lituse_bytoff relocation. */
+#define O_lituse_jsr O_md7 /* !lituse_jsr relocation. */
+#define O_lituse_tlsgd O_md8 /* !lituse_tlsgd relocation. */
+#define O_lituse_tlsldm O_md9 /* !lituse_tlsldm relocation. */
+#define O_gpdisp O_md10 /* !gpdisp relocation. */
+#define O_gprelhigh O_md11 /* !gprelhigh relocation. */
+#define O_gprellow O_md12 /* !gprellow relocation. */
+#define O_gprel O_md13 /* !gprel relocation. */
+#define O_samegp O_md14 /* !samegp relocation. */
+#define O_tlsgd O_md15 /* !tlsgd relocation. */
+#define O_tlsldm O_md16 /* !tlsldm relocation. */
+#define O_gotdtprel O_md17 /* !gotdtprel relocation. */
+#define O_dtprelhi O_md18 /* !dtprelhi relocation. */
+#define O_dtprello O_md19 /* !dtprello relocation. */
+#define O_dtprel O_md20 /* !dtprel relocation. */
+#define O_gottprel O_md21 /* !gottprel relocation. */
+#define O_tprelhi O_md22 /* !tprelhi relocation. */
+#define O_tprello O_md23 /* !tprello relocation. */
+#define O_tprel O_md24 /* !tprel relocation. */
+
+#define DUMMY_RELOC_LITUSE_ADDR (BFD_RELOC_UNUSED + 1)
+#define DUMMY_RELOC_LITUSE_BASE (BFD_RELOC_UNUSED + 2)
+#define DUMMY_RELOC_LITUSE_BYTOFF (BFD_RELOC_UNUSED + 3)
+#define DUMMY_RELOC_LITUSE_JSR (BFD_RELOC_UNUSED + 4)
+#define DUMMY_RELOC_LITUSE_TLSGD (BFD_RELOC_UNUSED + 5)
+#define DUMMY_RELOC_LITUSE_TLSLDM (BFD_RELOC_UNUSED + 6)
+
+#define USER_RELOC_P(R) ((R) >= O_literal && (R) <= O_tprel)
+
+/* Macros for extracting the type and number of encoded register tokens. */
#define is_ir_num(x) (((x) & 32) == 0)
#define is_fpr_num(x) (((x) & 32) != 0)
#define regno(x) ((x) & 31)
-/* Something odd inherited from the old assembler */
+/* Something odd inherited from the old assembler. */
#define note_gpreg(R) (alpha_gprmask |= (1 << (R)))
#define note_fpreg(R) (alpha_fprmask |= (1 << (R)))
^ 0x80000000) - 0x80000000)
#endif
-/* Macros to build tokens */
+/* Macros to build tokens. */
#define set_tok_reg(t, r) (memset (&(t), 0, sizeof (t)), \
(t).X_op = O_register, \
(t).X_op = O_constant, \
(t).X_add_number = (n))
\f
-/* Prototypes for all local functions */
-
-static int tokenize_arguments PARAMS ((char *, expressionS *, int));
-static const struct alpha_opcode *find_opcode_match
- PARAMS ((const struct alpha_opcode *, const expressionS *, int *, int *));
-static const struct alpha_macro *find_macro_match
- PARAMS ((const struct alpha_macro *, const expressionS *, int *));
-static unsigned insert_operand
- PARAMS ((unsigned, const struct alpha_operand *, offsetT, char *, unsigned));
-static void assemble_insn
- PARAMS ((const struct alpha_opcode *, const expressionS *, int,
- struct alpha_insn *));
-static void emit_insn PARAMS ((struct alpha_insn *));
-static void assemble_tokens_to_insn
- PARAMS ((const char *, const expressionS *, int, struct alpha_insn *));
-static void assemble_tokens
- PARAMS ((const char *, const expressionS *, int, int));
-
-static int load_expression
- PARAMS ((int, const expressionS *, int *, expressionS *,
- const expressionS *));
-
-static void emit_ldgp PARAMS ((const expressionS *, int, const PTR));
-static void emit_division PARAMS ((const expressionS *, int, const PTR));
-static void emit_lda PARAMS ((const expressionS *, int, const PTR));
-static void emit_ldah PARAMS ((const expressionS *, int, const PTR));
-static void emit_ir_load PARAMS ((const expressionS *, int, const PTR));
-static void emit_loadstore PARAMS ((const expressionS *, int, const PTR));
-static void emit_jsrjmp PARAMS ((const expressionS *, int, const PTR));
-static void emit_ldX PARAMS ((const expressionS *, int, const PTR));
-static void emit_ldXu PARAMS ((const expressionS *, int, const PTR));
-static void emit_uldX PARAMS ((const expressionS *, int, const PTR));
-static void emit_uldXu PARAMS ((const expressionS *, int, const PTR));
-static void emit_ldil PARAMS ((const expressionS *, int, const PTR));
-static void emit_stX PARAMS ((const expressionS *, int, const PTR));
-static void emit_ustX PARAMS ((const expressionS *, int, const PTR));
-static void emit_sextX PARAMS ((const expressionS *, int, const PTR));
-static void emit_retjcr PARAMS ((const expressionS *, int, const PTR));
-
-static void s_alpha_text PARAMS ((int));
-static void s_alpha_data PARAMS ((int));
-#ifndef OBJ_ELF
-static void s_alpha_comm PARAMS ((int));
-static void s_alpha_rdata PARAMS ((int));
-#endif
-#ifdef OBJ_ECOFF
-static void s_alpha_sdata PARAMS ((int));
-#endif
-#ifdef OBJ_ELF
-static void s_alpha_section PARAMS ((int));
-static void s_alpha_ent PARAMS ((int));
-static void s_alpha_end PARAMS ((int));
-static void s_alpha_mask PARAMS ((int));
-static void s_alpha_frame PARAMS ((int));
-static void s_alpha_prologue PARAMS ((int));
-static void s_alpha_file PARAMS ((int));
-static void s_alpha_loc PARAMS ((int));
-static void s_alpha_stab PARAMS ((int));
-static void s_alpha_coff_wrapper PARAMS ((int));
-#endif
-#ifdef OBJ_EVAX
-static void s_alpha_section PARAMS ((int));
-#endif
-static void s_alpha_gprel32 PARAMS ((int));
-static void s_alpha_float_cons PARAMS ((int));
-static void s_alpha_proc PARAMS ((int));
-static void s_alpha_set PARAMS ((int));
-static void s_alpha_base PARAMS ((int));
-static void s_alpha_align PARAMS ((int));
-static void s_alpha_stringer PARAMS ((int));
-static void s_alpha_space PARAMS ((int));
-
-static void create_literal_section PARAMS ((const char *, segT *, symbolS **));
-#ifndef OBJ_ELF
-static void select_gp_value PARAMS ((void));
-#endif
-static void alpha_align PARAMS ((int, char *, symbolS *, int));
-
-#ifdef RELOC_OP_P
-static void alpha_adjust_symtab_relocs PARAMS ((bfd *, asection *, PTR));
-#endif
-\f
/* Generic assembler global variables which must be defined by all
targets. */
/* Characters which mean that a number is a floating point constant,
as in 0d1.0. */
-#if 0
-const char FLT_CHARS[] = "dD";
-#else
/* XXX: Do all of these really get used on the alpha?? */
char FLT_CHARS[] = "rRsSfFdDxXpP";
-#endif
#ifdef OBJ_EVAX
const char *md_shortopts = "Fm:g+1h:HG:";
const char *md_shortopts = "Fm:gG:";
#endif
-struct option md_longopts[] = {
+struct option md_longopts[] =
+ {
#define OPTION_32ADDR (OPTION_MD_BASE)
- { "32addr", no_argument, NULL, OPTION_32ADDR },
+ { "32addr", no_argument, NULL, OPTION_32ADDR },
#define OPTION_RELAX (OPTION_32ADDR + 1)
- { "relax", no_argument, NULL, OPTION_RELAX },
+ { "relax", no_argument, NULL, OPTION_RELAX },
#ifdef OBJ_ELF
#define OPTION_MDEBUG (OPTION_RELAX + 1)
#define OPTION_NO_MDEBUG (OPTION_MDEBUG + 1)
- { "mdebug", no_argument, NULL, OPTION_MDEBUG },
- { "no-mdebug", no_argument, NULL, OPTION_NO_MDEBUG },
+ { "mdebug", no_argument, NULL, OPTION_MDEBUG },
+ { "no-mdebug", no_argument, NULL, OPTION_NO_MDEBUG },
#endif
- { NULL, no_argument, NULL, 0 }
-};
+ { NULL, no_argument, NULL, 0 }
+ };
size_t md_longopts_size = sizeof (md_longopts);
\f
#define AXP_REG_GP AXP_REG_PV
#endif /* OBJ_EVAX */
-/* The cpu for which we are generating code */
+/* The cpu for which we are generating code. */
static unsigned alpha_target = AXP_OPCODE_BASE;
static const char *alpha_target_name = "<all>";
-/* The hash table of instruction opcodes */
+/* The hash table of instruction opcodes. */
static struct hash_control *alpha_opcode_hash;
-/* The hash table of macro opcodes */
+/* The hash table of macro opcodes. */
static struct hash_control *alpha_macro_hash;
#ifdef OBJ_ECOFF
-/* The $gp relocation symbol */
+/* The $gp relocation symbol. */
static symbolS *alpha_gp_symbol;
/* XXX: what is this, and why is it exported? */
valueT alpha_gp_value;
#endif
-/* The current $gp register */
+/* The current $gp register. */
static int alpha_gp_register = AXP_REG_GP;
-/* A table of the register symbols */
+/* A table of the register symbols. */
static symbolS *alpha_register_table[64];
-/* Constant sections, or sections of constants */
+/* Constant sections, or sections of constants. */
#ifdef OBJ_ECOFF
static segT alpha_lita_section;
-static segT alpha_lit4_section;
#endif
#ifdef OBJ_EVAX
static segT alpha_link_section;
/* Symbols referring to said sections. */
#ifdef OBJ_ECOFF
static symbolS *alpha_lita_symbol;
-static symbolS *alpha_lit4_symbol;
#endif
#ifdef OBJ_EVAX
static symbolS *alpha_link_symbol;
#endif
static symbolS *alpha_lit8_symbol;
-/* Literal for .litX+0x8000 within .lita */
+/* Literal for .litX+0x8000 within .lita. */
#ifdef OBJ_ECOFF
-static offsetT alpha_lit4_literal;
static offsetT alpha_lit8_literal;
#endif
-#ifdef OBJ_ELF
-/* The active .ent symbol. */
-static symbolS *alpha_cur_ent_sym;
-#endif
-
-/* Is the assembler not allowed to use $at? */
+/* Is the assembler not allowed to use $at? */
static int alpha_noat_on = 0;
-/* Are macros enabled? */
+/* Are macros enabled? */
static int alpha_macros_on = 1;
-/* Are floats disabled? */
+/* Are floats disabled? */
static int alpha_nofloats_on = 0;
-/* Are addresses 32 bit? */
+/* Are addresses 32 bit? */
static int alpha_addr32_on = 0;
/* Symbol labelling the current insn. When the Alpha gas sees
#ifdef OBJ_EVAX
/* Collect information about current procedure here. */
-static struct {
- symbolS *symbol; /* proc pdesc symbol */
+static struct
+{
+ symbolS *symbol; /* Proc pdesc symbol. */
int pdsckind;
- int framereg; /* register for frame pointer */
- int framesize; /* size of frame */
+ int framereg; /* Register for frame pointer. */
+ int framesize; /* Size of frame. */
int rsa_offset;
int ra_save;
int fp_save;
static int alpha_flag_show_after_trunc = 0; /* -H */
/* If the -+ switch is given, then a hash is appended to any name that is
- * longer than 64 characters, else longer symbol names are truncated.
- */
+ longer than 64 characters, else longer symbol names are truncated. */
#endif
\f
that op-O_literal indexes into it. */
#define ALPHA_RELOC_TABLE(op) \
-&alpha_reloc_op[ ((!USER_RELOC_P (op)) \
+(&alpha_reloc_op[ ((!USER_RELOC_P (op)) \
? (abort (), 0) \
- : (int) (op) - (int) O_literal) ]
-
-#define LITUSE_BASE 1
-#define LITUSE_BYTOFF 2
-#define LITUSE_JSR 3
-
-static const struct alpha_reloc_op_tag {
- const char *name; /* string to lookup */
- size_t length; /* size of the string */
- bfd_reloc_code_real_type reloc; /* relocation before frob */
- operatorT op; /* which operator to use */
- int lituse; /* addened to specify lituse */
-} alpha_reloc_op[] = {
-
- {
- "literal", /* name */
- sizeof ("literal")-1, /* length */
- BFD_RELOC_ALPHA_USER_LITERAL, /* reloc */
- O_literal, /* op */
- 0, /* lituse */
- },
-
- {
- "lituse_base", /* name */
- sizeof ("lituse_base")-1, /* length */
- BFD_RELOC_ALPHA_USER_LITUSE_BASE, /* reloc */
- O_lituse_base, /* op */
- LITUSE_BASE, /* lituse */
- },
-
- {
- "lituse_bytoff", /* name */
- sizeof ("lituse_bytoff")-1, /* length */
- BFD_RELOC_ALPHA_USER_LITUSE_BYTOFF, /* reloc */
- O_lituse_bytoff, /* op */
- LITUSE_BYTOFF, /* lituse */
- },
-
- {
- "lituse_jsr", /* name */
- sizeof ("lituse_jsr")-1, /* length */
- BFD_RELOC_ALPHA_USER_LITUSE_JSR, /* reloc */
- O_lituse_jsr, /* op */
- LITUSE_JSR, /* lituse */
- },
+ : (int) (op) - (int) O_literal) ])
- {
- "gpdisp", /* name */
- sizeof ("gpdisp")-1, /* length */
- BFD_RELOC_ALPHA_USER_GPDISP, /* reloc */
- O_gpdisp, /* op */
- 0, /* lituse */
- },
-
- {
- "gprelhigh", /* name */
- sizeof ("gprelhigh")-1, /* length */
- BFD_RELOC_ALPHA_USER_GPRELHIGH, /* reloc */
- O_gprelhigh, /* op */
- 0, /* lituse */
- },
+#define DEF(NAME, RELOC, REQ, ALLOW) \
+ { #NAME, sizeof(#NAME)-1, O_##NAME, RELOC, REQ, ALLOW}
- {
- "gprellow", /* name */
- sizeof ("gprellow")-1, /* length */
- BFD_RELOC_ALPHA_USER_GPRELLOW, /* reloc */
- O_gprellow, /* op */
- 0, /* lituse */
- },
+static const struct alpha_reloc_op_tag
+{
+ const char *name; /* String to lookup. */
+ size_t length; /* Size of the string. */
+ operatorT op; /* Which operator to use. */
+ bfd_reloc_code_real_type reloc; /* Relocation before frob. */
+ unsigned int require_seq : 1; /* Require a sequence number. */
+ unsigned int allow_seq : 1; /* Allow a sequence number. */
+}
+alpha_reloc_op[] =
+{
+ DEF (literal, BFD_RELOC_ALPHA_ELF_LITERAL, 0, 1),
+ DEF (lituse_addr, DUMMY_RELOC_LITUSE_ADDR, 1, 1),
+ DEF (lituse_base, DUMMY_RELOC_LITUSE_BASE, 1, 1),
+ DEF (lituse_bytoff, DUMMY_RELOC_LITUSE_BYTOFF, 1, 1),
+ DEF (lituse_jsr, DUMMY_RELOC_LITUSE_JSR, 1, 1),
+ DEF (lituse_tlsgd, DUMMY_RELOC_LITUSE_TLSGD, 1, 1),
+ DEF (lituse_tlsldm, DUMMY_RELOC_LITUSE_TLSLDM, 1, 1),
+ DEF (gpdisp, BFD_RELOC_ALPHA_GPDISP, 1, 1),
+ DEF (gprelhigh, BFD_RELOC_ALPHA_GPREL_HI16, 0, 0),
+ DEF (gprellow, BFD_RELOC_ALPHA_GPREL_LO16, 0, 0),
+ DEF (gprel, BFD_RELOC_GPREL16, 0, 0),
+ DEF (samegp, BFD_RELOC_ALPHA_BRSGP, 0, 0),
+ DEF (tlsgd, BFD_RELOC_ALPHA_TLSGD, 0, 1),
+ DEF (tlsldm, BFD_RELOC_ALPHA_TLSLDM, 0, 1),
+ DEF (gotdtprel, BFD_RELOC_ALPHA_GOTDTPREL16, 0, 0),
+ DEF (dtprelhi, BFD_RELOC_ALPHA_DTPREL_HI16, 0, 0),
+ DEF (dtprello, BFD_RELOC_ALPHA_DTPREL_LO16, 0, 0),
+ DEF (dtprel, BFD_RELOC_ALPHA_DTPREL16, 0, 0),
+ DEF (gottprel, BFD_RELOC_ALPHA_GOTTPREL16, 0, 0),
+ DEF (tprelhi, BFD_RELOC_ALPHA_TPREL_HI16, 0, 0),
+ DEF (tprello, BFD_RELOC_ALPHA_TPREL_LO16, 0, 0),
+ DEF (tprel, BFD_RELOC_ALPHA_TPREL16, 0, 0),
};
+#undef DEF
+
static const int alpha_num_reloc_op
= sizeof (alpha_reloc_op) / sizeof (*alpha_reloc_op);
+#endif /* RELOC_OP_P */
-/* Maximum # digits needed to hold the largest sequence # */
+/* Maximum # digits needed to hold the largest sequence #. */
#define ALPHA_RELOC_DIGITS 25
-/* Whether a sequence number is valid. */
-#define ALPHA_RELOC_SEQUENCE_OK(X) ((X) > 0 && ((unsigned) (X)) == (X))
-
-/* Structure to hold explict sequence information. */
-struct alpha_literal_tag
+/* Structure to hold explicit sequence information. */
+struct alpha_reloc_tag
{
- fixS *lituse; /* head of linked list of !literals */
- segT segment; /* segment relocs are in or undefined_section*/
- int multi_section_p; /* True if more than one section was used */
- unsigned sequence; /* sequence # */
- unsigned n_literals; /* # of literals */
- unsigned n_lituses; /* # of lituses */
- char string[1]; /* printable form of sequence to hash with */
+ fixS *master; /* The literal reloc. */
+ fixS *slaves; /* Head of linked list of lituses. */
+ segT segment; /* Segment relocs are in or undefined_section. */
+ long sequence; /* Sequence #. */
+ unsigned n_master; /* # of literals. */
+ unsigned n_slaves; /* # of lituses. */
+ unsigned saw_tlsgd : 1; /* True if ... */
+ unsigned saw_tlsldm : 1;
+ unsigned saw_lu_tlsgd : 1;
+ unsigned saw_lu_tlsldm : 1;
+ unsigned multi_section_p : 1; /* True if more than one section was used. */
+ char string[1]; /* Printable form of sequence to hash with. */
};
-/* Hash table to link up literals with the appropriate lituse */
+/* Hash table to link up literals with the appropriate lituse. */
static struct hash_control *alpha_literal_hash;
-#endif
+
+/* Sequence numbers for internal use by macros. */
+static long next_sequence_num = -1;
\f
/* A table of CPU names and opcode sets. */
-static const struct cpu_type {
+static const struct cpu_type
+{
const char *name;
unsigned flags;
-} cpu_types[] = {
+}
+cpu_types[] =
+{
/* Ad hoc convention: cpu number gets palcode, process code doesn't.
This supports usage under DU 4.0b that does ".arch ev4", and
usage in MILO that does -m21064. Probably something more
|AXP_OPCODE_MAX) },
{ "21264", (AXP_OPCODE_BASE|AXP_OPCODE_EV6|AXP_OPCODE_BWX
|AXP_OPCODE_MAX|AXP_OPCODE_CIX) },
+ { "21264a", (AXP_OPCODE_BASE|AXP_OPCODE_EV6|AXP_OPCODE_BWX
+ |AXP_OPCODE_MAX|AXP_OPCODE_CIX) },
+ { "21264b", (AXP_OPCODE_BASE|AXP_OPCODE_EV6|AXP_OPCODE_BWX
+ |AXP_OPCODE_MAX|AXP_OPCODE_CIX) },
{ "ev4", AXP_OPCODE_BASE },
{ "ev45", AXP_OPCODE_BASE },
{ "ev56", AXP_OPCODE_BASE|AXP_OPCODE_BWX },
{ "pca56", AXP_OPCODE_BASE|AXP_OPCODE_BWX|AXP_OPCODE_MAX },
{ "ev6", AXP_OPCODE_BASE|AXP_OPCODE_BWX|AXP_OPCODE_MAX|AXP_OPCODE_CIX },
+ { "ev67", AXP_OPCODE_BASE|AXP_OPCODE_BWX|AXP_OPCODE_MAX|AXP_OPCODE_CIX },
+ { "ev68", AXP_OPCODE_BASE|AXP_OPCODE_BWX|AXP_OPCODE_MAX|AXP_OPCODE_CIX },
{ "all", AXP_OPCODE_BASE },
{ 0, 0 }
};
-/* The macro table */
+/* Some instruction sets indexed by lg(size). */
+static const char * const sextX_op[] = { "sextb", "sextw", "sextl", NULL };
+static const char * const insXl_op[] = { "insbl", "inswl", "insll", "insql" };
+static const char * const insXh_op[] = { NULL, "inswh", "inslh", "insqh" };
+static const char * const extXl_op[] = { "extbl", "extwl", "extll", "extql" };
+static const char * const extXh_op[] = { NULL, "extwh", "extlh", "extqh" };
+static const char * const mskXl_op[] = { "mskbl", "mskwl", "mskll", "mskql" };
+static const char * const mskXh_op[] = { NULL, "mskwh", "msklh", "mskqh" };
+static const char * const stX_op[] = { "stb", "stw", "stl", "stq" };
+static const char * const ldXu_op[] = { "ldbu", "ldwu", NULL, NULL };
-static const struct alpha_macro alpha_macros[] = {
-/* Load/Store macros */
- { "lda", emit_lda, NULL,
- { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_LITERAL, MACRO_BASE, MACRO_EOA } },
- { "ldah", emit_ldah, NULL,
- { MACRO_IR, MACRO_EXP, MACRO_EOA } },
+static void assemble_insn (const struct alpha_opcode *, const expressionS *, int, struct alpha_insn *, bfd_reloc_code_real_type);
+static void emit_insn (struct alpha_insn *);
+static void assemble_tokens (const char *, const expressionS *, int, int);
+\f
+static struct alpha_reloc_tag *
+get_alpha_reloc_tag (long sequence)
+{
+ char buffer[ALPHA_RELOC_DIGITS];
+ struct alpha_reloc_tag *info;
- { "ldl", emit_ir_load, "ldl",
- { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_BASE, MACRO_EOA } },
- { "ldl_l", emit_ir_load, "ldl_l",
- { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_BASE, MACRO_EOA } },
- { "ldq", emit_ir_load, "ldq",
- { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_BASE, MACRO_LITERAL, MACRO_EOA } },
- { "ldq_l", emit_ir_load, "ldq_l",
- { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_BASE, MACRO_EOA } },
- { "ldq_u", emit_ir_load, "ldq_u",
- { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_BASE, MACRO_EOA } },
- { "ldf", emit_loadstore, "ldf",
- { MACRO_FPR, MACRO_EXP, MACRO_OPIR, MACRO_BASE, MACRO_EOA } },
- { "ldg", emit_loadstore, "ldg",
- { MACRO_FPR, MACRO_EXP, MACRO_OPIR, MACRO_BASE, MACRO_EOA } },
- { "lds", emit_loadstore, "lds",
- { MACRO_FPR, MACRO_EXP, MACRO_OPIR, MACRO_BASE, MACRO_EOA } },
- { "ldt", emit_loadstore, "ldt",
- { MACRO_FPR, MACRO_EXP, MACRO_OPIR, MACRO_BASE, MACRO_EOA } },
-
- { "ldb", emit_ldX, (PTR) 0,
- { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_BASE, MACRO_EOA } },
- { "ldbu", emit_ldXu, (PTR) 0,
- { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_BASE, MACRO_EOA } },
- { "ldw", emit_ldX, (PTR) 1,
- { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_BASE, MACRO_EOA } },
- { "ldwu", emit_ldXu, (PTR) 1,
- { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_BASE, MACRO_EOA } },
-
- { "uldw", emit_uldX, (PTR) 1,
- { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_BASE, MACRO_EOA } },
- { "uldwu", emit_uldXu, (PTR) 1,
- { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_BASE, MACRO_EOA } },
- { "uldl", emit_uldX, (PTR) 2,
- { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_BASE, MACRO_EOA } },
- { "uldlu", emit_uldXu, (PTR) 2,
- { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_BASE, MACRO_EOA } },
- { "uldq", emit_uldXu, (PTR) 3,
- { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_BASE, MACRO_EOA } },
+ sprintf (buffer, "!%ld", sequence);
- { "ldgp", emit_ldgp, NULL,
- { MACRO_IR, MACRO_EXP, MACRO_PIR, MACRO_EOA } },
+ info = (struct alpha_reloc_tag *) hash_find (alpha_literal_hash, buffer);
+ if (! info)
+ {
+ size_t len = strlen (buffer);
+ const char *errmsg;
- { "ldi", emit_lda, NULL,
- { MACRO_IR, MACRO_EXP, MACRO_EOA } },
- { "ldil", emit_ldil, NULL,
- { MACRO_IR, MACRO_EXP, MACRO_EOA } },
- { "ldiq", emit_lda, NULL,
- { MACRO_IR, MACRO_EXP, MACRO_EOA } },
-#if 0
- { "ldif" emit_ldiq, NULL,
- { MACRO_FPR, MACRO_EXP, MACRO_EOA } },
- { "ldid" emit_ldiq, NULL,
- { MACRO_FPR, MACRO_EXP, MACRO_EOA } },
- { "ldig" emit_ldiq, NULL,
- { MACRO_FPR, MACRO_EXP, MACRO_EOA } },
- { "ldis" emit_ldiq, NULL,
- { MACRO_FPR, MACRO_EXP, MACRO_EOA } },
- { "ldit" emit_ldiq, NULL,
- { MACRO_FPR, MACRO_EXP, MACRO_EOA } },
-#endif
+ info = xcalloc (sizeof (struct alpha_reloc_tag) + len, 1);
- { "stl", emit_loadstore, "stl",
- { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_BASE, MACRO_EOA } },
- { "stl_c", emit_loadstore, "stl_c",
- { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_BASE, MACRO_EOA } },
- { "stq", emit_loadstore, "stq",
- { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_BASE, MACRO_EOA } },
- { "stq_c", emit_loadstore, "stq_c",
- { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_BASE, MACRO_EOA } },
- { "stq_u", emit_loadstore, "stq_u",
- { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_BASE, MACRO_EOA } },
- { "stf", emit_loadstore, "stf",
- { MACRO_FPR, MACRO_EXP, MACRO_OPIR, MACRO_BASE, MACRO_EOA } },
- { "stg", emit_loadstore, "stg",
- { MACRO_FPR, MACRO_EXP, MACRO_OPIR, MACRO_BASE, MACRO_EOA } },
- { "sts", emit_loadstore, "sts",
- { MACRO_FPR, MACRO_EXP, MACRO_OPIR, MACRO_BASE, MACRO_EOA } },
- { "stt", emit_loadstore, "stt",
- { MACRO_FPR, MACRO_EXP, MACRO_OPIR, MACRO_BASE, MACRO_EOA } },
-
- { "stb", emit_stX, (PTR) 0,
- { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_BASE, MACRO_EOA } },
- { "stw", emit_stX, (PTR) 1,
- { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_BASE, MACRO_EOA } },
- { "ustw", emit_ustX, (PTR) 1,
- { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_BASE, MACRO_EOA } },
- { "ustl", emit_ustX, (PTR) 2,
- { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_BASE, MACRO_EOA } },
- { "ustq", emit_ustX, (PTR) 3,
- { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_BASE, MACRO_EOA } },
-
-/* Arithmetic macros */
-#if 0
- { "absl" emit_absl, 1, { IR } },
- { "absl" emit_absl, 2, { IR, IR } },
- { "absl" emit_absl, 2, { EXP, IR } },
- { "absq" emit_absq, 1, { IR } },
- { "absq" emit_absq, 2, { IR, IR } },
- { "absq" emit_absq, 2, { EXP, IR } },
-#endif
+ info->segment = now_seg;
+ info->sequence = sequence;
+ strcpy (info->string, buffer);
+ errmsg = hash_insert (alpha_literal_hash, info->string, (void *) info);
+ if (errmsg)
+ as_fatal (errmsg);
+ }
- { "sextb", emit_sextX, (PTR) 0,
- { MACRO_IR, MACRO_IR, MACRO_EOA,
- MACRO_IR, MACRO_EOA,
- /* MACRO_EXP, MACRO_IR, MACRO_EOA */ } },
- { "sextw", emit_sextX, (PTR) 1,
- { MACRO_IR, MACRO_IR, MACRO_EOA,
- MACRO_IR, MACRO_EOA,
- /* MACRO_EXP, MACRO_IR, MACRO_EOA */ } },
+ return info;
+}
- { "divl", emit_division, "__divl",
- { MACRO_IR, MACRO_IR, MACRO_IR, MACRO_EOA,
- MACRO_IR, MACRO_IR, MACRO_EOA,
- /* MACRO_IR, MACRO_EXP, MACRO_IR, MACRO_EOA,
- MACRO_IR, MACRO_EXP, MACRO_EOA */ } },
- { "divlu", emit_division, "__divlu",
- { MACRO_IR, MACRO_IR, MACRO_IR, MACRO_EOA,
- MACRO_IR, MACRO_IR, MACRO_EOA,
- /* MACRO_IR, MACRO_EXP, MACRO_IR, MACRO_EOA,
- MACRO_IR, MACRO_EXP, MACRO_EOA */ } },
- { "divq", emit_division, "__divq",
- { MACRO_IR, MACRO_IR, MACRO_IR, MACRO_EOA,
- MACRO_IR, MACRO_IR, MACRO_EOA,
- /* MACRO_IR, MACRO_EXP, MACRO_IR, MACRO_EOA,
- MACRO_IR, MACRO_EXP, MACRO_EOA */ } },
- { "divqu", emit_division, "__divqu",
- { MACRO_IR, MACRO_IR, MACRO_IR, MACRO_EOA,
- MACRO_IR, MACRO_IR, MACRO_EOA,
- /* MACRO_IR, MACRO_EXP, MACRO_IR, MACRO_EOA,
- MACRO_IR, MACRO_EXP, MACRO_EOA */ } },
- { "reml", emit_division, "__reml",
- { MACRO_IR, MACRO_IR, MACRO_IR, MACRO_EOA,
- MACRO_IR, MACRO_IR, MACRO_EOA,
- /* MACRO_IR, MACRO_EXP, MACRO_IR, MACRO_EOA,
- MACRO_IR, MACRO_EXP, MACRO_EOA */ } },
- { "remlu", emit_division, "__remlu",
- { MACRO_IR, MACRO_IR, MACRO_IR, MACRO_EOA,
- MACRO_IR, MACRO_IR, MACRO_EOA,
- /* MACRO_IR, MACRO_EXP, MACRO_IR, MACRO_EOA,
- MACRO_IR, MACRO_EXP, MACRO_EOA */ } },
- { "remq", emit_division, "__remq",
- { MACRO_IR, MACRO_IR, MACRO_IR, MACRO_EOA,
- MACRO_IR, MACRO_IR, MACRO_EOA,
- /* MACRO_IR, MACRO_EXP, MACRO_IR, MACRO_EOA,
- MACRO_IR, MACRO_EXP, MACRO_EOA */ } },
- { "remqu", emit_division, "__remqu",
- { MACRO_IR, MACRO_IR, MACRO_IR, MACRO_EOA,
- MACRO_IR, MACRO_IR, MACRO_EOA,
- /* MACRO_IR, MACRO_EXP, MACRO_IR, MACRO_EOA,
- MACRO_IR, MACRO_EXP, MACRO_EOA */ } },
+static void
+alpha_adjust_relocs (bfd *abfd ATTRIBUTE_UNUSED,
+ asection *sec,
+ void * ptr ATTRIBUTE_UNUSED)
+{
+ segment_info_type *seginfo = seg_info (sec);
+ fixS **prevP;
+ fixS *fixp;
+ fixS *next;
+ fixS *slave;
- { "jsr", emit_jsrjmp, "jsr",
- { MACRO_PIR, MACRO_EXP, MACRO_JSR, MACRO_EOA,
- MACRO_PIR, MACRO_JSR, MACRO_EOA,
- MACRO_IR, MACRO_EXP, MACRO_JSR, MACRO_EOA,
- MACRO_EXP, MACRO_JSR, MACRO_EOA } },
- { "jmp", emit_jsrjmp, "jmp",
- { MACRO_PIR, MACRO_EXP, MACRO_JSR, MACRO_EOA,
- MACRO_PIR, MACRO_JSR, MACRO_EOA,
- MACRO_IR, MACRO_EXP, MACRO_JSR, MACRO_EOA,
- MACRO_EXP, MACRO_JSR, MACRO_EOA } },
- { "ret", emit_retjcr, "ret",
- { MACRO_IR, MACRO_EXP, MACRO_EOA,
- MACRO_IR, MACRO_EOA,
- MACRO_PIR, MACRO_EXP, MACRO_EOA,
- MACRO_PIR, MACRO_EOA,
- MACRO_EXP, MACRO_EOA,
- MACRO_EOA } },
- { "jcr", emit_retjcr, "jcr",
- { MACRO_IR, MACRO_EXP, MACRO_EOA,
- MACRO_IR, MACRO_EOA,
- MACRO_PIR, MACRO_EXP, MACRO_EOA,
- MACRO_PIR, MACRO_EOA,
- MACRO_EXP, MACRO_EOA,
- MACRO_EOA } },
- { "jsr_coroutine", emit_retjcr, "jcr",
- { MACRO_IR, MACRO_EXP, MACRO_EOA,
- MACRO_IR, MACRO_EOA,
- MACRO_PIR, MACRO_EXP, MACRO_EOA,
- MACRO_PIR, MACRO_EOA,
- MACRO_EXP, MACRO_EOA,
- MACRO_EOA } },
-};
+ /* If seginfo is NULL, we did not create this section; don't do
+ anything with it. By using a pointer to a pointer, we can update
+ the links in place. */
+ if (seginfo == NULL)
+ return;
-static const unsigned int alpha_num_macros
- = sizeof (alpha_macros) / sizeof (*alpha_macros);
-\f
-/* Public interface functions */
+ /* If there are no relocations, skip the section. */
+ if (! seginfo->fix_root)
+ return;
-/* This function is called once, at assembler startup time. It sets
- up all the tables, etc. that the MD part of the assembler will
- need, that can be determined before arguments are parsed. */
+ /* First rebuild the fixup chain without the explicit lituse and
+ gpdisp_lo16 relocs. */
+ prevP = &seginfo->fix_root;
+ for (fixp = seginfo->fix_root; fixp; fixp = next)
+ {
+ next = fixp->fx_next;
+ fixp->fx_next = (fixS *) 0;
-void
-md_begin ()
-{
- unsigned int i;
+ switch (fixp->fx_r_type)
+ {
+ case BFD_RELOC_ALPHA_LITUSE:
+ if (fixp->tc_fix_data.info->n_master == 0)
+ as_bad_where (fixp->fx_file, fixp->fx_line,
+ _("No !literal!%ld was found"),
+ fixp->tc_fix_data.info->sequence);
+#ifdef RELOC_OP_P
+ if (fixp->fx_offset == LITUSE_ALPHA_TLSGD)
+ {
+ if (! fixp->tc_fix_data.info->saw_tlsgd)
+ as_bad_where (fixp->fx_file, fixp->fx_line,
+ _("No !tlsgd!%ld was found"),
+ fixp->tc_fix_data.info->sequence);
+ }
+ else if (fixp->fx_offset == LITUSE_ALPHA_TLSLDM)
+ {
+ if (! fixp->tc_fix_data.info->saw_tlsldm)
+ as_bad_where (fixp->fx_file, fixp->fx_line,
+ _("No !tlsldm!%ld was found"),
+ fixp->tc_fix_data.info->sequence);
+ }
+#endif
+ break;
- /* Verify that X_op field is wide enough. */
- {
- expressionS e;
- e.X_op = O_max;
- assert (e.X_op == O_max);
- }
+ case BFD_RELOC_ALPHA_GPDISP_LO16:
+ if (fixp->tc_fix_data.info->n_master == 0)
+ as_bad_where (fixp->fx_file, fixp->fx_line,
+ _("No ldah !gpdisp!%ld was found"),
+ fixp->tc_fix_data.info->sequence);
+ break;
- /* Create the opcode hash table */
+ case BFD_RELOC_ALPHA_ELF_LITERAL:
+ if (fixp->tc_fix_data.info
+ && (fixp->tc_fix_data.info->saw_tlsgd
+ || fixp->tc_fix_data.info->saw_tlsldm))
+ break;
+ /* FALLTHRU */
- alpha_opcode_hash = hash_new ();
- for (i = 0; i < alpha_num_opcodes;)
- {
- const char *name, *retval, *slash;
+ default:
+ *prevP = fixp;
+ prevP = &fixp->fx_next;
+ break;
+ }
+ }
- name = alpha_opcodes[i].name;
- retval = hash_insert (alpha_opcode_hash, name, (PTR) &alpha_opcodes[i]);
- if (retval)
- as_fatal (_("internal error: can't hash opcode `%s': %s"), name, retval);
+ /* Go back and re-chain dependent relocations. They are currently
+ linked through the next_reloc field in reverse order, so as we
+ go through the next_reloc chain, we effectively reverse the chain
+ once again.
- /* Some opcodes include modifiers of various sorts with a "/mod"
- syntax, like the architecture manual suggests. However, for
- use with gcc at least, we also need access to those same opcodes
- without the "/". */
+ Except if there is more than one !literal for a given sequence
+ number. In that case, the programmer and/or compiler is not sure
+ how control flows from literal to lituse, and we can't be sure to
+ get the relaxation correct.
- if ((slash = strchr (name, '/')) != NULL)
- {
- char *p = xmalloc (strlen (name));
- memcpy (p, name, slash - name);
- strcpy (p + (slash - name), slash + 1);
+ ??? Well, actually we could, if there are enough lituses such that
+ we can make each literal have at least one of each lituse type
+ present. Not implemented.
- (void) hash_insert (alpha_opcode_hash, p, (PTR) &alpha_opcodes[i]);
- /* Ignore failures -- the opcode table does duplicate some
- variants in different forms, like "hw_stq" and "hw_st/q". */
- }
+ Also suppress the optimization if the !literals/!lituses are spread
+ in different segments. This can happen with "intersting" uses of
+ inline assembly; examples are present in the Linux kernel semaphores. */
- while (++i < alpha_num_opcodes
- && (alpha_opcodes[i].name == name
- || !strcmp (alpha_opcodes[i].name, name)))
- continue;
- }
+ for (fixp = seginfo->fix_root; fixp; fixp = next)
+ {
+ next = fixp->fx_next;
+ switch (fixp->fx_r_type)
+ {
+ case BFD_RELOC_ALPHA_TLSGD:
+ case BFD_RELOC_ALPHA_TLSLDM:
+ if (!fixp->tc_fix_data.info)
+ break;
+ if (fixp->tc_fix_data.info->n_master == 0)
+ break;
+ else if (fixp->tc_fix_data.info->n_master > 1)
+ {
+ as_bad_where (fixp->fx_file, fixp->fx_line,
+ _("too many !literal!%ld for %s"),
+ fixp->tc_fix_data.info->sequence,
+ (fixp->fx_r_type == BFD_RELOC_ALPHA_TLSGD
+ ? "!tlsgd" : "!tlsldm"));
+ break;
+ }
- /* Create the macro hash table */
+ fixp->tc_fix_data.info->master->fx_next = fixp->fx_next;
+ fixp->fx_next = fixp->tc_fix_data.info->master;
+ fixp = fixp->fx_next;
+ /* Fall through. */
- alpha_macro_hash = hash_new ();
- for (i = 0; i < alpha_num_macros;)
- {
- const char *name, *retval;
+ case BFD_RELOC_ALPHA_ELF_LITERAL:
+ if (fixp->tc_fix_data.info
+ && fixp->tc_fix_data.info->n_master == 1
+ && ! fixp->tc_fix_data.info->multi_section_p)
+ {
+ for (slave = fixp->tc_fix_data.info->slaves;
+ slave != (fixS *) 0;
+ slave = slave->tc_fix_data.next_reloc)
+ {
+ slave->fx_next = fixp->fx_next;
+ fixp->fx_next = slave;
+ }
+ }
+ break;
- name = alpha_macros[i].name;
- retval = hash_insert (alpha_macro_hash, name, (PTR) &alpha_macros[i]);
- if (retval)
- as_fatal (_("internal error: can't hash macro `%s': %s"),
- name, retval);
+ case BFD_RELOC_ALPHA_GPDISP_HI16:
+ if (fixp->tc_fix_data.info->n_slaves == 0)
+ as_bad_where (fixp->fx_file, fixp->fx_line,
+ _("No lda !gpdisp!%ld was found"),
+ fixp->tc_fix_data.info->sequence);
+ else
+ {
+ slave = fixp->tc_fix_data.info->slaves;
+ slave->fx_next = next;
+ fixp->fx_next = slave;
+ }
+ break;
- while (++i < alpha_num_macros
- && (alpha_macros[i].name == name
- || !strcmp (alpha_macros[i].name, name)))
- continue;
+ default:
+ break;
+ }
}
+}
- /* Construct symbols for each of the registers */
+/* Before the relocations are written, reorder them, so that user
+ supplied !lituse relocations follow the appropriate !literal
+ relocations, and similarly for !gpdisp relocations. */
- for (i = 0; i < 32; ++i)
- {
- char name[4];
- sprintf (name, "$%d", i);
- alpha_register_table[i] = symbol_create (name, reg_section, i,
- &zero_address_frag);
- }
- for (; i < 64; ++i)
+void
+alpha_before_fix (void)
+{
+ if (alpha_literal_hash)
+ bfd_map_over_sections (stdoutput, alpha_adjust_relocs, NULL);
+}
+\f
+#ifdef DEBUG_ALPHA
+static void
+debug_exp (expressionS tok[], int ntok)
+{
+ int i;
+
+ fprintf (stderr, "debug_exp: %d tokens", ntok);
+ for (i = 0; i < ntok; i++)
{
- char name[5];
- sprintf (name, "$f%d", i - 32);
- alpha_register_table[i] = symbol_create (name, reg_section, i,
- &zero_address_frag);
- }
+ expressionS *t = &tok[i];
+ const char *name;
- /* Create the special symbols and sections we'll be using */
+ switch (t->X_op)
+ {
+ default: name = "unknown"; break;
+ case O_illegal: name = "O_illegal"; break;
+ case O_absent: name = "O_absent"; break;
+ case O_constant: name = "O_constant"; break;
+ case O_symbol: name = "O_symbol"; break;
+ case O_symbol_rva: name = "O_symbol_rva"; break;
+ case O_register: name = "O_register"; break;
+ case O_big: name = "O_big"; break;
+ case O_uminus: name = "O_uminus"; break;
+ case O_bit_not: name = "O_bit_not"; break;
+ case O_logical_not: name = "O_logical_not"; break;
+ case O_multiply: name = "O_multiply"; break;
+ case O_divide: name = "O_divide"; break;
+ case O_modulus: name = "O_modulus"; break;
+ case O_left_shift: name = "O_left_shift"; break;
+ case O_right_shift: name = "O_right_shift"; break;
+ case O_bit_inclusive_or: name = "O_bit_inclusive_or"; break;
+ case O_bit_or_not: name = "O_bit_or_not"; break;
+ case O_bit_exclusive_or: name = "O_bit_exclusive_or"; break;
+ case O_bit_and: name = "O_bit_and"; break;
+ case O_add: name = "O_add"; break;
+ case O_subtract: name = "O_subtract"; break;
+ case O_eq: name = "O_eq"; break;
+ case O_ne: name = "O_ne"; break;
+ case O_lt: name = "O_lt"; break;
+ case O_le: name = "O_le"; break;
+ case O_ge: name = "O_ge"; break;
+ case O_gt: name = "O_gt"; break;
+ case O_logical_and: name = "O_logical_and"; break;
+ case O_logical_or: name = "O_logical_or"; break;
+ case O_index: name = "O_index"; break;
+ case O_pregister: name = "O_pregister"; break;
+ case O_cpregister: name = "O_cpregister"; break;
+ case O_literal: name = "O_literal"; break;
+ case O_lituse_addr: name = "O_lituse_addr"; break;
+ case O_lituse_base: name = "O_lituse_base"; break;
+ case O_lituse_bytoff: name = "O_lituse_bytoff"; break;
+ case O_lituse_jsr: name = "O_lituse_jsr"; break;
+ case O_lituse_tlsgd: name = "O_lituse_tlsgd"; break;
+ case O_lituse_tlsldm: name = "O_lituse_tlsldm"; break;
+ case O_gpdisp: name = "O_gpdisp"; break;
+ case O_gprelhigh: name = "O_gprelhigh"; break;
+ case O_gprellow: name = "O_gprellow"; break;
+ case O_gprel: name = "O_gprel"; break;
+ case O_samegp: name = "O_samegp"; break;
+ case O_tlsgd: name = "O_tlsgd"; break;
+ case O_tlsldm: name = "O_tlsldm"; break;
+ case O_gotdtprel: name = "O_gotdtprel"; break;
+ case O_dtprelhi: name = "O_dtprelhi"; break;
+ case O_dtprello: name = "O_dtprello"; break;
+ case O_dtprel: name = "O_dtprel"; break;
+ case O_gottprel: name = "O_gottprel"; break;
+ case O_tprelhi: name = "O_tprelhi"; break;
+ case O_tprello: name = "O_tprello"; break;
+ case O_tprel: name = "O_tprel"; break;
+ }
- /* So .sbss will get used for tiny objects. */
- bfd_set_gp_size (stdoutput, g_switch_value);
+ fprintf (stderr, ", %s(%s, %s, %d)", name,
+ (t->X_add_symbol) ? S_GET_NAME (t->X_add_symbol) : "--",
+ (t->X_op_symbol) ? S_GET_NAME (t->X_op_symbol) : "--",
+ (int) t->X_add_number);
+ }
+ fprintf (stderr, "\n");
+ fflush (stderr);
+}
+#endif
-#ifdef OBJ_ECOFF
- create_literal_section (".lita", &alpha_lita_section, &alpha_lita_symbol);
+/* Parse the arguments to an opcode. */
- /* For handling the GP, create a symbol that won't be output in the
- symbol table. We'll edit it out of relocs later. */
- alpha_gp_symbol = symbol_create ("<GP value>", alpha_lita_section, 0x8000,
- &zero_address_frag);
+static int
+tokenize_arguments (char *str,
+ expressionS tok[],
+ int ntok)
+{
+ expressionS *end_tok = tok + ntok;
+ char *old_input_line_pointer;
+ int saw_comma = 0, saw_arg = 0;
+#ifdef DEBUG_ALPHA
+ expressionS *orig_tok = tok;
#endif
-
-#ifdef OBJ_EVAX
- create_literal_section (".link", &alpha_link_section, &alpha_link_symbol);
+#ifdef RELOC_OP_P
+ char *p;
+ const struct alpha_reloc_op_tag *r;
+ int c, i;
+ size_t len;
+ int reloc_found_p = 0;
#endif
-#ifdef OBJ_ELF
- if (ECOFF_DEBUGGING)
- {
- segT sec = subseg_new (".mdebug", (subsegT) 0);
- bfd_set_section_flags (stdoutput, sec, SEC_HAS_CONTENTS | SEC_READONLY);
- bfd_set_section_alignment (stdoutput, sec, 3);
- }
-#endif /* OBJ_ELF */
+ memset (tok, 0, sizeof (*tok) * ntok);
- subseg_set (text_section, 0);
+ /* Save and restore input_line_pointer around this function. */
+ old_input_line_pointer = input_line_pointer;
+ input_line_pointer = str;
#ifdef RELOC_OP_P
- /* Create literal lookup hash table. */
- alpha_literal_hash = hash_new ();
+ /* ??? Wrest control of ! away from the regular expression parser. */
+ is_end_of_line[(unsigned char) '!'] = 1;
#endif
-}
-/* The public interface to the instruction assembler. */
+ while (tok < end_tok && *input_line_pointer)
+ {
+ SKIP_WHITESPACE ();
+ switch (*input_line_pointer)
+ {
+ case '\0':
+ goto fini;
-void
-md_assemble (str)
- char *str;
-{
- char opname[32]; /* current maximum is 13 */
- expressionS tok[MAX_INSN_ARGS];
- int ntok, trunclen;
- size_t opnamelen;
+#ifdef RELOC_OP_P
+ case '!':
+ /* A relocation operand can be placed after the normal operand on an
+ assembly language statement, and has the following form:
+ !relocation_type!sequence_number. */
+ if (reloc_found_p)
+ {
+ /* Only support one relocation op per insn. */
+ as_bad (_("More than one relocation op per insn"));
+ goto err_report;
+ }
- /* split off the opcode */
- opnamelen = strspn (str, "abcdefghijklmnopqrstuvwxyz_/46819");
- trunclen = (opnamelen < sizeof (opname) - 1
- ? opnamelen
- : sizeof (opname) - 1);
- memcpy (opname, str, trunclen);
- opname[trunclen] = '\0';
+ if (!saw_arg)
+ goto err;
- /* tokenize the rest of the line */
- if ((ntok = tokenize_arguments (str + opnamelen, tok, MAX_INSN_ARGS)) < 0)
- {
- if (ntok != TOKENIZE_ERROR_REPORT)
- as_bad (_("syntax error"));
+ ++input_line_pointer;
+ SKIP_WHITESPACE ();
+ p = input_line_pointer;
+ c = get_symbol_end ();
- return;
- }
+ /* Parse !relocation_type. */
+ len = input_line_pointer - p;
+ if (len == 0)
+ {
+ as_bad (_("No relocation operand"));
+ goto err_report;
+ }
- /* finish it off */
- assemble_tokens (opname, tok, ntok, alpha_macros_on);
-}
+ r = &alpha_reloc_op[0];
+ for (i = alpha_num_reloc_op - 1; i >= 0; i--, r++)
+ if (len == r->length && memcmp (p, r->name, len) == 0)
+ break;
+ if (i < 0)
+ {
+ as_bad (_("Unknown relocation operand: !%s"), p);
+ goto err_report;
+ }
-/* Round up a section's size to the appropriate boundary. */
+ *input_line_pointer = c;
+ SKIP_WHITESPACE ();
+ if (*input_line_pointer != '!')
+ {
+ if (r->require_seq)
+ {
+ as_bad (_("no sequence number after !%s"), p);
+ goto err_report;
+ }
-valueT
-md_section_align (seg, size)
- segT seg;
- valueT size;
-{
- int align = bfd_get_section_alignment (stdoutput, seg);
- valueT mask = ((valueT) 1 << align) - 1;
+ tok->X_add_number = 0;
+ }
+ else
+ {
+ if (! r->allow_seq)
+ {
+ as_bad (_("!%s does not use a sequence number"), p);
+ goto err_report;
+ }
- return (size + mask) & ~mask;
-}
+ input_line_pointer++;
-/* Turn a string in input_line_pointer into a floating point constant
- of type TYPE, and store the appropriate bytes in *LITP. The number
- of LITTLENUMS emitted is stored in *SIZEP. An error message is
- returned, or NULL on OK. */
+ /* Parse !sequence_number. */
+ expression (tok);
+ if (tok->X_op != O_constant || tok->X_add_number <= 0)
+ {
+ as_bad (_("Bad sequence number: !%s!%s"),
+ r->name, input_line_pointer);
+ goto err_report;
+ }
+ }
-/* Equal to MAX_PRECISION in atof-ieee.c */
-#define MAX_LITTLENUMS 6
+ tok->X_op = r->op;
+ reloc_found_p = 1;
+ ++tok;
+ break;
+#endif /* RELOC_OP_P */
-extern char *vax_md_atof PARAMS ((int, char *, int *));
+ case ',':
+ ++input_line_pointer;
+ if (saw_comma || !saw_arg)
+ goto err;
+ saw_comma = 1;
+ break;
-char *
-md_atof (type, litP, sizeP)
- char type;
- char *litP;
- int *sizeP;
-{
- int prec;
- LITTLENUM_TYPE words[MAX_LITTLENUMS];
- LITTLENUM_TYPE *wordP;
- char *t;
-
- switch (type)
- {
- /* VAX floats */
- case 'G':
- /* VAX md_atof doesn't like "G" for some reason. */
- type = 'g';
- case 'F':
- case 'D':
- return vax_md_atof (type, litP, sizeP);
+ case '(':
+ {
+ char *hold = input_line_pointer++;
- /* IEEE floats */
- case 'f':
- prec = 2;
- break;
+ /* First try for parenthesized register ... */
+ expression (tok);
+ if (*input_line_pointer == ')' && tok->X_op == O_register)
+ {
+ tok->X_op = (saw_comma ? O_cpregister : O_pregister);
+ saw_comma = 0;
+ saw_arg = 1;
+ ++input_line_pointer;
+ ++tok;
+ break;
+ }
- case 'd':
- prec = 4;
- break;
+ /* ... then fall through to plain expression. */
+ input_line_pointer = hold;
+ }
- case 'x':
- case 'X':
- prec = 6;
- break;
+ default:
+ if (saw_arg && !saw_comma)
+ goto err;
- case 'p':
- case 'P':
- prec = 6;
- break;
+ expression (tok);
+ if (tok->X_op == O_illegal || tok->X_op == O_absent)
+ goto err;
- default:
- *sizeP = 0;
- return _("Bad call to MD_ATOF()");
+ saw_comma = 0;
+ saw_arg = 1;
+ ++tok;
+ break;
+ }
}
- t = atof_ieee (input_line_pointer, type, words);
- if (t)
- input_line_pointer = t;
- *sizeP = prec * sizeof (LITTLENUM_TYPE);
- for (wordP = words + prec - 1; prec--;)
- {
- md_number_to_chars (litP, (long) (*wordP--), sizeof (LITTLENUM_TYPE));
- litP += sizeof (LITTLENUM_TYPE);
- }
+fini:
+ if (saw_comma)
+ goto err;
+ input_line_pointer = old_input_line_pointer;
- return 0;
+#ifdef DEBUG_ALPHA
+ debug_exp (orig_tok, ntok - (end_tok - tok));
+#endif
+#ifdef RELOC_OP_P
+ is_end_of_line[(unsigned char) '!'] = 0;
+#endif
+
+ return ntok - (end_tok - tok);
+
+err:
+#ifdef RELOC_OP_P
+ is_end_of_line[(unsigned char) '!'] = 0;
+#endif
+ input_line_pointer = old_input_line_pointer;
+ return TOKENIZE_ERROR;
+
+#ifdef RELOC_OP_P
+err_report:
+ is_end_of_line[(unsigned char) '!'] = 0;
+#endif
+ input_line_pointer = old_input_line_pointer;
+ return TOKENIZE_ERROR_REPORT;
}
-/* Take care of the target-specific command-line options. */
+/* Search forward through all variants of an opcode looking for a
+ syntax match. */
-int
-md_parse_option (c, arg)
- int c;
- char *arg;
+static const struct alpha_opcode *
+find_opcode_match (const struct alpha_opcode *first_opcode,
+ const expressionS *tok,
+ int *pntok,
+ int *pcpumatch)
{
- switch (c)
+ const struct alpha_opcode *opcode = first_opcode;
+ int ntok = *pntok;
+ int got_cpu_match = 0;
+
+ do
{
- case 'F':
- alpha_nofloats_on = 1;
- break;
+ const unsigned char *opidx;
+ int tokidx = 0;
- case OPTION_32ADDR:
- alpha_addr32_on = 1;
- break;
+ /* Don't match opcodes that don't exist on this architecture. */
+ if (!(opcode->flags & alpha_target))
+ goto match_failed;
- case 'g':
- alpha_debug = 1;
- break;
+ got_cpu_match = 1;
- case 'G':
- g_switch_value = atoi (arg);
- break;
+ for (opidx = opcode->operands; *opidx; ++opidx)
+ {
+ const struct alpha_operand *operand = &alpha_operands[*opidx];
- case 'm':
- {
- const struct cpu_type *p;
- for (p = cpu_types; p->name; ++p)
- if (strcmp (arg, p->name) == 0)
+ /* Only take input from real operands. */
+ if (operand->flags & AXP_OPERAND_FAKE)
+ continue;
+
+ /* When we expect input, make sure we have it. */
+ if (tokidx >= ntok)
{
- alpha_target_name = p->name, alpha_target = p->flags;
- goto found;
+ if ((operand->flags & AXP_OPERAND_OPTIONAL_MASK) == 0)
+ goto match_failed;
+ continue;
}
- as_warn (_("Unknown CPU identifier `%s'"), arg);
- found:;
- }
- break;
-#ifdef OBJ_EVAX
- case '+': /* For g++. Hash any name > 63 chars long. */
- alpha_flag_hash_long_names = 1;
- break;
+ /* Match operand type with expression type. */
+ switch (operand->flags & AXP_OPERAND_TYPECHECK_MASK)
+ {
+ case AXP_OPERAND_IR:
+ if (tok[tokidx].X_op != O_register
+ || !is_ir_num (tok[tokidx].X_add_number))
+ goto match_failed;
+ break;
+ case AXP_OPERAND_FPR:
+ if (tok[tokidx].X_op != O_register
+ || !is_fpr_num (tok[tokidx].X_add_number))
+ goto match_failed;
+ break;
+ case AXP_OPERAND_IR | AXP_OPERAND_PARENS:
+ if (tok[tokidx].X_op != O_pregister
+ || !is_ir_num (tok[tokidx].X_add_number))
+ goto match_failed;
+ break;
+ case AXP_OPERAND_IR | AXP_OPERAND_PARENS | AXP_OPERAND_COMMA:
+ if (tok[tokidx].X_op != O_cpregister
+ || !is_ir_num (tok[tokidx].X_add_number))
+ goto match_failed;
+ break;
- case 'H': /* Show new symbol after hash truncation */
- alpha_flag_show_after_trunc = 1;
- break;
+ case AXP_OPERAND_RELATIVE:
+ case AXP_OPERAND_SIGNED:
+ case AXP_OPERAND_UNSIGNED:
+ switch (tok[tokidx].X_op)
+ {
+ case O_illegal:
+ case O_absent:
+ case O_register:
+ case O_pregister:
+ case O_cpregister:
+ goto match_failed;
- case 'h': /* for gnu-c/vax compatibility. */
- break;
-#endif
+ default:
+ break;
+ }
+ break;
- case OPTION_RELAX:
- alpha_flag_relax = 1;
- break;
+ default:
+ /* Everything else should have been fake. */
+ abort ();
+ }
+ ++tokidx;
+ }
-#ifdef OBJ_ELF
- case OPTION_MDEBUG:
- alpha_flag_mdebug = 1;
- break;
- case OPTION_NO_MDEBUG:
- alpha_flag_mdebug = 0;
- break;
-#endif
+ /* Possible match -- did we use all of our input? */
+ if (tokidx == ntok)
+ {
+ *pntok = ntok;
+ return opcode;
+ }
- default:
- return 0;
+ match_failed:;
}
+ while (++opcode - alpha_opcodes < (int) alpha_num_opcodes
+ && !strcmp (opcode->name, first_opcode->name));
- return 1;
-}
-
-/* Print a description of the command-line options that we accept. */
+ if (*pcpumatch)
+ *pcpumatch = got_cpu_match;
-void
-md_show_usage (stream)
- FILE *stream;
-{
- fputs (_("\
-Alpha options:\n\
--32addr treat addresses as 32-bit values\n\
--F lack floating point instructions support\n\
--mev4 | -mev45 | -mev5 | -mev56 | -mpca56 | -mev6 | -mall\n\
- specify variant of Alpha architecture\n\
--m21064 | -m21066 | -m21164 | -m21164a | -m21164pc | -m21264\n\
- these variants include PALcode opcodes\n"),
- stream);
-#ifdef OBJ_EVAX
- fputs (_("\
-VMS options:\n\
--+ hash encode (don't truncate) names longer than 64 characters\n\
--H show new symbol after hash truncation\n"),
- stream);
-#endif
+ return NULL;
}
-/* Decide from what point a pc-relative relocation is relative to,
- relative to the pc-relative fixup. Er, relatively speaking. */
+/* Given an opcode name and a pre-tokenized set of arguments, assemble
+ the insn, but do not emit it.
-long
-md_pcrel_from (fixP)
- fixS *fixP;
-{
- valueT addr = fixP->fx_where + fixP->fx_frag->fr_address;
- switch (fixP->fx_r_type)
- {
- case BFD_RELOC_ALPHA_GPDISP:
- case BFD_RELOC_ALPHA_GPDISP_HI16:
- case BFD_RELOC_ALPHA_GPDISP_LO16:
- return addr;
- default:
- return fixP->fx_size + addr;
- }
-}
+ Note that this implies no macros allowed, since we can't store more
+ than one insn in an insn structure. */
-/* Attempt to simplify or even eliminate a fixup. The return value is
- ignored; perhaps it was once meaningful, but now it is historical.
- To indicate that a fixup has been eliminated, set fixP->fx_done.
+static void
+assemble_tokens_to_insn (const char *opname,
+ const expressionS *tok,
+ int ntok,
+ struct alpha_insn *insn)
+{
+ const struct alpha_opcode *opcode;
- For ELF, here it is that we transform the GPDISP_HI16 reloc we used
- internally into the GPDISP reloc used externally. We had to do
- this so that we'd have the GPDISP_LO16 reloc as a tag to compute
- the distance to the "lda" instruction for setting the addend to
- GPDISP. */
+ /* Search opcodes. */
+ opcode = (const struct alpha_opcode *) hash_find (alpha_opcode_hash, opname);
+ if (opcode)
+ {
+ int cpumatch;
+ opcode = find_opcode_match (opcode, tok, &ntok, &cpumatch);
+ if (opcode)
+ {
+ assemble_insn (opcode, tok, ntok, insn, BFD_RELOC_UNUSED);
+ return;
+ }
+ else if (cpumatch)
+ as_bad (_("inappropriate arguments for opcode `%s'"), opname);
+ else
+ as_bad (_("opcode `%s' not supported for target %s"), opname,
+ alpha_target_name);
+ }
+ else
+ as_bad (_("unknown opcode `%s'"), opname);
+}
-int
-md_apply_fix (fixP, valueP)
- fixS *fixP;
- valueT *valueP;
-{
- char * const fixpos = fixP->fx_frag->fr_literal + fixP->fx_where;
- valueT value = *valueP;
- unsigned image, size;
+/* Build a BFD section with its flags set appropriately for the .lita,
+ .lit8, or .lit4 sections. */
- switch (fixP->fx_r_type)
- {
- /* The GPDISP relocations are processed internally with a symbol
- referring to the current function; we need to drop in a value
- which, when added to the address of the start of the function,
- gives the desired GP. */
- case BFD_RELOC_ALPHA_GPDISP_HI16:
- {
- fixS *next = fixP->fx_next;
- assert (next->fx_r_type == BFD_RELOC_ALPHA_GPDISP_LO16);
+static void
+create_literal_section (const char *name,
+ segT *secp,
+ symbolS **symp)
+{
+ segT current_section = now_seg;
+ int current_subsec = now_subseg;
+ segT new_sec;
- fixP->fx_offset = (next->fx_frag->fr_address + next->fx_where
- - fixP->fx_frag->fr_address - fixP->fx_where);
+ *secp = new_sec = subseg_new (name, 0);
+ subseg_set (current_section, current_subsec);
+ bfd_set_section_alignment (stdoutput, new_sec, 4);
+ bfd_set_section_flags (stdoutput, new_sec,
+ SEC_RELOC | SEC_ALLOC | SEC_LOAD | SEC_READONLY
+ | SEC_DATA);
- value = (value - sign_extend_16 (value)) >> 16;
- }
-#ifdef OBJ_ELF
- fixP->fx_r_type = BFD_RELOC_ALPHA_GPDISP;
-#endif
- goto do_reloc_gp;
+ S_CLEAR_EXTERNAL (*symp = section_symbol (new_sec));
+}
- case BFD_RELOC_ALPHA_GPDISP_LO16:
- value = sign_extend_16 (value);
- fixP->fx_offset = 0;
-#ifdef OBJ_ELF
- fixP->fx_done = 1;
-#endif
+/* Load a (partial) expression into a target register.
- do_reloc_gp:
- fixP->fx_addsy = section_symbol (now_seg);
- md_number_to_chars (fixpos, value, 2);
- break;
+ If poffset is not null, after the call it will either contain
+ O_constant 0, or a 16-bit offset appropriate for any MEM format
+ instruction. In addition, pbasereg will be modified to point to
+ the base register to use in that MEM format instruction.
- case BFD_RELOC_16:
- if (fixP->fx_pcrel)
- fixP->fx_r_type = BFD_RELOC_16_PCREL;
- size = 2;
- goto do_reloc_xx;
- case BFD_RELOC_32:
- if (fixP->fx_pcrel)
- fixP->fx_r_type = BFD_RELOC_32_PCREL;
- size = 4;
- goto do_reloc_xx;
- case BFD_RELOC_64:
- if (fixP->fx_pcrel)
- fixP->fx_r_type = BFD_RELOC_64_PCREL;
- size = 8;
- do_reloc_xx:
- if (fixP->fx_pcrel == 0 && fixP->fx_addsy == 0)
- {
- md_number_to_chars (fixpos, value, size);
- goto done;
- }
- return 1;
+ In any case, *pbasereg should contain a base register to add to the
+ expression. This will normally be either AXP_REG_ZERO or
+ alpha_gp_register. Symbol addresses will always be loaded via $gp,
+ so "foo($0)" is interpreted as adding the address of foo to $0;
+ i.e. "ldq $targ, LIT($gp); addq $targ, $0, $targ". Odd, perhaps,
+ but this is what OSF/1 does.
-#ifdef OBJ_ECOFF
- case BFD_RELOC_GPREL32:
- assert (fixP->fx_subsy == alpha_gp_symbol);
- fixP->fx_subsy = 0;
- /* FIXME: inherited this obliviousness of `value' -- why? */
- md_number_to_chars (fixpos, -alpha_gp_value, 4);
- break;
-#endif
-#ifdef OBJ_ELF
- case BFD_RELOC_GPREL32:
- return 1;
-#endif
+ If explicit relocations of the form !literal!<number> are allowed,
+ and used, then explicit_reloc with be an expression pointer.
- case BFD_RELOC_23_PCREL_S2:
- if (fixP->fx_pcrel == 0 && fixP->fx_addsy == 0)
- {
- image = bfd_getl32 (fixpos);
- image = (image & ~0x1FFFFF) | ((value >> 2) & 0x1FFFFF);
- goto write_done;
- }
- return 1;
+ Finally, the return value is nonzero if the calling macro may emit
+ a LITUSE reloc if otherwise appropriate; the return value is the
+ sequence number to use. */
- case BFD_RELOC_ALPHA_HINT:
- if (fixP->fx_pcrel == 0 && fixP->fx_addsy == 0)
- {
- image = bfd_getl32 (fixpos);
- image = (image & ~0x3FFF) | ((value >> 2) & 0x3FFF);
- goto write_done;
- }
- return 1;
+static long
+load_expression (int targreg,
+ const expressionS *exp,
+ int *pbasereg,
+ expressionS *poffset)
+{
+ long emit_lituse = 0;
+ offsetT addend = exp->X_add_number;
+ int basereg = *pbasereg;
+ struct alpha_insn insn;
+ expressionS newtok[3];
+ switch (exp->X_op)
+ {
+ case O_symbol:
+ {
#ifdef OBJ_ECOFF
- case BFD_RELOC_ALPHA_LITERAL:
- md_number_to_chars (fixpos, value, 2);
- return 1;
+ offsetT lit;
- case BFD_RELOC_ALPHA_LITUSE:
- return 1;
-#endif
-#ifdef OBJ_ELF
- case BFD_RELOC_ALPHA_ELF_LITERAL:
- case BFD_RELOC_ALPHA_LITUSE:
- return 1;
-#endif
-#ifdef OBJ_EVAX
- case BFD_RELOC_ALPHA_LINKAGE:
- case BFD_RELOC_ALPHA_CODEADDR:
- return 1;
-#endif
+ /* Attempt to reduce .lit load by splitting the offset from
+ its symbol when possible, but don't create a situation in
+ which we'd fail. */
+ if (!range_signed_32 (addend) &&
+ (alpha_noat_on || targreg == AXP_REG_AT))
+ {
+ lit = add_to_literal_pool (exp->X_add_symbol, addend,
+ alpha_lita_section, 8);
+ addend = 0;
+ }
+ else
+ lit = add_to_literal_pool (exp->X_add_symbol, 0,
+ alpha_lita_section, 8);
-#ifdef RELOC_OP_P
- case BFD_RELOC_ALPHA_USER_LITERAL:
- case BFD_RELOC_ALPHA_USER_LITUSE_BASE:
- case BFD_RELOC_ALPHA_USER_LITUSE_BYTOFF:
- case BFD_RELOC_ALPHA_USER_LITUSE_JSR:
- return 1;
+ if (lit >= 0x8000)
+ as_fatal (_("overflow in literal (.lita) table"));
- case BFD_RELOC_ALPHA_USER_GPDISP:
- case BFD_RELOC_ALPHA_USER_GPRELHIGH:
- case BFD_RELOC_ALPHA_USER_GPRELLOW:
- abort ();
-#endif
+ /* Emit "ldq r, lit(gp)". */
- case BFD_RELOC_VTABLE_INHERIT:
- case BFD_RELOC_VTABLE_ENTRY:
- return 1;
+ if (basereg != alpha_gp_register && targreg == basereg)
+ {
+ if (alpha_noat_on)
+ as_bad (_("macro requires $at register while noat in effect"));
+ if (targreg == AXP_REG_AT)
+ as_bad (_("macro requires $at while $at in use"));
- default:
- {
- const struct alpha_operand *operand;
+ set_tok_reg (newtok[0], AXP_REG_AT);
+ }
+ else
+ set_tok_reg (newtok[0], targreg);
- if ((int) fixP->fx_r_type >= 0)
- as_fatal (_("unhandled relocation type %s"),
- bfd_get_reloc_code_name (fixP->fx_r_type));
+ set_tok_sym (newtok[1], alpha_lita_symbol, lit);
+ set_tok_preg (newtok[2], alpha_gp_register);
- assert (-(int) fixP->fx_r_type < (int) alpha_num_operands);
- operand = &alpha_operands[-(int) fixP->fx_r_type];
+ assemble_tokens_to_insn ("ldq", newtok, 3, &insn);
- /* The rest of these fixups only exist internally during symbol
- resolution and have no representation in the object file.
- Therefore they must be completely resolved as constants. */
+ assert (insn.nfixups == 1);
+ insn.fixups[0].reloc = BFD_RELOC_ALPHA_LITERAL;
+ insn.sequence = emit_lituse = next_sequence_num--;
+#endif /* OBJ_ECOFF */
+#ifdef OBJ_ELF
+ /* Emit "ldq r, gotoff(gp)". */
- if (fixP->fx_addsy != 0
- && S_GET_SEGMENT (fixP->fx_addsy) != absolute_section)
- as_bad_where (fixP->fx_file, fixP->fx_line,
- _("non-absolute expression in constant field"));
+ if (basereg != alpha_gp_register && targreg == basereg)
+ {
+ if (alpha_noat_on)
+ as_bad (_("macro requires $at register while noat in effect"));
+ if (targreg == AXP_REG_AT)
+ as_bad (_("macro requires $at while $at in use"));
- image = bfd_getl32 (fixpos);
- image = insert_operand (image, operand, (offsetT) value,
- fixP->fx_file, fixP->fx_line);
- }
- goto write_done;
- }
+ set_tok_reg (newtok[0], AXP_REG_AT);
+ }
+ else
+ set_tok_reg (newtok[0], targreg);
- if (fixP->fx_addsy != 0 || fixP->fx_pcrel != 0)
- return 1;
- else
- {
- as_warn_where (fixP->fx_file, fixP->fx_line,
- _("type %d reloc done?\n"), (int) fixP->fx_r_type);
- goto done;
- }
+ /* XXX: Disable this .got minimizing optimization so that we can get
+ better instruction offset knowledge in the compiler. This happens
+ very infrequently anyway. */
+ if (1
+ || (!range_signed_32 (addend)
+ && (alpha_noat_on || targreg == AXP_REG_AT)))
+ {
+ newtok[1] = *exp;
+ addend = 0;
+ }
+ else
+ set_tok_sym (newtok[1], exp->X_add_symbol, 0);
-write_done:
- md_number_to_chars (fixpos, image, 4);
+ set_tok_preg (newtok[2], alpha_gp_register);
-done:
- fixP->fx_done = 1;
- return 0;
-}
+ assemble_tokens_to_insn ("ldq", newtok, 3, &insn);
-/*
- * Look for a register name in the given symbol.
- */
+ assert (insn.nfixups == 1);
+ insn.fixups[0].reloc = BFD_RELOC_ALPHA_ELF_LITERAL;
+ insn.sequence = emit_lituse = next_sequence_num--;
+#endif /* OBJ_ELF */
+#ifdef OBJ_EVAX
+ offsetT link;
-symbolS *
-md_undefined_symbol (name)
- char *name;
-{
- if (*name == '$')
- {
- int is_float = 0, num;
+ /* Find symbol or symbol pointer in link section. */
- switch (*++name)
- {
- case 'f':
- if (name[1] == 'p' && name[2] == '\0')
- return alpha_register_table[AXP_REG_FP];
- is_float = 32;
- /* FALLTHRU */
+ if (exp->X_add_symbol == alpha_evax_proc.symbol)
+ {
+ if (range_signed_16 (addend))
+ {
+ set_tok_reg (newtok[0], targreg);
+ set_tok_const (newtok[1], addend);
+ set_tok_preg (newtok[2], basereg);
+ assemble_tokens_to_insn ("lda", newtok, 3, &insn);
+ addend = 0;
+ }
+ else
+ {
+ set_tok_reg (newtok[0], targreg);
+ set_tok_const (newtok[1], 0);
+ set_tok_preg (newtok[2], basereg);
+ assemble_tokens_to_insn ("lda", newtok, 3, &insn);
+ }
+ }
+ else
+ {
+ if (!range_signed_32 (addend))
+ {
+ link = add_to_link_pool (alpha_evax_proc.symbol,
+ exp->X_add_symbol, addend);
+ addend = 0;
+ }
+ else
+ link = add_to_link_pool (alpha_evax_proc.symbol,
+ exp->X_add_symbol, 0);
- case 'r':
- if (!isdigit (*++name))
- break;
- /* FALLTHRU */
+ set_tok_reg (newtok[0], targreg);
+ set_tok_const (newtok[1], link);
+ set_tok_preg (newtok[2], basereg);
+ assemble_tokens_to_insn ("ldq", newtok, 3, &insn);
+ }
+#endif /* OBJ_EVAX */
- case '0': case '1': case '2': case '3': case '4':
- case '5': case '6': case '7': case '8': case '9':
- if (name[1] == '\0')
- num = name[0] - '0';
- else if (name[0] != '0' && isdigit (name[1]) && name[2] == '\0')
- {
- num = (name[0] - '0') * 10 + name[1] - '0';
- if (num >= 32)
- break;
- }
- else
- break;
+ emit_insn (&insn);
- if (!alpha_noat_on && (num + is_float) == AXP_REG_AT)
- as_warn (_("Used $at without \".set noat\""));
- return alpha_register_table[num + is_float];
+#ifndef OBJ_EVAX
+ if (basereg != alpha_gp_register && basereg != AXP_REG_ZERO)
+ {
+ /* Emit "addq r, base, r". */
- case 'a':
- if (name[1] == 't' && name[2] == '\0')
- {
- if (!alpha_noat_on)
- as_warn (_("Used $at without \".set noat\""));
- return alpha_register_table[AXP_REG_AT];
- }
- break;
+ set_tok_reg (newtok[1], basereg);
+ set_tok_reg (newtok[2], targreg);
+ assemble_tokens ("addq", newtok, 3, 0);
+ }
+#endif
+ basereg = targreg;
+ }
+ break;
- case 'g':
- if (name[1] == 'p' && name[2] == '\0')
- return alpha_register_table[alpha_gp_register];
- break;
+ case O_constant:
+ break;
- case 's':
- if (name[1] == 'p' && name[2] == '\0')
- return alpha_register_table[AXP_REG_SP];
- break;
- }
- }
- return NULL;
-}
+ case O_subtract:
+ /* Assume that this difference expression will be resolved to an
+ absolute value and that that value will fit in 16 bits. */
-#ifdef OBJ_ECOFF
-/* @@@ Magic ECOFF bits. */
+ set_tok_reg (newtok[0], targreg);
+ newtok[1] = *exp;
+ set_tok_preg (newtok[2], basereg);
+ assemble_tokens ("lda", newtok, 3, 0);
-void
-alpha_frob_ecoff_data ()
-{
- select_gp_value ();
- /* $zero and $f31 are read-only */
- alpha_gprmask &= ~1;
- alpha_fprmask &= ~1;
-}
-#endif
+ if (poffset)
+ set_tok_const (*poffset, 0);
+ return 0;
-/* Hook to remember a recently defined label so that the auto-align
- code can adjust the symbol after we know what alignment will be
- required. */
+ case O_big:
+ if (exp->X_add_number > 0)
+ as_bad (_("bignum invalid; zero assumed"));
+ else
+ as_bad (_("floating point number invalid; zero assumed"));
+ addend = 0;
+ break;
-void
-alpha_define_label (sym)
- symbolS *sym;
-{
- alpha_insn_label = sym;
-}
+ default:
+ as_bad (_("can't handle expression"));
+ addend = 0;
+ break;
+ }
-/* Return true if we must always emit a reloc for a type and false if
- there is some hope of resolving it a assembly time. */
+ if (!range_signed_32 (addend))
+ {
+ offsetT lit;
+ long seq_num = next_sequence_num--;
-int
-alpha_force_relocation (f)
- fixS *f;
-{
- if (alpha_flag_relax)
- return 1;
+ /* For 64-bit addends, just put it in the literal pool. */
+#ifdef OBJ_EVAX
+ /* Emit "ldq targreg, lit(basereg)". */
+ lit = add_to_link_pool (alpha_evax_proc.symbol,
+ section_symbol (absolute_section), addend);
+ set_tok_reg (newtok[0], targreg);
+ set_tok_const (newtok[1], lit);
+ set_tok_preg (newtok[2], alpha_gp_register);
+ assemble_tokens ("ldq", newtok, 3, 0);
+#else
+
+ if (alpha_lit8_section == NULL)
+ {
+ create_literal_section (".lit8",
+ &alpha_lit8_section,
+ &alpha_lit8_symbol);
- switch (f->fx_r_type)
- {
- case BFD_RELOC_ALPHA_GPDISP_HI16:
- case BFD_RELOC_ALPHA_GPDISP_LO16:
- case BFD_RELOC_ALPHA_GPDISP:
#ifdef OBJ_ECOFF
- case BFD_RELOC_ALPHA_LITERAL:
-#endif
-#ifdef OBJ_ELF
- case BFD_RELOC_ALPHA_ELF_LITERAL:
-#endif
- case BFD_RELOC_ALPHA_LITUSE:
- case BFD_RELOC_GPREL32:
-#ifdef OBJ_EVAX
- case BFD_RELOC_ALPHA_LINKAGE:
- case BFD_RELOC_ALPHA_CODEADDR:
-#endif
-#ifdef RELOC_OP_P
- case BFD_RELOC_ALPHA_USER_LITERAL:
- case BFD_RELOC_ALPHA_USER_LITUSE_BASE:
- case BFD_RELOC_ALPHA_USER_LITUSE_BYTOFF:
- case BFD_RELOC_ALPHA_USER_LITUSE_JSR:
- case BFD_RELOC_ALPHA_USER_GPDISP:
- case BFD_RELOC_ALPHA_USER_GPRELHIGH:
- case BFD_RELOC_ALPHA_USER_GPRELLOW:
+ alpha_lit8_literal = add_to_literal_pool (alpha_lit8_symbol, 0x8000,
+ alpha_lita_section, 8);
+ if (alpha_lit8_literal >= 0x8000)
+ as_fatal (_("overflow in literal (.lita) table"));
#endif
- case BFD_RELOC_VTABLE_INHERIT:
- case BFD_RELOC_VTABLE_ENTRY:
- return 1;
+ }
- case BFD_RELOC_23_PCREL_S2:
- case BFD_RELOC_32:
- case BFD_RELOC_64:
- case BFD_RELOC_ALPHA_HINT:
- return 0;
+ lit = add_to_literal_pool (NULL, addend, alpha_lit8_section, 8) - 0x8000;
+ if (lit >= 0x8000)
+ as_fatal (_("overflow in literal (.lit8) table"));
- default:
- assert ((int) f->fx_r_type < 0
- && -(int) f->fx_r_type < (int) alpha_num_operands);
- return 0;
- }
-}
+ /* Emit "lda litreg, .lit8+0x8000". */
-/* Return true if we can partially resolve a relocation now. */
+ if (targreg == basereg)
+ {
+ if (alpha_noat_on)
+ as_bad (_("macro requires $at register while noat in effect"));
+ if (targreg == AXP_REG_AT)
+ as_bad (_("macro requires $at while $at in use"));
-int
-alpha_fix_adjustable (f)
- fixS *f;
-{
+ set_tok_reg (newtok[0], AXP_REG_AT);
+ }
+ else
+ set_tok_reg (newtok[0], targreg);
+#ifdef OBJ_ECOFF
+ set_tok_sym (newtok[1], alpha_lita_symbol, alpha_lit8_literal);
+#endif
#ifdef OBJ_ELF
- /* Prevent all adjustments to global symbols */
- if (S_IS_EXTERN (f->fx_addsy) || S_IS_WEAK (f->fx_addsy))
- return 0;
+ set_tok_sym (newtok[1], alpha_lit8_symbol, 0x8000);
#endif
+ set_tok_preg (newtok[2], alpha_gp_register);
- /* Are there any relocation types for which we must generate a reloc
- but we can adjust the values contained within it? */
- switch (f->fx_r_type)
- {
- case BFD_RELOC_ALPHA_GPDISP_HI16:
- case BFD_RELOC_ALPHA_GPDISP_LO16:
- case BFD_RELOC_ALPHA_GPDISP:
- return 0;
+ assemble_tokens_to_insn ("ldq", newtok, 3, &insn);
+ assert (insn.nfixups == 1);
#ifdef OBJ_ECOFF
- case BFD_RELOC_ALPHA_LITERAL:
+ insn.fixups[0].reloc = BFD_RELOC_ALPHA_LITERAL;
#endif
#ifdef OBJ_ELF
- case BFD_RELOC_ALPHA_ELF_LITERAL:
-#endif
-#ifdef RELOC_OP_P
- case BFD_RELOC_ALPHA_USER_LITERAL:
-#endif
-#ifdef OBJ_EVAX
- case BFD_RELOC_ALPHA_LINKAGE:
- case BFD_RELOC_ALPHA_CODEADDR:
+ insn.fixups[0].reloc = BFD_RELOC_ALPHA_ELF_LITERAL;
#endif
- return 1;
+ insn.sequence = seq_num;
- case BFD_RELOC_ALPHA_LITUSE:
-#ifdef RELOC_OP_P
- case BFD_RELOC_ALPHA_USER_LITUSE_BASE:
- case BFD_RELOC_ALPHA_USER_LITUSE_BYTOFF:
- case BFD_RELOC_ALPHA_USER_LITUSE_JSR:
- case BFD_RELOC_ALPHA_USER_GPDISP:
- case BFD_RELOC_ALPHA_USER_GPRELHIGH:
- case BFD_RELOC_ALPHA_USER_GPRELLOW:
-#endif
- case BFD_RELOC_VTABLE_ENTRY:
- case BFD_RELOC_VTABLE_INHERIT:
- return 0;
+ emit_insn (&insn);
- case BFD_RELOC_GPREL32:
- case BFD_RELOC_23_PCREL_S2:
- case BFD_RELOC_32:
- case BFD_RELOC_64:
- case BFD_RELOC_ALPHA_HINT:
- return 1;
+ /* Emit "ldq litreg, lit(litreg)". */
- default:
- assert ((int) f->fx_r_type < 0
- && - (int) f->fx_r_type < (int) alpha_num_operands);
- return 1;
- }
- /*NOTREACHED*/
-}
+ set_tok_const (newtok[1], lit);
+ set_tok_preg (newtok[2], newtok[0].X_add_number);
-/* Generate the BFD reloc to be stuck in the object file from the
- fixup used internally in the assembler. */
+ assemble_tokens_to_insn ("ldq", newtok, 3, &insn);
-arelent *
-tc_gen_reloc (sec, fixp)
- asection *sec ATTRIBUTE_UNUSED;
- fixS *fixp;
-{
- arelent *reloc;
+ assert (insn.nfixups < MAX_INSN_FIXUPS);
+ insn.fixups[insn.nfixups].reloc = DUMMY_RELOC_LITUSE_BASE;
+ insn.fixups[insn.nfixups].exp.X_op = O_absent;
+ insn.nfixups++;
+ insn.sequence = seq_num;
+ emit_lituse = 0;
- reloc = (arelent *) xmalloc (sizeof (arelent));
- reloc->sym_ptr_ptr = (asymbol **) xmalloc (sizeof (asymbol *));
- *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy);
- reloc->address = fixp->fx_frag->fr_address + fixp->fx_where;
+ emit_insn (&insn);
- /* Make sure none of our internal relocations make it this far.
- They'd better have been fully resolved by this point. */
- assert ((int) fixp->fx_r_type > 0);
+ /* Emit "addq litreg, base, target". */
- reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type);
- if (reloc->howto == NULL)
- {
- as_bad_where (fixp->fx_file, fixp->fx_line,
- _("cannot represent `%s' relocation in object file"),
- bfd_get_reloc_code_name (fixp->fx_r_type));
- return NULL;
- }
-
- if (!fixp->fx_pcrel != !reloc->howto->pc_relative)
- {
- as_fatal (_("internal error? cannot generate `%s' relocation"),
- bfd_get_reloc_code_name (fixp->fx_r_type));
- }
- assert (!fixp->fx_pcrel == !reloc->howto->pc_relative);
+ if (basereg != AXP_REG_ZERO)
+ {
+ set_tok_reg (newtok[1], basereg);
+ set_tok_reg (newtok[2], targreg);
+ assemble_tokens ("addq", newtok, 3, 0);
+ }
+#endif /* !OBJ_EVAX */
-#ifdef OBJ_ECOFF
- if (fixp->fx_r_type == BFD_RELOC_ALPHA_LITERAL)
- {
- /* fake out bfd_perform_relocation. sigh */
- reloc->addend = -alpha_gp_value;
+ if (poffset)
+ set_tok_const (*poffset, 0);
+ *pbasereg = targreg;
}
else
-#endif
{
- reloc->addend = fixp->fx_offset;
-#ifdef OBJ_ELF
- /*
- * Ohhh, this is ugly. The problem is that if this is a local global
- * symbol, the relocation will entirely be performed at link time, not
- * at assembly time. bfd_perform_reloc doesn't know about this sort
- * of thing, and as a result we need to fake it out here.
- */
- if ((S_IS_EXTERN (fixp->fx_addsy) || S_IS_WEAK (fixp->fx_addsy))
- && !S_IS_COMMON (fixp->fx_addsy))
- reloc->addend -= symbol_get_bfdsym (fixp->fx_addsy)->value;
-#endif
- }
+ offsetT low, high, extra, tmp;
- return reloc;
-}
+ /* For 32-bit operands, break up the addend. */
-/* Parse a register name off of the input_line and return a register
- number. Gets md_undefined_symbol above to do the register name
- matching for us.
+ low = sign_extend_16 (addend);
+ tmp = addend - low;
+ high = sign_extend_16 (tmp >> 16);
- Only called as a part of processing the ECOFF .frame directive. */
+ if (tmp - (high << 16))
+ {
+ extra = 0x4000;
+ tmp -= 0x40000000;
+ high = sign_extend_16 (tmp >> 16);
+ }
+ else
+ extra = 0;
-int
-tc_get_register (frame)
- int frame ATTRIBUTE_UNUSED;
-{
- int framereg = AXP_REG_SP;
+ set_tok_reg (newtok[0], targreg);
+ set_tok_preg (newtok[2], basereg);
- SKIP_WHITESPACE ();
- if (*input_line_pointer == '$')
- {
- char *s = input_line_pointer;
- char c = get_symbol_end ();
- symbolS *sym = md_undefined_symbol (s);
+ if (extra)
+ {
+ /* Emit "ldah r, extra(r). */
+ set_tok_const (newtok[1], extra);
+ assemble_tokens ("ldah", newtok, 3, 0);
+ set_tok_preg (newtok[2], basereg = targreg);
+ }
- *strchr (s, '\0') = c;
- if (sym && (framereg = S_GET_VALUE (sym)) <= 31)
- goto found;
+ if (high)
+ {
+ /* Emit "ldah r, high(r). */
+ set_tok_const (newtok[1], high);
+ assemble_tokens ("ldah", newtok, 3, 0);
+ basereg = targreg;
+ set_tok_preg (newtok[2], basereg);
+ }
+
+ if ((low && !poffset) || (!poffset && basereg != targreg))
+ {
+ /* Emit "lda r, low(base)". */
+ set_tok_const (newtok[1], low);
+ assemble_tokens ("lda", newtok, 3, 0);
+ basereg = targreg;
+ low = 0;
+ }
+
+ if (poffset)
+ set_tok_const (*poffset, low);
+ *pbasereg = basereg;
}
- as_warn (_("frame reg expected, using $%d."), framereg);
-found:
- note_gpreg (framereg);
- return framereg;
+ return emit_lituse;
}
-/* This is called before the symbol table is processed. In order to
- work with gcc when using mips-tfile, we must keep all local labels.
- However, in other cases, we want to discard them. If we were
- called with -g, but we didn't see any debugging information, it may
- mean that gcc is smuggling debugging information through to
- mips-tfile, in which case we must generate all local labels. */
-
-#ifdef OBJ_ECOFF
+/* The lda macro differs from the lda instruction in that it handles
+ most simple expressions, particularly symbol address loads and
+ large constants. */
-void
-alpha_frob_file_before_adjust ()
+static void
+emit_lda (const expressionS *tok,
+ int ntok,
+ const void * unused ATTRIBUTE_UNUSED)
{
- if (alpha_debug != 0
- && ! ecoff_debugging_seen)
- flag_keep_locals = 1;
+ int basereg;
+
+ if (ntok == 2)
+ basereg = (tok[1].X_op == O_constant ? AXP_REG_ZERO : alpha_gp_register);
+ else
+ basereg = tok[2].X_add_number;
+
+ (void) load_expression (tok[0].X_add_number, &tok[1], &basereg, NULL);
}
-#endif /* OBJ_ECOFF */
-\f
-#ifdef RELOC_OP_P
+/* The ldah macro differs from the ldah instruction in that it has $31
+ as an implied base register. */
-/* Before the relocations are written, reorder them, so that user
- supplied !lituse relocations follow the appropriate !literal
- relocations. Also convert the gas-internal relocations to the
- appropriate linker relocations. */
+static void
+emit_ldah (const expressionS *tok,
+ int ntok ATTRIBUTE_UNUSED,
+ const void * unused ATTRIBUTE_UNUSED)
+{
+ expressionS newtok[3];
-void
-alpha_adjust_symtab ()
+ newtok[0] = tok[0];
+ newtok[1] = tok[1];
+ set_tok_preg (newtok[2], AXP_REG_ZERO);
+
+ assemble_tokens ("ldah", newtok, 3, 0);
+}
+
+/* Called internally to handle all alignment needs. This takes care
+ of eliding calls to frag_align if'n the cached current alignment
+ says we've already got it, as well as taking care of the auto-align
+ feature wrt labels. */
+
+static void
+alpha_align (int n,
+ char *pfill,
+ symbolS *label,
+ int force ATTRIBUTE_UNUSED)
{
- if (alpha_literal_hash)
+ if (alpha_current_align >= n)
+ return;
+
+ if (pfill == NULL)
{
-#ifdef DEBUG2_ALPHA
- fprintf (stderr, "alpha_adjust_symtab called\n");
-#endif
+ if (subseg_text_p (now_seg))
+ frag_align_code (n, 0);
+ else
+ frag_align (n, 0, 0);
+ }
+ else
+ frag_align (n, *pfill, 0);
- /* Go over each section, reordering the relocations so that all
- of the explicit LITUSE's are adjacent to the explicit
- LITERAL's. */
- bfd_map_over_sections (stdoutput, alpha_adjust_symtab_relocs,
- (char *) 0);
+ alpha_current_align = n;
+
+ if (label != NULL && S_GET_SEGMENT (label) == now_seg)
+ {
+ symbol_set_frag (label, frag_now);
+ S_SET_VALUE (label, (valueT) frag_now_fix ());
}
+
+ record_alignment (now_seg, n);
+
+ /* ??? If alpha_flag_relax && force && elf, record the requested alignment
+ in a reloc for the linker to see. */
}
-\f
-/* Inner function to move LITUSE's next to the LITERAL. */
+
+/* Actually output an instruction with its fixup. */
static void
-alpha_adjust_symtab_relocs (abfd, sec, ptr)
- bfd *abfd ATTRIBUTE_UNUSED;
- asection *sec;
- PTR ptr ATTRIBUTE_UNUSED;
+emit_insn (struct alpha_insn *insn)
{
- segment_info_type *seginfo = seg_info (sec);
- fixS **prevP;
- fixS *fixp;
- fixS *next;
- fixS *lituse;
- int n_lituses = 0;
+ char *f;
+ int i;
-#ifdef DEBUG2_ALPHA
- int n = 0;
- int n_literals = 0;
- int n_dup_literals = 0;
-#endif
+ /* Take care of alignment duties. */
+ if (alpha_auto_align_on && alpha_current_align < 2)
+ alpha_align (2, (char *) NULL, alpha_insn_label, 0);
+ if (alpha_current_align > 2)
+ alpha_current_align = 2;
+ alpha_insn_label = NULL;
- /* If seginfo is NULL, we did not create this section; don't do
- anything with it. By using a pointer to a pointer, we can update
- the links in place. */
- if (seginfo == NULL)
- return;
+ /* Write out the instruction. */
+ f = frag_more (4);
+ md_number_to_chars (f, insn->insn, 4);
- /* If there are no relocations, skip the section. */
- if (! seginfo->fix_root)
- return;
+#ifdef OBJ_ELF
+ dwarf2_emit_insn (4);
+#endif
- /* First rebuild the fixup chain without the expicit lituse's. */
- prevP = &(seginfo->fix_root);
- for (fixp = seginfo->fix_root; fixp; fixp = next)
+ /* Apply the fixups in order. */
+ for (i = 0; i < insn->nfixups; ++i)
{
- next = fixp->fx_next;
- fixp->fx_next = (fixS *) 0;
-#ifdef DEBUG2_ALPHA
- n++;
-#endif
+ const struct alpha_operand *operand = (const struct alpha_operand *) 0;
+ struct alpha_fixup *fixup = &insn->fixups[i];
+ struct alpha_reloc_tag *info = NULL;
+ int size, pcrel;
+ fixS *fixP;
- switch (fixp->fx_r_type)
+ /* Some fixups are only used internally and so have no howto. */
+ if ((int) fixup->reloc < 0)
{
- default:
- *prevP = fixp;
- prevP = &(fixp->fx_next);
-#ifdef DEBUG2_ALPHA
- fprintf (stderr,
- "alpha_adjust_symtab_relocs: 0x%lx, other relocation %s\n",
- (long) fixp,
- bfd_get_reloc_code_name (fixp->fx_r_type));
-#endif
- break;
+ operand = &alpha_operands[-(int) fixup->reloc];
+ size = 4;
+ pcrel = ((operand->flags & AXP_OPERAND_RELATIVE) != 0);
+ }
+ else if (fixup->reloc > BFD_RELOC_UNUSED
+ || fixup->reloc == BFD_RELOC_ALPHA_GPDISP_HI16
+ || fixup->reloc == BFD_RELOC_ALPHA_GPDISP_LO16)
+ {
+ size = 2;
+ pcrel = 0;
+ }
+ else
+ {
+ reloc_howto_type *reloc_howto
+ = bfd_reloc_type_lookup (stdoutput, fixup->reloc);
+ assert (reloc_howto);
- case BFD_RELOC_ALPHA_USER_LITERAL:
- *prevP = fixp;
- prevP = &(fixp->fx_next);
- /* prevent assembler from trying to adjust the offset */
-#ifdef DEBUG2_ALPHA
- n_literals++;
- if (fixp->tc_fix_data.info->n_literals != 1)
- n_dup_literals++;
- fprintf (stderr,
- "alpha_adjust_symtab_relocs: 0x%lx, !literal!%.6d, # literals = %2d\n",
- (long) fixp,
- fixp->tc_fix_data.info->sequence,
- fixp->tc_fix_data.info->n_literals);
-#endif
- break;
+ size = bfd_get_reloc_size (reloc_howto);
+ assert (size >= 1 && size <= 4);
- /* do not link in lituse's */
- case BFD_RELOC_ALPHA_USER_LITUSE_BASE:
- case BFD_RELOC_ALPHA_USER_LITUSE_BYTOFF:
- case BFD_RELOC_ALPHA_USER_LITUSE_JSR:
- n_lituses++;
- if (fixp->tc_fix_data.info->n_literals == 0)
- as_bad_where (fixp->fx_file, fixp->fx_line,
- _("No !literal!%d was found"),
- fixp->tc_fix_data.info->sequence);
-#ifdef DEBUG2_ALPHA
- fprintf (stderr,
- "alpha_adjust_symtab_relocs: 0x%lx, !lituse !%.6d, # lituses = %2d, next_lituse = 0x%lx\n",
- (long) fixp,
- fixp->tc_fix_data.info->sequence,
- fixp->tc_fix_data.info->n_lituses,
- (long) fixp->tc_fix_data.next_lituse);
-#endif
- break;
+ pcrel = reloc_howto->pc_relative;
}
- }
- /* If there were any lituses, go and add them to the chain, unless there is
- more than one !literal for a given sequence number. They are linked
- through the next_lituse field in reverse order, so as we go through the
- next_lituse chain, we effectively reverse the chain once again. If there
- was more than one !literal, we fall back to loading up the address w/o
- optimization. Also, if the !literals/!lituses are spread in different
- segments (happens in the Linux kernel semaphores), suppress the
- optimization. */
- if (n_lituses)
- {
- for (fixp = seginfo->fix_root; fixp; fixp = fixp->fx_next)
+ fixP = fix_new_exp (frag_now, f - frag_now->fr_literal, size,
+ &fixup->exp, pcrel, fixup->reloc);
+
+ /* Turn off complaints that the addend is too large for some fixups,
+ and copy in the sequence number for the explicit relocations. */
+ switch (fixup->reloc)
{
- switch (fixp->fx_r_type)
- {
- default:
- break;
+ case BFD_RELOC_ALPHA_HINT:
+ case BFD_RELOC_GPREL32:
+ case BFD_RELOC_GPREL16:
+ case BFD_RELOC_ALPHA_GPREL_HI16:
+ case BFD_RELOC_ALPHA_GPREL_LO16:
+ case BFD_RELOC_ALPHA_GOTDTPREL16:
+ case BFD_RELOC_ALPHA_DTPREL_HI16:
+ case BFD_RELOC_ALPHA_DTPREL_LO16:
+ case BFD_RELOC_ALPHA_DTPREL16:
+ case BFD_RELOC_ALPHA_GOTTPREL16:
+ case BFD_RELOC_ALPHA_TPREL_HI16:
+ case BFD_RELOC_ALPHA_TPREL_LO16:
+ case BFD_RELOC_ALPHA_TPREL16:
+ fixP->fx_no_overflow = 1;
+ break;
- case BFD_RELOC_ALPHA_USER_LITERAL:
-#ifdef OBJ_ELF
- fixp->fx_r_type = BFD_RELOC_ALPHA_ELF_LITERAL;
-#else
- fixp->fx_r_type = BFD_RELOC_ALPHA_LITERAL; /* XXX check this */
-#endif
- if (fixp->tc_fix_data.info->n_literals == 1
- && ! fixp->tc_fix_data.info->multi_section_p)
- {
- for (lituse = fixp->tc_fix_data.info->lituse;
- lituse != (fixS *) 0;
- lituse = lituse->tc_fix_data.next_lituse)
- {
- lituse->fx_next = fixp->fx_next;
- fixp->fx_next = lituse;
- }
- }
- break;
+ case BFD_RELOC_ALPHA_GPDISP_HI16:
+ fixP->fx_no_overflow = 1;
+ fixP->fx_addsy = section_symbol (now_seg);
+ fixP->fx_offset = 0;
- case BFD_RELOC_ALPHA_USER_LITUSE_BASE:
- case BFD_RELOC_ALPHA_USER_LITUSE_BYTOFF:
- case BFD_RELOC_ALPHA_USER_LITUSE_JSR:
- fixp->fx_r_type = BFD_RELOC_ALPHA_LITUSE;
- break;
- }
- }
- }
+ info = get_alpha_reloc_tag (insn->sequence);
+ if (++info->n_master > 1)
+ as_bad (_("too many ldah insns for !gpdisp!%ld"), insn->sequence);
+ if (info->segment != now_seg)
+ as_bad (_("both insns for !gpdisp!%ld must be in the same section"),
+ insn->sequence);
+ fixP->tc_fix_data.info = info;
+ break;
-#ifdef DEBUG2_ALPHA
- fprintf (stderr, "alpha_adjust_symtab_relocs: %s, %d literal%s, %d duplicate literal%s, %d lituse%s\n\n",
- sec->name,
- n_literals, (n_literals == 1) ? "" : "s",
- n_dup_literals, (n_dup_literals == 1) ? "" : "s",
- n_lituses, (n_lituses == 1) ? "" : "s");
-#endif
-}
+ case BFD_RELOC_ALPHA_GPDISP_LO16:
+ fixP->fx_no_overflow = 1;
-#endif /* RELOC_OP_P */
-\f
-#ifdef DEBUG_ALPHA
-static void
-debug_exp (tok, ntok)
- expressionS tok[];
- int ntok;
-{
- int i;
+ info = get_alpha_reloc_tag (insn->sequence);
+ if (++info->n_slaves > 1)
+ as_bad (_("too many lda insns for !gpdisp!%ld"), insn->sequence);
+ if (info->segment != now_seg)
+ as_bad (_("both insns for !gpdisp!%ld must be in the same section"),
+ insn->sequence);
+ fixP->tc_fix_data.info = info;
+ info->slaves = fixP;
+ break;
- fprintf (stderr, "debug_exp: %d tokens", ntok);
- for (i = 0; i < ntok; i++)
+ case BFD_RELOC_ALPHA_LITERAL:
+ case BFD_RELOC_ALPHA_ELF_LITERAL:
+ fixP->fx_no_overflow = 1;
+
+ if (insn->sequence == 0)
+ break;
+ info = get_alpha_reloc_tag (insn->sequence);
+ info->master = fixP;
+ info->n_master++;
+ if (info->segment != now_seg)
+ info->multi_section_p = 1;
+ fixP->tc_fix_data.info = info;
+ break;
+
+#ifdef RELOC_OP_P
+ case DUMMY_RELOC_LITUSE_ADDR:
+ fixP->fx_offset = LITUSE_ALPHA_ADDR;
+ goto do_lituse;
+ case DUMMY_RELOC_LITUSE_BASE:
+ fixP->fx_offset = LITUSE_ALPHA_BASE;
+ goto do_lituse;
+ case DUMMY_RELOC_LITUSE_BYTOFF:
+ fixP->fx_offset = LITUSE_ALPHA_BYTOFF;
+ goto do_lituse;
+ case DUMMY_RELOC_LITUSE_JSR:
+ fixP->fx_offset = LITUSE_ALPHA_JSR;
+ goto do_lituse;
+ case DUMMY_RELOC_LITUSE_TLSGD:
+ fixP->fx_offset = LITUSE_ALPHA_TLSGD;
+ goto do_lituse;
+ case DUMMY_RELOC_LITUSE_TLSLDM:
+ fixP->fx_offset = LITUSE_ALPHA_TLSLDM;
+ goto do_lituse;
+ do_lituse:
+ fixP->fx_addsy = section_symbol (now_seg);
+ fixP->fx_r_type = BFD_RELOC_ALPHA_LITUSE;
+
+ info = get_alpha_reloc_tag (insn->sequence);
+ if (fixup->reloc == DUMMY_RELOC_LITUSE_TLSGD)
+ info->saw_lu_tlsgd = 1;
+ else if (fixup->reloc == DUMMY_RELOC_LITUSE_TLSLDM)
+ info->saw_lu_tlsldm = 1;
+ if (++info->n_slaves > 1)
+ {
+ if (info->saw_lu_tlsgd)
+ as_bad (_("too many lituse insns for !lituse_tlsgd!%ld"),
+ insn->sequence);
+ else if (info->saw_lu_tlsldm)
+ as_bad (_("too many lituse insns for !lituse_tlsldm!%ld"),
+ insn->sequence);
+ }
+ fixP->tc_fix_data.info = info;
+ fixP->tc_fix_data.next_reloc = info->slaves;
+ info->slaves = fixP;
+ if (info->segment != now_seg)
+ info->multi_section_p = 1;
+ break;
+
+ case BFD_RELOC_ALPHA_TLSGD:
+ fixP->fx_no_overflow = 1;
+
+ if (insn->sequence == 0)
+ break;
+ info = get_alpha_reloc_tag (insn->sequence);
+ if (info->saw_tlsgd)
+ as_bad (_("duplicate !tlsgd!%ld"), insn->sequence);
+ else if (info->saw_tlsldm)
+ as_bad (_("sequence number in use for !tlsldm!%ld"),
+ insn->sequence);
+ else
+ info->saw_tlsgd = 1;
+ fixP->tc_fix_data.info = info;
+ break;
+
+ case BFD_RELOC_ALPHA_TLSLDM:
+ fixP->fx_no_overflow = 1;
+
+ if (insn->sequence == 0)
+ break;
+ info = get_alpha_reloc_tag (insn->sequence);
+ if (info->saw_tlsldm)
+ as_bad (_("duplicate !tlsldm!%ld"), insn->sequence);
+ else if (info->saw_tlsgd)
+ as_bad (_("sequence number in use for !tlsgd!%ld"),
+ insn->sequence);
+ else
+ info->saw_tlsldm = 1;
+ fixP->tc_fix_data.info = info;
+ break;
+#endif
+ default:
+ if ((int) fixup->reloc < 0)
+ {
+ if (operand->flags & AXP_OPERAND_NOOVERFLOW)
+ fixP->fx_no_overflow = 1;
+ }
+ break;
+ }
+ }
+}
+
+/* Insert an operand value into an instruction. */
+
+static unsigned
+insert_operand (unsigned insn,
+ const struct alpha_operand *operand,
+ offsetT val,
+ char *file,
+ unsigned line)
+{
+ if (operand->bits != 32 && !(operand->flags & AXP_OPERAND_NOOVERFLOW))
{
- expressionS *t = &tok[i];
- const char *name;
- switch (t->X_op)
+ offsetT min, max;
+
+ if (operand->flags & AXP_OPERAND_SIGNED)
{
- default: name = "unknown"; break;
- case O_illegal: name = "O_illegal"; break;
- case O_absent: name = "O_absent"; break;
- case O_constant: name = "O_constant"; break;
- case O_symbol: name = "O_symbol"; break;
- case O_symbol_rva: name = "O_symbol_rva"; break;
- case O_register: name = "O_register"; break;
- case O_big: name = "O_big"; break;
- case O_uminus: name = "O_uminus"; break;
- case O_bit_not: name = "O_bit_not"; break;
- case O_logical_not: name = "O_logical_not"; break;
- case O_multiply: name = "O_multiply"; break;
- case O_divide: name = "O_divide"; break;
- case O_modulus: name = "O_modulus"; break;
- case O_left_shift: name = "O_left_shift"; break;
- case O_right_shift: name = "O_right_shift"; break;
- case O_bit_inclusive_or: name = "O_bit_inclusive_or"; break;
- case O_bit_or_not: name = "O_bit_or_not"; break;
- case O_bit_exclusive_or: name = "O_bit_exclusive_or"; break;
- case O_bit_and: name = "O_bit_and"; break;
- case O_add: name = "O_add"; break;
- case O_subtract: name = "O_subtract"; break;
- case O_eq: name = "O_eq"; break;
- case O_ne: name = "O_ne"; break;
- case O_lt: name = "O_lt"; break;
- case O_le: name = "O_le"; break;
- case O_ge: name = "O_ge"; break;
- case O_gt: name = "O_gt"; break;
- case O_logical_and: name = "O_logical_and"; break;
- case O_logical_or: name = "O_logical_or"; break;
- case O_index: name = "O_index"; break;
- case O_pregister: name = "O_pregister"; break;
- case O_cpregister: name = "O_cpregister"; break;
- case O_literal: name = "O_literal"; break;
- case O_lituse_base: name = "O_lituse_base"; break;
- case O_lituse_bytoff: name = "O_lituse_bytoff"; break;
- case O_lituse_jsr: name = "O_lituse_jsr"; break;
- case O_gpdisp: name = "O_gpdisp"; break;
- case O_gprelhigh: name = "O_gprelhigh"; break;
- case O_gprellow: name = "O_gprellow"; break;
- case O_md10: name = "O_md10"; break;
- case O_md11: name = "O_md11"; break;
- case O_md12: name = "O_md12"; break;
- case O_md13: name = "O_md13"; break;
- case O_md14: name = "O_md14"; break;
- case O_md15: name = "O_md15"; break;
- case O_md16: name = "O_md16"; break;
+ max = (1 << (operand->bits - 1)) - 1;
+ min = -(1 << (operand->bits - 1));
+ }
+ else
+ {
+ max = (1 << operand->bits) - 1;
+ min = 0;
}
- fprintf (stderr, ", %s(%s, %s, %d)", name,
- (t->X_add_symbol) ? S_GET_NAME (t->X_add_symbol) : "--",
- (t->X_op_symbol) ? S_GET_NAME (t->X_op_symbol) : "--",
- (int) t->X_add_number);
+ if (val < min || val > max)
+ as_warn_value_out_of_range (_("operand"), val, min, max, file, line);
}
- fprintf (stderr, "\n");
- fflush (stderr);
+
+ if (operand->insert)
+ {
+ const char *errmsg = NULL;
+
+ insn = (*operand->insert) (insn, val, &errmsg);
+ if (errmsg)
+ as_warn (errmsg);
+ }
+ else
+ insn |= ((val & ((1 << operand->bits) - 1)) << operand->shift);
+
+ return insn;
}
-#endif
-/* Parse the arguments to an opcode. */
+/* Turn an opcode description and a set of arguments into
+ an instruction and a fixup. */
-static int
-tokenize_arguments (str, tok, ntok)
- char *str;
- expressionS tok[];
- int ntok;
+static void
+assemble_insn (const struct alpha_opcode *opcode,
+ const expressionS *tok,
+ int ntok,
+ struct alpha_insn *insn,
+ bfd_reloc_code_real_type reloc)
{
- expressionS *end_tok = tok + ntok;
- char *old_input_line_pointer;
- int saw_comma = 0, saw_arg = 0;
-#ifdef DEBUG_ALPHA
- expressionS *orig_tok = tok;
-#endif
-#ifdef RELOC_OP_P
- char *p;
- const struct alpha_reloc_op_tag *r;
- int c, i;
- size_t len;
- int reloc_found_p = 0;
-#endif
-
- memset (tok, 0, sizeof (*tok) * ntok);
+ const struct alpha_operand *reloc_operand = NULL;
+ const expressionS *reloc_exp = NULL;
+ const unsigned char *argidx;
+ unsigned image;
+ int tokidx = 0;
- /* Save and restore input_line_pointer around this function */
- old_input_line_pointer = input_line_pointer;
- input_line_pointer = str;
+ memset (insn, 0, sizeof (*insn));
+ image = opcode->opcode;
- while (tok < end_tok && *input_line_pointer)
+ for (argidx = opcode->operands; *argidx; ++argidx)
{
- SKIP_WHITESPACE ();
- switch (*input_line_pointer)
+ const struct alpha_operand *operand = &alpha_operands[*argidx];
+ const expressionS *t = (const expressionS *) 0;
+
+ if (operand->flags & AXP_OPERAND_FAKE)
{
- case '\0':
- goto fini;
+ /* Fake operands take no value and generate no fixup. */
+ image = insert_operand (image, operand, 0, NULL, 0);
+ continue;
+ }
-#ifdef RELOC_OP_P
- case '!':
- /* A relocation operand can be placed after the normal operand on an
- assembly language statement, and has the following form:
- !relocation_type!sequence_number. */
- if (reloc_found_p)
- { /* only support one relocation op per insn */
- as_bad (_("More than one relocation op per insn"));
- goto err_report;
+ if (tokidx >= ntok)
+ {
+ switch (operand->flags & AXP_OPERAND_OPTIONAL_MASK)
+ {
+ case AXP_OPERAND_DEFAULT_FIRST:
+ t = &tok[0];
+ break;
+ case AXP_OPERAND_DEFAULT_SECOND:
+ t = &tok[1];
+ break;
+ case AXP_OPERAND_DEFAULT_ZERO:
+ {
+ static expressionS zero_exp;
+ t = &zero_exp;
+ zero_exp.X_op = O_constant;
+ zero_exp.X_unsigned = 1;
+ }
+ break;
+ default:
+ abort ();
}
+ }
+ else
+ t = &tok[tokidx++];
- if (!saw_arg)
- goto err;
+ switch (t->X_op)
+ {
+ case O_register:
+ case O_pregister:
+ case O_cpregister:
+ image = insert_operand (image, operand, regno (t->X_add_number),
+ NULL, 0);
+ break;
- for (p = ++input_line_pointer;
- ((c = *p) != '!' && c != ';' && c != '#' && c != ','
- && !is_end_of_line[c]);
- p++)
- ;
+ case O_constant:
+ image = insert_operand (image, operand, t->X_add_number, NULL, 0);
+ assert (reloc_operand == NULL);
+ reloc_operand = operand;
+ reloc_exp = t;
+ break;
- /* Parse !relocation_type */
- len = p - input_line_pointer;
- if (len == 0)
- {
- as_bad (_("No relocation operand"));
- goto err_report;
- }
+ default:
+ /* This is only 0 for fields that should contain registers,
+ which means this pattern shouldn't have matched. */
+ if (operand->default_reloc == 0)
+ abort ();
- if (c != '!')
+ /* There is one special case for which an insn receives two
+ relocations, and thus the user-supplied reloc does not
+ override the operand reloc. */
+ if (operand->default_reloc == BFD_RELOC_ALPHA_HINT)
{
- as_bad (_("No !sequence-number after !%s"), input_line_pointer);
- goto err_report;
- }
+ struct alpha_fixup *fixup;
- r = &alpha_reloc_op[0];
- for (i = alpha_num_reloc_op - 1; i >= 0; i--, r++)
- {
- if (len == r->length
- && memcmp (input_line_pointer, r->name, len) == 0)
- break;
+ if (insn->nfixups >= MAX_INSN_FIXUPS)
+ as_fatal (_("too many fixups"));
+
+ fixup = &insn->fixups[insn->nfixups++];
+ fixup->exp = *t;
+ fixup->reloc = BFD_RELOC_ALPHA_HINT;
}
- if (i < 0)
+ else
{
- as_bad (_("Unknown relocation operand: !%s"),
- input_line_pointer);
- goto err_report;
+ if (reloc == BFD_RELOC_UNUSED)
+ reloc = operand->default_reloc;
+
+ assert (reloc_operand == NULL);
+ reloc_operand = operand;
+ reloc_exp = t;
}
+ break;
+ }
+ }
- input_line_pointer = ++p;
+ if (reloc != BFD_RELOC_UNUSED)
+ {
+ struct alpha_fixup *fixup;
- /* Parse !sequence_number */
- memset (tok, '\0', sizeof (expressionS));
- expression (tok);
+ if (insn->nfixups >= MAX_INSN_FIXUPS)
+ as_fatal (_("too many fixups"));
+
+ /* ??? My but this is hacky. But the OSF/1 assembler uses the same
+ relocation tag for both ldah and lda with gpdisp. Choose the
+ correct internal relocation based on the opcode. */
+ if (reloc == BFD_RELOC_ALPHA_GPDISP)
+ {
+ if (strcmp (opcode->name, "ldah") == 0)
+ reloc = BFD_RELOC_ALPHA_GPDISP_HI16;
+ else if (strcmp (opcode->name, "lda") == 0)
+ reloc = BFD_RELOC_ALPHA_GPDISP_LO16;
+ else
+ as_bad (_("invalid relocation for instruction"));
+ }
- if (tok->X_op != O_constant
- || ! ALPHA_RELOC_SEQUENCE_OK (tok->X_add_number))
+ /* If this is a real relocation (as opposed to a lituse hint), then
+ the relocation width should match the operand width. */
+ else if (reloc < BFD_RELOC_UNUSED)
+ {
+ reloc_howto_type *reloc_howto
+ = bfd_reloc_type_lookup (stdoutput, reloc);
+ if (reloc_howto->bitsize != reloc_operand->bits)
{
- as_bad (_("Bad sequence number: !%s!%s"),
- r->name, input_line_pointer);
- goto err_report;
+ as_bad (_("invalid relocation for field"));
+ return;
}
+ }
- tok->X_op = r->op;
- reloc_found_p = 1;
- ++tok;
- break;
-#endif
+ fixup = &insn->fixups[insn->nfixups++];
+ if (reloc_exp)
+ fixup->exp = *reloc_exp;
+ else
+ fixup->exp.X_op = O_absent;
+ fixup->reloc = reloc;
+ }
- case ',':
- ++input_line_pointer;
- if (saw_comma || !saw_arg)
- goto err;
- saw_comma = 1;
- break;
+ insn->insn = image;
+}
- case '(':
- {
- char *hold = input_line_pointer++;
+/* Handle all "simple" integer register loads -- ldq, ldq_l, ldq_u,
+ etc. They differ from the real instructions in that they do simple
+ expressions like the lda macro. */
- /* First try for parenthesized register ... */
- expression (tok);
- if (*input_line_pointer == ')' && tok->X_op == O_register)
- {
- tok->X_op = (saw_comma ? O_cpregister : O_pregister);
- saw_comma = 0;
- saw_arg = 1;
- ++input_line_pointer;
- ++tok;
- break;
- }
+static void
+emit_ir_load (const expressionS *tok,
+ int ntok,
+ const void * opname)
+{
+ int basereg;
+ long lituse;
+ expressionS newtok[3];
+ struct alpha_insn insn;
- /* ... then fall through to plain expression */
- input_line_pointer = hold;
- }
+ if (ntok == 2)
+ basereg = (tok[1].X_op == O_constant ? AXP_REG_ZERO : alpha_gp_register);
+ else
+ basereg = tok[2].X_add_number;
- default:
- if (saw_arg && !saw_comma)
- goto err;
+ lituse = load_expression (tok[0].X_add_number, &tok[1], &basereg,
+ &newtok[1]);
- expression (tok);
- if (tok->X_op == O_illegal || tok->X_op == O_absent)
- goto err;
+ newtok[0] = tok[0];
+ set_tok_preg (newtok[2], basereg);
- saw_comma = 0;
- saw_arg = 1;
- ++tok;
- break;
- }
+ assemble_tokens_to_insn ((const char *) opname, newtok, 3, &insn);
+
+ if (lituse)
+ {
+ assert (insn.nfixups < MAX_INSN_FIXUPS);
+ insn.fixups[insn.nfixups].reloc = DUMMY_RELOC_LITUSE_BASE;
+ insn.fixups[insn.nfixups].exp.X_op = O_absent;
+ insn.nfixups++;
+ insn.sequence = lituse;
}
-fini:
- if (saw_comma)
- goto err;
- input_line_pointer = old_input_line_pointer;
+ emit_insn (&insn);
+}
-#ifdef DEBUG_ALPHA
- debug_exp (orig_tok, ntok - (end_tok - tok));
-#endif
+/* Handle fp register loads, and both integer and fp register stores.
+ Again, we handle simple expressions. */
- return ntok - (end_tok - tok);
+static void
+emit_loadstore (const expressionS *tok,
+ int ntok,
+ const void * opname)
+{
+ int basereg;
+ long lituse;
+ expressionS newtok[3];
+ struct alpha_insn insn;
-err:
- input_line_pointer = old_input_line_pointer;
- return TOKENIZE_ERROR;
+ if (ntok == 2)
+ basereg = (tok[1].X_op == O_constant ? AXP_REG_ZERO : alpha_gp_register);
+ else
+ basereg = tok[2].X_add_number;
-#ifdef RELOC_OP_P
-err_report:
- input_line_pointer = old_input_line_pointer;
- return TOKENIZE_ERROR_REPORT;
-#endif
-}
+ if (tok[1].X_op != O_constant || !range_signed_16 (tok[1].X_add_number))
+ {
+ if (alpha_noat_on)
+ as_bad (_("macro requires $at register while noat in effect"));
-/* Search forward through all variants of an opcode looking for a
- syntax match. */
+ lituse = load_expression (AXP_REG_AT, &tok[1], &basereg, &newtok[1]);
+ }
+ else
+ {
+ newtok[1] = tok[1];
+ lituse = 0;
+ }
-static const struct alpha_opcode *
-find_opcode_match (first_opcode, tok, pntok, pcpumatch)
- const struct alpha_opcode *first_opcode;
- const expressionS *tok;
- int *pntok;
- int *pcpumatch;
-{
- const struct alpha_opcode *opcode = first_opcode;
- int ntok = *pntok;
- int got_cpu_match = 0;
+ newtok[0] = tok[0];
+ set_tok_preg (newtok[2], basereg);
- do
- {
- const unsigned char *opidx;
- int tokidx = 0;
+ assemble_tokens_to_insn ((const char *) opname, newtok, 3, &insn);
- /* Don't match opcodes that don't exist on this architecture */
- if (!(opcode->flags & alpha_target))
- goto match_failed;
+ if (lituse)
+ {
+ assert (insn.nfixups < MAX_INSN_FIXUPS);
+ insn.fixups[insn.nfixups].reloc = DUMMY_RELOC_LITUSE_BASE;
+ insn.fixups[insn.nfixups].exp.X_op = O_absent;
+ insn.nfixups++;
+ insn.sequence = lituse;
+ }
- got_cpu_match = 1;
+ emit_insn (&insn);
+}
- for (opidx = opcode->operands; *opidx; ++opidx)
- {
- const struct alpha_operand *operand = &alpha_operands[*opidx];
+/* Load a half-word or byte as an unsigned value. */
- /* only take input from real operands */
- if (operand->flags & AXP_OPERAND_FAKE)
- continue;
+static void
+emit_ldXu (const expressionS *tok,
+ int ntok,
+ const void * vlgsize)
+{
+ if (alpha_target & AXP_OPCODE_BWX)
+ emit_ir_load (tok, ntok, ldXu_op[(long) vlgsize]);
+ else
+ {
+ expressionS newtok[3];
+ struct alpha_insn insn;
+ int basereg;
+ long lituse;
- /* when we expect input, make sure we have it */
- if (tokidx >= ntok)
- {
- if ((operand->flags & AXP_OPERAND_OPTIONAL_MASK) == 0)
- goto match_failed;
- continue;
- }
+ if (alpha_noat_on)
+ as_bad (_("macro requires $at register while noat in effect"));
- /* match operand type with expression type */
- switch (operand->flags & AXP_OPERAND_TYPECHECK_MASK)
- {
- case AXP_OPERAND_IR:
- if (tok[tokidx].X_op != O_register
- || !is_ir_num (tok[tokidx].X_add_number))
- goto match_failed;
- break;
- case AXP_OPERAND_FPR:
- if (tok[tokidx].X_op != O_register
- || !is_fpr_num (tok[tokidx].X_add_number))
- goto match_failed;
- break;
- case AXP_OPERAND_IR | AXP_OPERAND_PARENS:
- if (tok[tokidx].X_op != O_pregister
- || !is_ir_num (tok[tokidx].X_add_number))
- goto match_failed;
- break;
- case AXP_OPERAND_IR | AXP_OPERAND_PARENS | AXP_OPERAND_COMMA:
- if (tok[tokidx].X_op != O_cpregister
- || !is_ir_num (tok[tokidx].X_add_number))
- goto match_failed;
- break;
+ if (ntok == 2)
+ basereg = (tok[1].X_op == O_constant
+ ? AXP_REG_ZERO : alpha_gp_register);
+ else
+ basereg = tok[2].X_add_number;
- case AXP_OPERAND_RELATIVE:
- case AXP_OPERAND_SIGNED:
- case AXP_OPERAND_UNSIGNED:
- switch (tok[tokidx].X_op)
- {
- case O_illegal:
- case O_absent:
- case O_register:
- case O_pregister:
- case O_cpregister:
- goto match_failed;
+ /* Emit "lda $at, exp". */
+ lituse = load_expression (AXP_REG_AT, &tok[1], &basereg, NULL);
- default:
- break;
- }
- break;
+ /* Emit "ldq_u targ, 0($at)". */
+ newtok[0] = tok[0];
+ set_tok_const (newtok[1], 0);
+ set_tok_preg (newtok[2], basereg);
+ assemble_tokens_to_insn ("ldq_u", newtok, 3, &insn);
- default:
- /* everything else should have been fake */
- abort ();
- }
- ++tokidx;
+ if (lituse)
+ {
+ assert (insn.nfixups < MAX_INSN_FIXUPS);
+ insn.fixups[insn.nfixups].reloc = DUMMY_RELOC_LITUSE_BASE;
+ insn.fixups[insn.nfixups].exp.X_op = O_absent;
+ insn.nfixups++;
+ insn.sequence = lituse;
}
- /* possible match -- did we use all of our input? */
- if (tokidx == ntok)
+ emit_insn (&insn);
+
+ /* Emit "extXl targ, $at, targ". */
+ set_tok_reg (newtok[1], basereg);
+ newtok[2] = newtok[0];
+ assemble_tokens_to_insn (extXl_op[(long) vlgsize], newtok, 3, &insn);
+
+ if (lituse)
{
- *pntok = ntok;
- return opcode;
+ assert (insn.nfixups < MAX_INSN_FIXUPS);
+ insn.fixups[insn.nfixups].reloc = DUMMY_RELOC_LITUSE_BYTOFF;
+ insn.fixups[insn.nfixups].exp.X_op = O_absent;
+ insn.nfixups++;
+ insn.sequence = lituse;
}
- match_failed:;
+ emit_insn (&insn);
}
- while (++opcode - alpha_opcodes < alpha_num_opcodes
- && !strcmp (opcode->name, first_opcode->name));
+}
- if (*pcpumatch)
- *pcpumatch = got_cpu_match;
+/* Load a half-word or byte as a signed value. */
- return NULL;
+static void
+emit_ldX (const expressionS *tok,
+ int ntok,
+ const void * vlgsize)
+{
+ emit_ldXu (tok, ntok, vlgsize);
+ assemble_tokens (sextX_op[(long) vlgsize], tok, 1, 1);
}
-/* Search forward through all variants of a macro looking for a syntax
- match. */
+/* Load an integral value from an unaligned address as an unsigned
+ value. */
-static const struct alpha_macro *
-find_macro_match (first_macro, tok, pntok)
- const struct alpha_macro *first_macro;
- const expressionS *tok;
- int *pntok;
+static void
+emit_uldXu (const expressionS *tok,
+ int ntok,
+ const void * vlgsize)
{
- const struct alpha_macro *macro = first_macro;
- int ntok = *pntok;
-
- do
- {
- const enum alpha_macro_arg *arg = macro->argsets;
- int tokidx = 0;
+ long lgsize = (long) vlgsize;
+ expressionS newtok[3];
- while (*arg)
- {
- switch (*arg)
- {
- case MACRO_EOA:
- if (tokidx == ntok)
- return macro;
- else
- tokidx = 0;
- break;
+ if (alpha_noat_on)
+ as_bad (_("macro requires $at register while noat in effect"));
- /* index register */
- case MACRO_IR:
- if (tokidx >= ntok || tok[tokidx].X_op != O_register
- || !is_ir_num (tok[tokidx].X_add_number))
- goto match_failed;
- ++tokidx;
- break;
+ /* Emit "lda $at, exp". */
+ memcpy (newtok, tok, sizeof (expressionS) * ntok);
+ newtok[0].X_add_number = AXP_REG_AT;
+ assemble_tokens ("lda", newtok, ntok, 1);
- /* parenthesized index register */
- case MACRO_PIR:
- if (tokidx >= ntok || tok[tokidx].X_op != O_pregister
- || !is_ir_num (tok[tokidx].X_add_number))
- goto match_failed;
- ++tokidx;
- break;
+ /* Emit "ldq_u $t9, 0($at)". */
+ set_tok_reg (newtok[0], AXP_REG_T9);
+ set_tok_const (newtok[1], 0);
+ set_tok_preg (newtok[2], AXP_REG_AT);
+ assemble_tokens ("ldq_u", newtok, 3, 1);
- /* optional parenthesized index register */
- case MACRO_OPIR:
- if (tokidx < ntok && tok[tokidx].X_op == O_pregister
- && is_ir_num (tok[tokidx].X_add_number))
- ++tokidx;
- break;
+ /* Emit "ldq_u $t10, size-1($at)". */
+ set_tok_reg (newtok[0], AXP_REG_T10);
+ set_tok_const (newtok[1], (1 << lgsize) - 1);
+ assemble_tokens ("ldq_u", newtok, 3, 1);
- /* leading comma with a parenthesized index register */
- case MACRO_CPIR:
- if (tokidx >= ntok || tok[tokidx].X_op != O_cpregister
- || !is_ir_num (tok[tokidx].X_add_number))
- goto match_failed;
- ++tokidx;
- break;
-
- /* floating point register */
- case MACRO_FPR:
- if (tokidx >= ntok || tok[tokidx].X_op != O_register
- || !is_fpr_num (tok[tokidx].X_add_number))
- goto match_failed;
- ++tokidx;
- break;
+ /* Emit "extXl $t9, $at, $t9". */
+ set_tok_reg (newtok[0], AXP_REG_T9);
+ set_tok_reg (newtok[1], AXP_REG_AT);
+ set_tok_reg (newtok[2], AXP_REG_T9);
+ assemble_tokens (extXl_op[lgsize], newtok, 3, 1);
- /* normal expression */
- case MACRO_EXP:
- if (tokidx >= ntok)
- goto match_failed;
- switch (tok[tokidx].X_op)
- {
- case O_illegal:
- case O_absent:
- case O_register:
- case O_pregister:
- case O_cpregister:
-#ifdef RELOC_OP_P
- case O_literal:
- case O_lituse_base:
- case O_lituse_bytoff:
- case O_lituse_jsr:
- case O_gpdisp:
- case O_gprelhigh:
- case O_gprellow:
-#endif
- goto match_failed;
+ /* Emit "extXh $t10, $at, $t10". */
+ set_tok_reg (newtok[0], AXP_REG_T10);
+ set_tok_reg (newtok[2], AXP_REG_T10);
+ assemble_tokens (extXh_op[lgsize], newtok, 3, 1);
- default:
- break;
- }
- ++tokidx;
- break;
+ /* Emit "or $t9, $t10, targ". */
+ set_tok_reg (newtok[0], AXP_REG_T9);
+ set_tok_reg (newtok[1], AXP_REG_T10);
+ newtok[2] = tok[0];
+ assemble_tokens ("or", newtok, 3, 1);
+}
- /* optional !literal!<number> */
- case MACRO_LITERAL:
-#ifdef RELOC_OP_P
- if (tokidx < ntok && tok[tokidx].X_op == O_literal)
- tokidx++;
-#endif
- break;
+/* Load an integral value from an unaligned address as a signed value.
+ Note that quads should get funneled to the unsigned load since we
+ don't have to do the sign extension. */
- /* optional !lituse_base!<number> */
- case MACRO_BASE:
-#ifdef RELOC_OP_P
- if (tokidx < ntok && tok[tokidx].X_op == O_lituse_base)
- tokidx++;
-#endif
- break;
+static void
+emit_uldX (const expressionS *tok,
+ int ntok,
+ const void * vlgsize)
+{
+ emit_uldXu (tok, ntok, vlgsize);
+ assemble_tokens (sextX_op[(long) vlgsize], tok, 1, 1);
+}
- /* optional !lituse_bytoff!<number> */
- case MACRO_BYTOFF:
-#ifdef RELOC_OP_P
- if (tokidx < ntok && tok[tokidx].X_op == O_lituse_bytoff)
- tokidx++;
-#endif
- break;
+/* Implement the ldil macro. */
- /* optional !lituse_jsr!<number> */
- case MACRO_JSR:
-#ifdef RELOC_OP_P
- if (tokidx < ntok && tok[tokidx].X_op == O_lituse_jsr)
- tokidx++;
-#endif
- break;
+static void
+emit_ldil (const expressionS *tok,
+ int ntok,
+ const void * unused ATTRIBUTE_UNUSED)
+{
+ expressionS newtok[2];
- match_failed:
- while (*arg != MACRO_EOA)
- ++arg;
- tokidx = 0;
- break;
- }
- ++arg;
- }
- }
- while (++macro - alpha_macros < alpha_num_macros
- && !strcmp (macro->name, first_macro->name));
+ memcpy (newtok, tok, sizeof (newtok));
+ newtok[1].X_add_number = sign_extend_32 (tok[1].X_add_number);
- return NULL;
+ assemble_tokens ("lda", newtok, ntok, 1);
}
-/* Insert an operand value into an instruction. */
+/* Store a half-word or byte. */
-static unsigned
-insert_operand (insn, operand, val, file, line)
- unsigned insn;
- const struct alpha_operand *operand;
- offsetT val;
- char *file;
- unsigned line;
+static void
+emit_stX (const expressionS *tok,
+ int ntok,
+ const void * vlgsize)
{
- if (operand->bits != 32 && !(operand->flags & AXP_OPERAND_NOOVERFLOW))
+ int lgsize = (int) (long) vlgsize;
+
+ if (alpha_target & AXP_OPCODE_BWX)
+ emit_loadstore (tok, ntok, stX_op[lgsize]);
+ else
{
- offsetT min, max;
+ expressionS newtok[3];
+ struct alpha_insn insn;
+ int basereg;
+ long lituse;
- if (operand->flags & AXP_OPERAND_SIGNED)
- {
- max = (1 << (operand->bits - 1)) - 1;
- min = -(1 << (operand->bits - 1));
- }
+ if (alpha_noat_on)
+ as_bad (_("macro requires $at register while noat in effect"));
+
+ if (ntok == 2)
+ basereg = (tok[1].X_op == O_constant
+ ? AXP_REG_ZERO : alpha_gp_register);
else
+ basereg = tok[2].X_add_number;
+
+ /* Emit "lda $at, exp". */
+ lituse = load_expression (AXP_REG_AT, &tok[1], &basereg, NULL);
+
+ /* Emit "ldq_u $t9, 0($at)". */
+ set_tok_reg (newtok[0], AXP_REG_T9);
+ set_tok_const (newtok[1], 0);
+ set_tok_preg (newtok[2], basereg);
+ assemble_tokens_to_insn ("ldq_u", newtok, 3, &insn);
+
+ if (lituse)
{
- max = (1 << operand->bits) - 1;
- min = 0;
+ assert (insn.nfixups < MAX_INSN_FIXUPS);
+ insn.fixups[insn.nfixups].reloc = DUMMY_RELOC_LITUSE_BASE;
+ insn.fixups[insn.nfixups].exp.X_op = O_absent;
+ insn.nfixups++;
+ insn.sequence = lituse;
}
- if (val < min || val > max)
+ emit_insn (&insn);
+
+ /* Emit "insXl src, $at, $t10". */
+ newtok[0] = tok[0];
+ set_tok_reg (newtok[1], basereg);
+ set_tok_reg (newtok[2], AXP_REG_T10);
+ assemble_tokens_to_insn (insXl_op[lgsize], newtok, 3, &insn);
+
+ if (lituse)
{
- const char *err =
- _("operand out of range (%s not between %d and %d)");
- char buf[sizeof (val) * 3 + 2];
+ assert (insn.nfixups < MAX_INSN_FIXUPS);
+ insn.fixups[insn.nfixups].reloc = DUMMY_RELOC_LITUSE_BYTOFF;
+ insn.fixups[insn.nfixups].exp.X_op = O_absent;
+ insn.nfixups++;
+ insn.sequence = lituse;
+ }
- sprint_value (buf, val);
- if (file)
- as_warn_where (file, line, err, buf, min, max);
- else
- as_warn (err, buf, min, max);
+ emit_insn (&insn);
+
+ /* Emit "mskXl $t9, $at, $t9". */
+ set_tok_reg (newtok[0], AXP_REG_T9);
+ newtok[2] = newtok[0];
+ assemble_tokens_to_insn (mskXl_op[lgsize], newtok, 3, &insn);
+
+ if (lituse)
+ {
+ assert (insn.nfixups < MAX_INSN_FIXUPS);
+ insn.fixups[insn.nfixups].reloc = DUMMY_RELOC_LITUSE_BYTOFF;
+ insn.fixups[insn.nfixups].exp.X_op = O_absent;
+ insn.nfixups++;
+ insn.sequence = lituse;
}
- }
- if (operand->insert)
- {
- const char *errmsg = NULL;
+ emit_insn (&insn);
- insn = (*operand->insert) (insn, val, &errmsg);
- if (errmsg)
- as_warn (errmsg);
- }
- else
- insn |= ((val & ((1 << operand->bits) - 1)) << operand->shift);
+ /* Emit "or $t9, $t10, $t9". */
+ set_tok_reg (newtok[1], AXP_REG_T10);
+ assemble_tokens ("or", newtok, 3, 1);
- return insn;
+ /* Emit "stq_u $t9, 0($at). */
+ set_tok_const(newtok[1], 0);
+ set_tok_preg (newtok[2], AXP_REG_AT);
+ assemble_tokens_to_insn ("stq_u", newtok, 3, &insn);
+
+ if (lituse)
+ {
+ assert (insn.nfixups < MAX_INSN_FIXUPS);
+ insn.fixups[insn.nfixups].reloc = DUMMY_RELOC_LITUSE_BASE;
+ insn.fixups[insn.nfixups].exp.X_op = O_absent;
+ insn.nfixups++;
+ insn.sequence = lituse;
+ }
+
+ emit_insn (&insn);
+ }
}
-/*
- * Turn an opcode description and a set of arguments into
- * an instruction and a fixup.
- */
+/* Store an integer to an unaligned address. */
static void
-assemble_insn (opcode, tok, ntok, insn)
- const struct alpha_opcode *opcode;
- const expressionS *tok;
- int ntok;
- struct alpha_insn *insn;
+emit_ustX (const expressionS *tok,
+ int ntok,
+ const void * vlgsize)
{
- const unsigned char *argidx;
- unsigned image;
- int tokidx = 0;
+ int lgsize = (int) (long) vlgsize;
+ expressionS newtok[3];
- memset (insn, 0, sizeof (*insn));
- image = opcode->opcode;
+ /* Emit "lda $at, exp". */
+ memcpy (newtok, tok, sizeof (expressionS) * ntok);
+ newtok[0].X_add_number = AXP_REG_AT;
+ assemble_tokens ("lda", newtok, ntok, 1);
- for (argidx = opcode->operands; *argidx; ++argidx)
- {
- const struct alpha_operand *operand = &alpha_operands[*argidx];
- const expressionS *t = (const expressionS *) 0;
+ /* Emit "ldq_u $9, 0($at)". */
+ set_tok_reg (newtok[0], AXP_REG_T9);
+ set_tok_const (newtok[1], 0);
+ set_tok_preg (newtok[2], AXP_REG_AT);
+ assemble_tokens ("ldq_u", newtok, 3, 1);
- if (operand->flags & AXP_OPERAND_FAKE)
- {
- /* fake operands take no value and generate no fixup */
- image = insert_operand (image, operand, 0, NULL, 0);
- continue;
- }
+ /* Emit "ldq_u $10, size-1($at)". */
+ set_tok_reg (newtok[0], AXP_REG_T10);
+ set_tok_const (newtok[1], (1 << lgsize) - 1);
+ assemble_tokens ("ldq_u", newtok, 3, 1);
- if (tokidx >= ntok)
- {
- switch (operand->flags & AXP_OPERAND_OPTIONAL_MASK)
- {
- case AXP_OPERAND_DEFAULT_FIRST:
- t = &tok[0];
- break;
- case AXP_OPERAND_DEFAULT_SECOND:
- t = &tok[1];
- break;
- case AXP_OPERAND_DEFAULT_ZERO:
- {
- static expressionS zero_exp;
- t = &zero_exp;
- zero_exp.X_op = O_constant;
- zero_exp.X_unsigned = 1;
- }
- break;
- default:
- abort ();
- }
- }
- else
- t = &tok[tokidx++];
+ /* Emit "insXl src, $at, $t11". */
+ newtok[0] = tok[0];
+ set_tok_reg (newtok[1], AXP_REG_AT);
+ set_tok_reg (newtok[2], AXP_REG_T11);
+ assemble_tokens (insXl_op[lgsize], newtok, 3, 1);
- switch (t->X_op)
- {
- case O_register:
- case O_pregister:
- case O_cpregister:
- image = insert_operand (image, operand, regno (t->X_add_number),
- NULL, 0);
- break;
+ /* Emit "insXh src, $at, $t12". */
+ set_tok_reg (newtok[2], AXP_REG_T12);
+ assemble_tokens (insXh_op[lgsize], newtok, 3, 1);
- case O_constant:
- image = insert_operand (image, operand, t->X_add_number, NULL, 0);
- break;
+ /* Emit "mskXl $t9, $at, $t9". */
+ set_tok_reg (newtok[0], AXP_REG_T9);
+ newtok[2] = newtok[0];
+ assemble_tokens (mskXl_op[lgsize], newtok, 3, 1);
- default:
- {
- struct alpha_fixup *fixup;
+ /* Emit "mskXh $t10, $at, $t10". */
+ set_tok_reg (newtok[0], AXP_REG_T10);
+ newtok[2] = newtok[0];
+ assemble_tokens (mskXh_op[lgsize], newtok, 3, 1);
- if (insn->nfixups >= MAX_INSN_FIXUPS)
- as_fatal (_("too many fixups"));
+ /* Emit "or $t9, $t11, $t9". */
+ set_tok_reg (newtok[0], AXP_REG_T9);
+ set_tok_reg (newtok[1], AXP_REG_T11);
+ newtok[2] = newtok[0];
+ assemble_tokens ("or", newtok, 3, 1);
- fixup = &insn->fixups[insn->nfixups++];
+ /* Emit "or $t10, $t12, $t10". */
+ set_tok_reg (newtok[0], AXP_REG_T10);
+ set_tok_reg (newtok[1], AXP_REG_T12);
+ newtok[2] = newtok[0];
+ assemble_tokens ("or", newtok, 3, 1);
- fixup->exp = *t;
- fixup->reloc = operand->default_reloc;
- }
- break;
- }
- }
+ /* Emit "stq_u $t9, 0($at)". */
+ set_tok_reg (newtok[0], AXP_REG_T9);
+ set_tok_const (newtok[1], 0);
+ set_tok_preg (newtok[2], AXP_REG_AT);
+ assemble_tokens ("stq_u", newtok, 3, 1);
- insn->insn = image;
+ /* Emit "stq_u $t10, size-1($at)". */
+ set_tok_reg (newtok[0], AXP_REG_T10);
+ set_tok_const (newtok[1], (1 << lgsize) - 1);
+ assemble_tokens ("stq_u", newtok, 3, 1);
}
-/*
- * Actually output an instruction with its fixup.
- */
+/* Sign extend a half-word or byte. The 32-bit sign extend is
+ implemented as "addl $31, $r, $t" in the opcode table. */
static void
-emit_insn (insn)
- struct alpha_insn *insn;
+emit_sextX (const expressionS *tok,
+ int ntok,
+ const void * vlgsize)
{
- char *f;
- int i;
+ long lgsize = (long) vlgsize;
- /* Take care of alignment duties. */
- if (alpha_auto_align_on && alpha_current_align < 2)
- alpha_align (2, (char *) NULL, alpha_insn_label, 0);
- if (alpha_current_align > 2)
- alpha_current_align = 2;
- alpha_insn_label = NULL;
+ if (alpha_target & AXP_OPCODE_BWX)
+ assemble_tokens (sextX_op[lgsize], tok, ntok, 0);
+ else
+ {
+ int bitshift = 64 - 8 * (1 << lgsize);
+ expressionS newtok[3];
- /* Write out the instruction. */
- f = frag_more (4);
- md_number_to_chars (f, insn->insn, 4);
+ /* Emit "sll src,bits,dst". */
+ newtok[0] = tok[0];
+ set_tok_const (newtok[1], bitshift);
+ newtok[2] = tok[ntok - 1];
+ assemble_tokens ("sll", newtok, 3, 1);
-#ifdef OBJ_ELF
- dwarf2_emit_insn (4);
-#endif
+ /* Emit "sra dst,bits,dst". */
+ newtok[0] = newtok[2];
+ assemble_tokens ("sra", newtok, 3, 1);
+ }
+}
- /* Apply the fixups in order */
- for (i = 0; i < insn->nfixups; ++i)
- {
- const struct alpha_operand *operand = (const struct alpha_operand *) 0;
- struct alpha_fixup *fixup = &insn->fixups[i];
- int size, pcrel;
- fixS *fixP;
-#ifdef RELOC_OP_P
- char buffer[ALPHA_RELOC_DIGITS];
- struct alpha_literal_tag *info;
-#endif
+/* Implement the division and modulus macros. */
- /* Some fixups are only used internally and so have no howto */
- if ((int) fixup->reloc < 0)
- {
- operand = &alpha_operands[-(int) fixup->reloc];
- size = 4;
- pcrel = ((operand->flags & AXP_OPERAND_RELATIVE) != 0);
- }
- else
- switch (fixup->reloc)
- {
-#ifdef OBJ_ELF
- /* These relocation types are only used internally. */
- case BFD_RELOC_ALPHA_GPDISP_HI16:
- case BFD_RELOC_ALPHA_GPDISP_LO16:
- size = 2;
- pcrel = 0;
- break;
-#endif
-#ifdef RELOC_OP_P
- /* and these also are internal only relocations */
- case BFD_RELOC_ALPHA_USER_LITERAL:
- case BFD_RELOC_ALPHA_USER_LITUSE_BASE:
- case BFD_RELOC_ALPHA_USER_LITUSE_BYTOFF:
- case BFD_RELOC_ALPHA_USER_LITUSE_JSR:
- case BFD_RELOC_ALPHA_USER_GPDISP:
- case BFD_RELOC_ALPHA_USER_GPRELHIGH:
- case BFD_RELOC_ALPHA_USER_GPRELLOW:
- size = 2;
- pcrel = 0;
- break;
-#endif
+#ifdef OBJ_EVAX
- default:
- {
- reloc_howto_type *reloc_howto
- = bfd_reloc_type_lookup (stdoutput, fixup->reloc);
- assert (reloc_howto);
+/* Make register usage like in normal procedure call.
+ Don't clobber PV and RA. */
- size = bfd_get_reloc_size (reloc_howto);
- pcrel = reloc_howto->pc_relative;
- }
- assert (size >= 1 && size <= 4);
- break;
- }
+static void
+emit_division (const expressionS *tok,
+ int ntok,
+ const void * symname)
+{
+ /* DIVISION and MODULUS. Yech.
- fixP = fix_new_exp (frag_now, f - frag_now->fr_literal, size,
- &fixup->exp, pcrel, fixup->reloc);
+ Convert
+ OP x,y,result
+ to
+ mov x,R16 # if x != R16
+ mov y,R17 # if y != R17
+ lda AT,__OP
+ jsr AT,(AT),0
+ mov R0,result
- /* Turn off complaints that the addend is too large for some fixups,
- and copy in the sequence number for the explicit relocations. */
- switch (fixup->reloc)
- {
- case BFD_RELOC_ALPHA_GPDISP_LO16:
-#ifdef OBJ_ECOFF
- case BFD_RELOC_ALPHA_LITERAL:
-#endif
-#ifdef OBJ_ELF
- case BFD_RELOC_ALPHA_ELF_LITERAL:
-#endif
- case BFD_RELOC_GPREL32:
- fixP->fx_no_overflow = 1;
- break;
+ with appropriate optimizations if R0,R16,R17 are the registers
+ specified by the compiler. */
-#ifdef RELOC_OP_P
- case BFD_RELOC_ALPHA_USER_LITERAL:
- fixP->fx_no_overflow = 1;
- sprintf (buffer, "!%u", insn->sequence[i]);
- info = ((struct alpha_literal_tag *)
- hash_find (alpha_literal_hash, buffer));
+ int xr, yr, rr;
+ symbolS *sym;
+ expressionS newtok[3];
- if (! info)
- {
- size_t len = strlen (buffer);
- const char *errmsg;
-
- info = ((struct alpha_literal_tag *)
- xcalloc (sizeof (struct alpha_literal_tag) + len, 1));
-
- info->segment = now_seg;
- info->sequence = insn->sequence[i];
- strcpy (info->string, buffer);
- errmsg = hash_insert (alpha_literal_hash, info->string, (PTR) info);
- if (errmsg)
- as_bad (errmsg);
- }
+ xr = regno (tok[0].X_add_number);
+ yr = regno (tok[1].X_add_number);
- ++info->n_literals;
+ if (ntok < 3)
+ rr = xr;
+ else
+ rr = regno (tok[2].X_add_number);
- if (info->segment != now_seg)
- info->multi_section_p = 1;
+ /* Move the operands into the right place. */
+ if (yr == AXP_REG_R16 && xr == AXP_REG_R17)
+ {
+ /* They are in exactly the wrong order -- swap through AT. */
+ if (alpha_noat_on)
+ as_bad (_("macro requires $at register while noat in effect"));
- fixP->tc_fix_data.info = info;
- break;
+ set_tok_reg (newtok[0], AXP_REG_R16);
+ set_tok_reg (newtok[1], AXP_REG_AT);
+ assemble_tokens ("mov", newtok, 2, 1);
- case BFD_RELOC_ALPHA_USER_LITUSE_BASE:
- case BFD_RELOC_ALPHA_USER_LITUSE_BYTOFF:
- case BFD_RELOC_ALPHA_USER_LITUSE_JSR:
- sprintf (buffer, "!%u", insn->sequence[i]);
- info = ((struct alpha_literal_tag *)
- hash_find (alpha_literal_hash, buffer));
+ set_tok_reg (newtok[0], AXP_REG_R17);
+ set_tok_reg (newtok[1], AXP_REG_R16);
+ assemble_tokens ("mov", newtok, 2, 1);
- if (! info)
- {
- size_t len = strlen (buffer);
- const char *errmsg;
-
- info = ((struct alpha_literal_tag *)
- xcalloc (sizeof (struct alpha_literal_tag) + len, 1));
-
- info->segment = now_seg;
- info->sequence = insn->sequence[i];
- strcpy (info->string, buffer);
- errmsg = hash_insert (alpha_literal_hash, info->string, (PTR) info);
- if (errmsg)
- as_bad (errmsg);
- }
- info->n_lituses++;
- fixP->tc_fix_data.info = info;
- fixP->tc_fix_data.next_lituse = info->lituse;
- info->lituse = fixP;
- if (info->segment != now_seg)
- info->multi_section_p = 1;
+ set_tok_reg (newtok[0], AXP_REG_AT);
+ set_tok_reg (newtok[1], AXP_REG_R17);
+ assemble_tokens ("mov", newtok, 2, 1);
+ }
+ else
+ {
+ if (yr == AXP_REG_R16)
+ {
+ set_tok_reg (newtok[0], AXP_REG_R16);
+ set_tok_reg (newtok[1], AXP_REG_R17);
+ assemble_tokens ("mov", newtok, 2, 1);
+ }
- break;
-#endif
+ if (xr != AXP_REG_R16)
+ {
+ set_tok_reg (newtok[0], xr);
+ set_tok_reg (newtok[1], AXP_REG_R16);
+ assemble_tokens ("mov", newtok, 2, 1);
+ }
- default:
- if ((int) fixup->reloc < 0)
- {
- if (operand->flags & AXP_OPERAND_NOOVERFLOW)
- fixP->fx_no_overflow = 1;
- }
- break;
+ if (yr != AXP_REG_R16 && yr != AXP_REG_R17)
+ {
+ set_tok_reg (newtok[0], yr);
+ set_tok_reg (newtok[1], AXP_REG_R17);
+ assemble_tokens ("mov", newtok, 2, 1);
}
}
-}
-/* Given an opcode name and a pre-tokenized set of arguments, assemble
- the insn, but do not emit it.
+ sym = symbol_find_or_make ((const char *) symname);
- Note that this implies no macros allowed, since we can't store more
- than one insn in an insn structure. */
+ set_tok_reg (newtok[0], AXP_REG_AT);
+ set_tok_sym (newtok[1], sym, 0);
+ assemble_tokens ("lda", newtok, 2, 1);
-static void
-assemble_tokens_to_insn (opname, tok, ntok, insn)
- const char *opname;
- const expressionS *tok;
- int ntok;
- struct alpha_insn *insn;
-{
- const struct alpha_opcode *opcode;
+ /* Call the division routine. */
+ set_tok_reg (newtok[0], AXP_REG_AT);
+ set_tok_cpreg (newtok[1], AXP_REG_AT);
+ set_tok_const (newtok[2], 0);
+ assemble_tokens ("jsr", newtok, 3, 1);
- /* search opcodes */
- opcode = (const struct alpha_opcode *) hash_find (alpha_opcode_hash, opname);
- if (opcode)
+ /* Move the result to the right place. */
+ if (rr != AXP_REG_R0)
{
- int cpumatch;
- opcode = find_opcode_match (opcode, tok, &ntok, &cpumatch);
- if (opcode)
- {
- assemble_insn (opcode, tok, ntok, insn);
- return;
- }
- else if (cpumatch)
- as_bad (_("inappropriate arguments for opcode `%s'"), opname);
- else
- as_bad (_("opcode `%s' not supported for target %s"), opname,
- alpha_target_name);
+ set_tok_reg (newtok[0], AXP_REG_R0);
+ set_tok_reg (newtok[1], rr);
+ assemble_tokens ("mov", newtok, 2, 1);
}
- else
- as_bad (_("unknown opcode `%s'"), opname);
}
-/* Given an opcode name and a pre-tokenized set of arguments, take the
- opcode all the way through emission. */
+#else /* !OBJ_EVAX */
static void
-assemble_tokens (opname, tok, ntok, local_macros_on)
- const char *opname;
- const expressionS *tok;
- int ntok;
- int local_macros_on;
+emit_division (const expressionS *tok,
+ int ntok,
+ const void * symname)
{
- int found_something = 0;
- const struct alpha_opcode *opcode;
- const struct alpha_macro *macro;
- int cpumatch = 1;
+ /* DIVISION and MODULUS. Yech.
+ Convert
+ OP x,y,result
+ to
+ lda pv,__OP
+ mov x,t10
+ mov y,t11
+ jsr t9,(pv),__OP
+ mov t12,result
+
+ with appropriate optimizations if t10,t11,t12 are the registers
+ specified by the compiler. */
- /* search macros */
- if (local_macros_on)
+ int xr, yr, rr;
+ symbolS *sym;
+ expressionS newtok[3];
+
+ xr = regno (tok[0].X_add_number);
+ yr = regno (tok[1].X_add_number);
+
+ if (ntok < 3)
+ rr = xr;
+ else
+ rr = regno (tok[2].X_add_number);
+
+ sym = symbol_find_or_make ((const char *) symname);
+
+ /* Move the operands into the right place. */
+ if (yr == AXP_REG_T10 && xr == AXP_REG_T11)
{
- macro = ((const struct alpha_macro *)
- hash_find (alpha_macro_hash, opname));
- if (macro)
+ /* They are in exactly the wrong order -- swap through AT. */
+ if (alpha_noat_on)
+ as_bad (_("macro requires $at register while noat in effect"));
+
+ set_tok_reg (newtok[0], AXP_REG_T10);
+ set_tok_reg (newtok[1], AXP_REG_AT);
+ assemble_tokens ("mov", newtok, 2, 1);
+
+ set_tok_reg (newtok[0], AXP_REG_T11);
+ set_tok_reg (newtok[1], AXP_REG_T10);
+ assemble_tokens ("mov", newtok, 2, 1);
+
+ set_tok_reg (newtok[0], AXP_REG_AT);
+ set_tok_reg (newtok[1], AXP_REG_T11);
+ assemble_tokens ("mov", newtok, 2, 1);
+ }
+ else
+ {
+ if (yr == AXP_REG_T10)
{
- found_something = 1;
- macro = find_macro_match (macro, tok, &ntok);
- if (macro)
- {
- (*macro->emit) (tok, ntok, macro->arg);
- return;
- }
+ set_tok_reg (newtok[0], AXP_REG_T10);
+ set_tok_reg (newtok[1], AXP_REG_T11);
+ assemble_tokens ("mov", newtok, 2, 1);
}
- }
-#ifdef RELOC_OP_P
- if (ntok && USER_RELOC_P (tok[ntok - 1].X_op))
- {
- const expressionS *reloc_exp = &tok[ntok - 1];
- const struct alpha_reloc_op_tag *r = ALPHA_RELOC_TABLE (reloc_exp->X_op);
- as_bad (_("Cannot use !%s!%d with %s"), r->name,
- (int) reloc_exp->X_add_number, opname);
- ntok--;
- }
-#endif
+ if (xr != AXP_REG_T10)
+ {
+ set_tok_reg (newtok[0], xr);
+ set_tok_reg (newtok[1], AXP_REG_T10);
+ assemble_tokens ("mov", newtok, 2, 1);
+ }
- /* search opcodes */
- opcode = (const struct alpha_opcode *) hash_find (alpha_opcode_hash, opname);
- if (opcode)
- {
- found_something = 1;
- opcode = find_opcode_match (opcode, tok, &ntok, &cpumatch);
- if (opcode)
+ if (yr != AXP_REG_T10 && yr != AXP_REG_T11)
{
- struct alpha_insn insn;
- assemble_insn (opcode, tok, ntok, &insn);
- emit_insn (&insn);
- return;
+ set_tok_reg (newtok[0], yr);
+ set_tok_reg (newtok[1], AXP_REG_T11);
+ assemble_tokens ("mov", newtok, 2, 1);
}
}
- if (found_something)
- if (cpumatch)
- as_bad (_("inappropriate arguments for opcode `%s'"), opname);
- else
- as_bad (_("opcode `%s' not supported for target %s"), opname,
- alpha_target_name);
- else
- as_bad (_("unknown opcode `%s'"), opname);
-}
-\f
-/* Some instruction sets indexed by lg(size) */
-static const char * const sextX_op[] = { "sextb", "sextw", "sextl", NULL };
-static const char * const insXl_op[] = { "insbl", "inswl", "insll", "insql" };
-static const char * const insXh_op[] = { NULL, "inswh", "inslh", "insqh" };
-static const char * const extXl_op[] = { "extbl", "extwl", "extll", "extql" };
-static const char * const extXh_op[] = { NULL, "extwh", "extlh", "extqh" };
-static const char * const mskXl_op[] = { "mskbl", "mskwl", "mskll", "mskql" };
-static const char * const mskXh_op[] = { NULL, "mskwh", "msklh", "mskqh" };
-static const char * const stX_op[] = { "stb", "stw", "stl", "stq" };
-static const char * const ldX_op[] = { "ldb", "ldw", "ldll", "ldq" };
-static const char * const ldXu_op[] = { "ldbu", "ldwu", NULL, NULL };
+ /* Call the division routine. */
+ set_tok_reg (newtok[0], AXP_REG_T9);
+ set_tok_sym (newtok[1], sym, 0);
+ assemble_tokens ("jsr", newtok, 2, 1);
+
+ /* Reload the GP register. */
+#ifdef OBJ_AOUT
+FIXME
+#endif
+#if defined(OBJ_ECOFF) || defined(OBJ_ELF)
+ set_tok_reg (newtok[0], alpha_gp_register);
+ set_tok_const (newtok[1], 0);
+ set_tok_preg (newtok[2], AXP_REG_T9);
+ assemble_tokens ("ldgp", newtok, 3, 1);
+#endif
+
+ /* Move the result to the right place. */
+ if (rr != AXP_REG_T12)
+ {
+ set_tok_reg (newtok[0], AXP_REG_T12);
+ set_tok_reg (newtok[1], rr);
+ assemble_tokens ("mov", newtok, 2, 1);
+ }
+}
+
+#endif /* !OBJ_EVAX */
+
+/* The jsr and jmp macros differ from their instruction counterparts
+ in that they can load the target address and default most
+ everything. */
+
+static void
+emit_jsrjmp (const expressionS *tok,
+ int ntok,
+ const void * vopname)
+{
+ const char *opname = (const char *) vopname;
+ struct alpha_insn insn;
+ expressionS newtok[3];
+ int r, tokidx = 0;
+ long lituse = 0;
+
+ if (tokidx < ntok && tok[tokidx].X_op == O_register)
+ r = regno (tok[tokidx++].X_add_number);
+ else
+ r = strcmp (opname, "jmp") == 0 ? AXP_REG_ZERO : AXP_REG_RA;
+
+ set_tok_reg (newtok[0], r);
+
+ if (tokidx < ntok &&
+ (tok[tokidx].X_op == O_pregister || tok[tokidx].X_op == O_cpregister))
+ r = regno (tok[tokidx++].X_add_number);
+#ifdef OBJ_EVAX
+ /* Keep register if jsr $n.<sym>. */
+#else
+ else
+ {
+ int basereg = alpha_gp_register;
+ lituse = load_expression (r = AXP_REG_PV, &tok[tokidx], &basereg, NULL);
+ }
+#endif
+
+ set_tok_cpreg (newtok[1], r);
+
+#ifdef OBJ_EVAX
+ /* FIXME: Add hint relocs to BFD for evax. */
+#else
+ if (tokidx < ntok)
+ newtok[2] = tok[tokidx];
+ else
+#endif
+ set_tok_const (newtok[2], 0);
+
+ assemble_tokens_to_insn (opname, newtok, 3, &insn);
+
+ if (lituse)
+ {
+ assert (insn.nfixups < MAX_INSN_FIXUPS);
+ insn.fixups[insn.nfixups].reloc = DUMMY_RELOC_LITUSE_JSR;
+ insn.fixups[insn.nfixups].exp.X_op = O_absent;
+ insn.nfixups++;
+ insn.sequence = lituse;
+ }
+
+ emit_insn (&insn);
+}
+
+/* The ret and jcr instructions differ from their instruction
+ counterparts in that everything can be defaulted. */
+
+static void
+emit_retjcr (const expressionS *tok,
+ int ntok,
+ const void * vopname)
+{
+ const char *opname = (const char *) vopname;
+ expressionS newtok[3];
+ int r, tokidx = 0;
+
+ if (tokidx < ntok && tok[tokidx].X_op == O_register)
+ r = regno (tok[tokidx++].X_add_number);
+ else
+ r = AXP_REG_ZERO;
+
+ set_tok_reg (newtok[0], r);
+
+ if (tokidx < ntok &&
+ (tok[tokidx].X_op == O_pregister || tok[tokidx].X_op == O_cpregister))
+ r = regno (tok[tokidx++].X_add_number);
+ else
+ r = AXP_REG_RA;
+
+ set_tok_cpreg (newtok[1], r);
+
+ if (tokidx < ntok)
+ newtok[2] = tok[tokidx];
+ else
+ set_tok_const (newtok[2], strcmp (opname, "ret") == 0);
+
+ assemble_tokens (opname, newtok, 3, 0);
+}
/* Implement the ldgp macro. */
static void
-emit_ldgp (tok, ntok, unused)
- const expressionS *tok;
- int ntok ATTRIBUTE_UNUSED;
- const PTR unused ATTRIBUTE_UNUSED;
+emit_ldgp (const expressionS *tok,
+ int ntok ATTRIBUTE_UNUSED,
+ const void * unused ATTRIBUTE_UNUSED)
{
#ifdef OBJ_AOUT
FIXME
expressionS newtok[3];
expressionS addend;
-#ifdef RELOC_OP_P
- if (ntok && USER_RELOC_P (tok[ntok - 1].X_op))
- {
- const expressionS *reloc_exp = &tok[ntok - 1];
- const struct alpha_reloc_op_tag *r = ALPHA_RELOC_TABLE (reloc_exp->X_op);
- as_bad (_("Cannot use !%s!%d with %s"), r->name,
- (int) reloc_exp->X_add_number, "ldgp");
- ntok--;
- }
-#endif
-
#ifdef OBJ_ECOFF
if (regno (tok[2].X_add_number) == AXP_REG_PV)
ecoff_set_gp_prolog_size (0);
insn.nfixups = 1;
insn.fixups[0].exp = addend;
insn.fixups[0].reloc = BFD_RELOC_ALPHA_GPDISP_HI16;
+ insn.sequence = next_sequence_num;
emit_insn (&insn);
insn.nfixups = 1;
insn.fixups[0].exp = addend;
insn.fixups[0].reloc = BFD_RELOC_ALPHA_GPDISP_LO16;
+ insn.sequence = next_sequence_num--;
emit_insn (&insn);
#endif /* OBJ_ECOFF || OBJ_ELF */
}
-#ifdef OBJ_EVAX
-
-/* Add symbol+addend to link pool.
- Return offset from basesym to entry in link pool.
-
- Add new fixup only if offset isn't 16bit. */
+/* The macro table. */
-valueT
-add_to_link_pool (basesym, sym, addend)
- symbolS *basesym;
- symbolS *sym;
- offsetT addend;
+static const struct alpha_macro alpha_macros[] =
{
- segT current_section = now_seg;
- int current_subsec = now_subseg;
- valueT offset;
- bfd_reloc_code_real_type reloc_type;
- char *p;
- segment_info_type *seginfo = seg_info (alpha_link_section);
- fixS *fixp;
+/* Load/Store macros. */
+ { "lda", emit_lda, NULL,
+ { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
+ { "ldah", emit_ldah, NULL,
+ { MACRO_IR, MACRO_EXP, MACRO_EOA } },
- offset = - *symbol_get_obj (basesym);
+ { "ldl", emit_ir_load, "ldl",
+ { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
+ { "ldl_l", emit_ir_load, "ldl_l",
+ { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
+ { "ldq", emit_ir_load, "ldq",
+ { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
+ { "ldq_l", emit_ir_load, "ldq_l",
+ { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
+ { "ldq_u", emit_ir_load, "ldq_u",
+ { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
+ { "ldf", emit_loadstore, "ldf",
+ { MACRO_FPR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
+ { "ldg", emit_loadstore, "ldg",
+ { MACRO_FPR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
+ { "lds", emit_loadstore, "lds",
+ { MACRO_FPR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
+ { "ldt", emit_loadstore, "ldt",
+ { MACRO_FPR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
+
+ { "ldb", emit_ldX, (void *) 0,
+ { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
+ { "ldbu", emit_ldXu, (void *) 0,
+ { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
+ { "ldw", emit_ldX, (void *) 1,
+ { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
+ { "ldwu", emit_ldXu, (void *) 1,
+ { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
+
+ { "uldw", emit_uldX, (void *) 1,
+ { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
+ { "uldwu", emit_uldXu, (void *) 1,
+ { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
+ { "uldl", emit_uldX, (void *) 2,
+ { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
+ { "uldlu", emit_uldXu, (void *) 2,
+ { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
+ { "uldq", emit_uldXu, (void *) 3,
+ { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
- /* @@ This assumes all entries in a given section will be of the same
- size... Probably correct, but unwise to rely on. */
- /* This must always be called with the same subsegment. */
+ { "ldgp", emit_ldgp, NULL,
+ { MACRO_IR, MACRO_EXP, MACRO_PIR, MACRO_EOA } },
- if (seginfo->frchainP)
- for (fixp = seginfo->frchainP->fix_root;
- fixp != (fixS *) NULL;
- fixp = fixp->fx_next, offset += 8)
- {
- if (fixp->fx_addsy == sym && fixp->fx_offset == addend)
- {
- if (range_signed_16 (offset))
- {
- return offset;
- }
- }
- }
+ { "ldi", emit_lda, NULL,
+ { MACRO_IR, MACRO_EXP, MACRO_EOA } },
+ { "ldil", emit_ldil, NULL,
+ { MACRO_IR, MACRO_EXP, MACRO_EOA } },
+ { "ldiq", emit_lda, NULL,
+ { MACRO_IR, MACRO_EXP, MACRO_EOA } },
- /* Not found in 16bit signed range. */
+ { "stl", emit_loadstore, "stl",
+ { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
+ { "stl_c", emit_loadstore, "stl_c",
+ { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
+ { "stq", emit_loadstore, "stq",
+ { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
+ { "stq_c", emit_loadstore, "stq_c",
+ { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
+ { "stq_u", emit_loadstore, "stq_u",
+ { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
+ { "stf", emit_loadstore, "stf",
+ { MACRO_FPR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
+ { "stg", emit_loadstore, "stg",
+ { MACRO_FPR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
+ { "sts", emit_loadstore, "sts",
+ { MACRO_FPR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
+ { "stt", emit_loadstore, "stt",
+ { MACRO_FPR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
+
+ { "stb", emit_stX, (void *) 0,
+ { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
+ { "stw", emit_stX, (void *) 1,
+ { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
+ { "ustw", emit_ustX, (void *) 1,
+ { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
+ { "ustl", emit_ustX, (void *) 2,
+ { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
+ { "ustq", emit_ustX, (void *) 3,
+ { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
+
+/* Arithmetic macros. */
+
+ { "sextb", emit_sextX, (void *) 0,
+ { MACRO_IR, MACRO_IR, MACRO_EOA,
+ MACRO_IR, MACRO_EOA,
+ /* MACRO_EXP, MACRO_IR, MACRO_EOA */ } },
+ { "sextw", emit_sextX, (void *) 1,
+ { MACRO_IR, MACRO_IR, MACRO_EOA,
+ MACRO_IR, MACRO_EOA,
+ /* MACRO_EXP, MACRO_IR, MACRO_EOA */ } },
- subseg_set (alpha_link_section, 0);
- p = frag_more (8);
- memset (p, 0, 8);
+ { "divl", emit_division, "__divl",
+ { MACRO_IR, MACRO_IR, MACRO_IR, MACRO_EOA,
+ MACRO_IR, MACRO_IR, MACRO_EOA,
+ /* MACRO_IR, MACRO_EXP, MACRO_IR, MACRO_EOA,
+ MACRO_IR, MACRO_EXP, MACRO_EOA */ } },
+ { "divlu", emit_division, "__divlu",
+ { MACRO_IR, MACRO_IR, MACRO_IR, MACRO_EOA,
+ MACRO_IR, MACRO_IR, MACRO_EOA,
+ /* MACRO_IR, MACRO_EXP, MACRO_IR, MACRO_EOA,
+ MACRO_IR, MACRO_EXP, MACRO_EOA */ } },
+ { "divq", emit_division, "__divq",
+ { MACRO_IR, MACRO_IR, MACRO_IR, MACRO_EOA,
+ MACRO_IR, MACRO_IR, MACRO_EOA,
+ /* MACRO_IR, MACRO_EXP, MACRO_IR, MACRO_EOA,
+ MACRO_IR, MACRO_EXP, MACRO_EOA */ } },
+ { "divqu", emit_division, "__divqu",
+ { MACRO_IR, MACRO_IR, MACRO_IR, MACRO_EOA,
+ MACRO_IR, MACRO_IR, MACRO_EOA,
+ /* MACRO_IR, MACRO_EXP, MACRO_IR, MACRO_EOA,
+ MACRO_IR, MACRO_EXP, MACRO_EOA */ } },
+ { "reml", emit_division, "__reml",
+ { MACRO_IR, MACRO_IR, MACRO_IR, MACRO_EOA,
+ MACRO_IR, MACRO_IR, MACRO_EOA,
+ /* MACRO_IR, MACRO_EXP, MACRO_IR, MACRO_EOA,
+ MACRO_IR, MACRO_EXP, MACRO_EOA */ } },
+ { "remlu", emit_division, "__remlu",
+ { MACRO_IR, MACRO_IR, MACRO_IR, MACRO_EOA,
+ MACRO_IR, MACRO_IR, MACRO_EOA,
+ /* MACRO_IR, MACRO_EXP, MACRO_IR, MACRO_EOA,
+ MACRO_IR, MACRO_EXP, MACRO_EOA */ } },
+ { "remq", emit_division, "__remq",
+ { MACRO_IR, MACRO_IR, MACRO_IR, MACRO_EOA,
+ MACRO_IR, MACRO_IR, MACRO_EOA,
+ /* MACRO_IR, MACRO_EXP, MACRO_IR, MACRO_EOA,
+ MACRO_IR, MACRO_EXP, MACRO_EOA */ } },
+ { "remqu", emit_division, "__remqu",
+ { MACRO_IR, MACRO_IR, MACRO_IR, MACRO_EOA,
+ MACRO_IR, MACRO_IR, MACRO_EOA,
+ /* MACRO_IR, MACRO_EXP, MACRO_IR, MACRO_EOA,
+ MACRO_IR, MACRO_EXP, MACRO_EOA */ } },
- fix_new (frag_now, p - frag_now->fr_literal, 8, sym, addend, 0,
- BFD_RELOC_64);
+ { "jsr", emit_jsrjmp, "jsr",
+ { MACRO_PIR, MACRO_EXP, MACRO_EOA,
+ MACRO_PIR, MACRO_EOA,
+ MACRO_IR, MACRO_EXP, MACRO_EOA,
+ MACRO_EXP, MACRO_EOA } },
+ { "jmp", emit_jsrjmp, "jmp",
+ { MACRO_PIR, MACRO_EXP, MACRO_EOA,
+ MACRO_PIR, MACRO_EOA,
+ MACRO_IR, MACRO_EXP, MACRO_EOA,
+ MACRO_EXP, MACRO_EOA } },
+ { "ret", emit_retjcr, "ret",
+ { MACRO_IR, MACRO_EXP, MACRO_EOA,
+ MACRO_IR, MACRO_EOA,
+ MACRO_PIR, MACRO_EXP, MACRO_EOA,
+ MACRO_PIR, MACRO_EOA,
+ MACRO_EXP, MACRO_EOA,
+ MACRO_EOA } },
+ { "jcr", emit_retjcr, "jcr",
+ { MACRO_IR, MACRO_EXP, MACRO_EOA,
+ MACRO_IR, MACRO_EOA,
+ MACRO_PIR, MACRO_EXP, MACRO_EOA,
+ MACRO_PIR, MACRO_EOA,
+ MACRO_EXP, MACRO_EOA,
+ MACRO_EOA } },
+ { "jsr_coroutine", emit_retjcr, "jcr",
+ { MACRO_IR, MACRO_EXP, MACRO_EOA,
+ MACRO_IR, MACRO_EOA,
+ MACRO_PIR, MACRO_EXP, MACRO_EOA,
+ MACRO_PIR, MACRO_EOA,
+ MACRO_EXP, MACRO_EOA,
+ MACRO_EOA } },
+};
- subseg_set (current_section, current_subsec);
- seginfo->literal_pool_size += 8;
- return offset;
-}
-
-#endif /* OBJ_EVAX */
-
-/* Load a (partial) expression into a target register.
-
- If poffset is not null, after the call it will either contain
- O_constant 0, or a 16-bit offset appropriate for any MEM format
- instruction. In addition, pbasereg will be modified to point to
- the base register to use in that MEM format instruction.
-
- In any case, *pbasereg should contain a base register to add to the
- expression. This will normally be either AXP_REG_ZERO or
- alpha_gp_register. Symbol addresses will always be loaded via $gp,
- so "foo($0)" is interpreted as adding the address of foo to $0;
- i.e. "ldq $targ, LIT($gp); addq $targ, $0, $targ". Odd, perhaps,
- but this is what OSF/1 does.
+static const unsigned int alpha_num_macros
+ = sizeof (alpha_macros) / sizeof (*alpha_macros);
- If explicit relocations of the form !literal!<number> are allowed,
- and used, then explict_reloc with be an expression pointer.
+/* Search forward through all variants of a macro looking for a syntax
+ match. */
- Finally, the return value is true if the calling macro may emit a
- LITUSE reloc if otherwise appropriate. */
+static const struct alpha_macro *
+find_macro_match (const struct alpha_macro *first_macro,
+ const expressionS *tok,
+ int *pntok)
-static int
-load_expression (targreg, exp, pbasereg, poffset, explicit_reloc)
- int targreg;
- const expressionS *exp;
- int *pbasereg;
- expressionS *poffset;
- const expressionS *explicit_reloc;
{
- int emit_lituse = 0;
- offsetT addend = exp->X_add_number;
- int basereg = *pbasereg;
- struct alpha_insn insn;
- expressionS newtok[3];
+ const struct alpha_macro *macro = first_macro;
+ int ntok = *pntok;
- switch (exp->X_op)
+ do
{
- case O_symbol:
- {
-#ifdef OBJ_ECOFF
- offsetT lit;
+ const enum alpha_macro_arg *arg = macro->argsets;
+ int tokidx = 0;
- /* attempt to reduce .lit load by splitting the offset from
- its symbol when possible, but don't create a situation in
- which we'd fail. */
- if (!range_signed_32 (addend) &&
- (alpha_noat_on || targreg == AXP_REG_AT))
- {
- lit = add_to_literal_pool (exp->X_add_symbol, addend,
- alpha_lita_section, 8);
- addend = 0;
- }
- else
- {
- lit = add_to_literal_pool (exp->X_add_symbol, 0,
- alpha_lita_section, 8);
- }
+ while (*arg)
+ {
+ switch (*arg)
+ {
+ case MACRO_EOA:
+ if (tokidx == ntok)
+ return macro;
+ else
+ tokidx = 0;
+ break;
- if (lit >= 0x8000)
- as_fatal (_("overflow in literal (.lita) table"));
+ /* Index register. */
+ case MACRO_IR:
+ if (tokidx >= ntok || tok[tokidx].X_op != O_register
+ || !is_ir_num (tok[tokidx].X_add_number))
+ goto match_failed;
+ ++tokidx;
+ break;
- /* emit "ldq r, lit(gp)" */
+ /* Parenthesized index register. */
+ case MACRO_PIR:
+ if (tokidx >= ntok || tok[tokidx].X_op != O_pregister
+ || !is_ir_num (tok[tokidx].X_add_number))
+ goto match_failed;
+ ++tokidx;
+ break;
- if (basereg != alpha_gp_register && targreg == basereg)
- {
- if (alpha_noat_on)
- as_bad (_("macro requires $at register while noat in effect"));
- if (targreg == AXP_REG_AT)
- as_bad (_("macro requires $at while $at in use"));
+ /* Optional parenthesized index register. */
+ case MACRO_OPIR:
+ if (tokidx < ntok && tok[tokidx].X_op == O_pregister
+ && is_ir_num (tok[tokidx].X_add_number))
+ ++tokidx;
+ break;
- set_tok_reg (newtok[0], AXP_REG_AT);
- }
- else
- set_tok_reg (newtok[0], targreg);
- set_tok_sym (newtok[1], alpha_lita_symbol, lit);
- set_tok_preg (newtok[2], alpha_gp_register);
+ /* Leading comma with a parenthesized index register. */
+ case MACRO_CPIR:
+ if (tokidx >= ntok || tok[tokidx].X_op != O_cpregister
+ || !is_ir_num (tok[tokidx].X_add_number))
+ goto match_failed;
+ ++tokidx;
+ break;
- assemble_tokens_to_insn ("ldq", newtok, 3, &insn);
+ /* Floating point register. */
+ case MACRO_FPR:
+ if (tokidx >= ntok || tok[tokidx].X_op != O_register
+ || !is_fpr_num (tok[tokidx].X_add_number))
+ goto match_failed;
+ ++tokidx;
+ break;
- assert (explicit_reloc == (const expressionS *) 0);
- assert (insn.nfixups == 1);
- insn.fixups[0].reloc = BFD_RELOC_ALPHA_LITERAL;
-#endif /* OBJ_ECOFF */
-#ifdef OBJ_ELF
- /* emit "ldq r, gotoff(gp)" */
+ /* Normal expression. */
+ case MACRO_EXP:
+ if (tokidx >= ntok)
+ goto match_failed;
+ switch (tok[tokidx].X_op)
+ {
+ case O_illegal:
+ case O_absent:
+ case O_register:
+ case O_pregister:
+ case O_cpregister:
+ case O_literal:
+ case O_lituse_base:
+ case O_lituse_bytoff:
+ case O_lituse_jsr:
+ case O_gpdisp:
+ case O_gprelhigh:
+ case O_gprellow:
+ case O_gprel:
+ case O_samegp:
+ goto match_failed;
- if (basereg != alpha_gp_register && targreg == basereg)
- {
- if (alpha_noat_on)
- as_bad (_("macro requires $at register while noat in effect"));
- if (targreg == AXP_REG_AT)
- as_bad (_("macro requires $at while $at in use"));
+ default:
+ break;
+ }
+ ++tokidx;
+ break;
- set_tok_reg (newtok[0], AXP_REG_AT);
- }
- else
- set_tok_reg (newtok[0], targreg);
+ match_failed:
+ while (*arg != MACRO_EOA)
+ ++arg;
+ tokidx = 0;
+ break;
+ }
+ ++arg;
+ }
+ }
+ while (++macro - alpha_macros < (int) alpha_num_macros
+ && !strcmp (macro->name, first_macro->name));
- /* XXX: Disable this .got minimizing optimization so that we can get
- better instruction offset knowledge in the compiler. This happens
- very infrequently anyway. */
- if (1
- || (!range_signed_32 (addend)
- && (alpha_noat_on || targreg == AXP_REG_AT)))
- {
- newtok[1] = *exp;
- addend = 0;
- }
- else
- {
- set_tok_sym (newtok[1], exp->X_add_symbol, 0);
- }
+ return NULL;
+}
- set_tok_preg (newtok[2], alpha_gp_register);
+/* Given an opcode name and a pre-tokenized set of arguments, take the
+ opcode all the way through emission. */
- assemble_tokens_to_insn ("ldq", newtok, 3, &insn);
+static void
+assemble_tokens (const char *opname,
+ const expressionS *tok,
+ int ntok,
+ int local_macros_on)
+{
+ int found_something = 0;
+ const struct alpha_opcode *opcode;
+ const struct alpha_macro *macro;
+ int cpumatch = 1;
+ bfd_reloc_code_real_type reloc = BFD_RELOC_UNUSED;
- assert (insn.nfixups == 1);
- if (!explicit_reloc)
- insn.fixups[0].reloc = BFD_RELOC_ALPHA_ELF_LITERAL;
- else
- {
#ifdef RELOC_OP_P
- insn.fixups[0].reloc
- = (ALPHA_RELOC_TABLE (explicit_reloc->X_op))->reloc;
- insn.sequence[0] = explicit_reloc->X_add_number;
-#else
- abort ();
+ /* If a user-specified relocation is present, this is not a macro. */
+ if (ntok && USER_RELOC_P (tok[ntok - 1].X_op))
+ {
+ reloc = ALPHA_RELOC_TABLE (tok[ntok - 1].X_op)->reloc;
+ ntok--;
+ }
+ else
#endif
- }
-#endif /* OBJ_ELF */
-#ifdef OBJ_EVAX
- offsetT link;
-
- /* Find symbol or symbol pointer in link section. */
+ if (local_macros_on)
+ {
+ macro = ((const struct alpha_macro *)
+ hash_find (alpha_macro_hash, opname));
+ if (macro)
+ {
+ found_something = 1;
+ macro = find_macro_match (macro, tok, &ntok);
+ if (macro)
+ {
+ (*macro->emit) (tok, ntok, macro->arg);
+ return;
+ }
+ }
+ }
- assert (explicit_reloc == (const expressionS *) 0);
- if (exp->X_add_symbol == alpha_evax_proc.symbol)
- {
- if (range_signed_16 (addend))
- {
- set_tok_reg (newtok[0], targreg);
- set_tok_const (newtok[1], addend);
- set_tok_preg (newtok[2], basereg);
- assemble_tokens_to_insn ("lda", newtok, 3, &insn);
- addend = 0;
- }
- else
- {
- set_tok_reg (newtok[0], targreg);
- set_tok_const (newtok[1], 0);
- set_tok_preg (newtok[2], basereg);
- assemble_tokens_to_insn ("lda", newtok, 3, &insn);
- }
- }
- else
- {
- if (!range_signed_32 (addend))
- {
- link = add_to_link_pool (alpha_evax_proc.symbol,
- exp->X_add_symbol, addend);
- addend = 0;
- }
- else
- {
- link = add_to_link_pool (alpha_evax_proc.symbol,
- exp->X_add_symbol, 0);
- }
- set_tok_reg (newtok[0], targreg);
- set_tok_const (newtok[1], link);
- set_tok_preg (newtok[2], basereg);
- assemble_tokens_to_insn ("ldq", newtok, 3, &insn);
- }
-#endif /* OBJ_EVAX */
+ /* Search opcodes. */
+ opcode = (const struct alpha_opcode *) hash_find (alpha_opcode_hash, opname);
+ if (opcode)
+ {
+ found_something = 1;
+ opcode = find_opcode_match (opcode, tok, &ntok, &cpumatch);
+ if (opcode)
+ {
+ struct alpha_insn insn;
+ assemble_insn (opcode, tok, ntok, &insn, reloc);
- emit_insn (&insn);
+ /* Copy the sequence number for the reloc from the reloc token. */
+ if (reloc != BFD_RELOC_UNUSED)
+ insn.sequence = tok[ntok].X_add_number;
-#ifndef OBJ_EVAX
- emit_lituse = 1;
-
- if (basereg != alpha_gp_register && basereg != AXP_REG_ZERO)
- {
- /* emit "addq r, base, r" */
-
- set_tok_reg (newtok[1], basereg);
- set_tok_reg (newtok[2], targreg);
- assemble_tokens ("addq", newtok, 3, 0);
- }
-#endif
-
- basereg = targreg;
- }
- break;
+ emit_insn (&insn);
+ return;
+ }
+ }
- case O_constant:
- assert (explicit_reloc == (const expressionS *) 0);
- break;
+ if (found_something)
+ {
+ if (cpumatch)
+ as_bad (_("inappropriate arguments for opcode `%s'"), opname);
+ else
+ as_bad (_("opcode `%s' not supported for target %s"), opname,
+ alpha_target_name);
+ }
+ else
+ as_bad (_("unknown opcode `%s'"), opname);
+}
+\f
+#ifdef OBJ_EVAX
- case O_subtract:
- /* Assume that this difference expression will be resolved to an
- absolute value and that that value will fit in 16 bits. */
+/* Add symbol+addend to link pool.
+ Return offset from basesym to entry in link pool.
- assert (explicit_reloc == (const expressionS *) 0);
- set_tok_reg (newtok[0], targreg);
- newtok[1] = *exp;
- set_tok_preg (newtok[2], basereg);
- assemble_tokens ("lda", newtok, 3, 0);
+ Add new fixup only if offset isn't 16bit. */
- if (poffset)
- set_tok_const (*poffset, 0);
- return 0;
+valueT
+add_to_link_pool (symbolS *basesym,
+ symbolS *sym,
+ offsetT addend)
+{
+ segT current_section = now_seg;
+ int current_subsec = now_subseg;
+ valueT offset;
+ bfd_reloc_code_real_type reloc_type;
+ char *p;
+ segment_info_type *seginfo = seg_info (alpha_link_section);
+ fixS *fixp;
- case O_big:
- if (exp->X_add_number > 0)
- as_bad (_("bignum invalid; zero assumed"));
- else
- as_bad (_("floating point number invalid; zero assumed"));
- addend = 0;
- break;
+ offset = - *symbol_get_obj (basesym);
- default:
- as_bad (_("can't handle expression"));
- addend = 0;
- break;
- }
+ /* @@ This assumes all entries in a given section will be of the same
+ size... Probably correct, but unwise to rely on. */
+ /* This must always be called with the same subsegment. */
- if (!range_signed_32 (addend))
- {
- offsetT lit;
+ if (seginfo->frchainP)
+ for (fixp = seginfo->frchainP->fix_root;
+ fixp != (fixS *) NULL;
+ fixp = fixp->fx_next, offset += 8)
+ {
+ if (fixp->fx_addsy == sym && fixp->fx_offset == addend)
+ {
+ if (range_signed_16 (offset))
+ {
+ return offset;
+ }
+ }
+ }
- /* for 64-bit addends, just put it in the literal pool */
+ /* Not found in 16bit signed range. */
-#ifdef OBJ_EVAX
- /* emit "ldq targreg, lit(basereg)" */
- lit = add_to_link_pool (alpha_evax_proc.symbol,
- section_symbol (absolute_section), addend);
- set_tok_reg (newtok[0], targreg);
- set_tok_const (newtok[1], lit);
- set_tok_preg (newtok[2], alpha_gp_register);
- assemble_tokens ("ldq", newtok, 3, 0);
-#else
+ subseg_set (alpha_link_section, 0);
+ p = frag_more (8);
+ memset (p, 0, 8);
- if (alpha_lit8_section == NULL)
- {
- create_literal_section (".lit8",
- &alpha_lit8_section,
- &alpha_lit8_symbol);
+ fix_new (frag_now, p - frag_now->fr_literal, 8, sym, addend, 0,
+ BFD_RELOC_64);
-#ifdef OBJ_ECOFF
- alpha_lit8_literal = add_to_literal_pool (alpha_lit8_symbol, 0x8000,
- alpha_lita_section, 8);
- if (alpha_lit8_literal >= 0x8000)
- as_fatal (_("overflow in literal (.lita) table"));
-#endif
- }
+ subseg_set (current_section, current_subsec);
+ seginfo->literal_pool_size += 8;
+ return offset;
+}
- lit = add_to_literal_pool (NULL, addend, alpha_lit8_section, 8) - 0x8000;
- if (lit >= 0x8000)
- as_fatal (_("overflow in literal (.lit8) table"));
+#endif /* OBJ_EVAX */
+\f
+/* Assembler directives. */
- /* emit "lda litreg, .lit8+0x8000" */
+/* Handle the .text pseudo-op. This is like the usual one, but it
+ clears alpha_insn_label and restores auto alignment. */
- if (targreg == basereg)
- {
- if (alpha_noat_on)
- as_bad (_("macro requires $at register while noat in effect"));
- if (targreg == AXP_REG_AT)
- as_bad (_("macro requires $at while $at in use"));
+static void
+s_alpha_text (int i)
- set_tok_reg (newtok[0], AXP_REG_AT);
- }
- else
- set_tok_reg (newtok[0], targreg);
-#ifdef OBJ_ECOFF
- set_tok_sym (newtok[1], alpha_lita_symbol, alpha_lit8_literal);
-#endif
+{
#ifdef OBJ_ELF
- set_tok_sym (newtok[1], alpha_lit8_symbol, 0x8000);
+ obj_elf_text (i);
+#else
+ s_text (i);
#endif
- set_tok_preg (newtok[2], alpha_gp_register);
+ alpha_insn_label = NULL;
+ alpha_auto_align_on = 1;
+ alpha_current_align = 0;
+}
- assemble_tokens_to_insn ("ldq", newtok, 3, &insn);
+/* Handle the .data pseudo-op. This is like the usual one, but it
+ clears alpha_insn_label and restores auto alignment. */
- assert (insn.nfixups == 1);
-#ifdef OBJ_ECOFF
- insn.fixups[0].reloc = BFD_RELOC_ALPHA_LITERAL;
-#endif
+static void
+s_alpha_data (int i)
+{
#ifdef OBJ_ELF
- insn.fixups[0].reloc = BFD_RELOC_ALPHA_ELF_LITERAL;
+ obj_elf_data (i);
+#else
+ s_data (i);
#endif
+ alpha_insn_label = NULL;
+ alpha_auto_align_on = 1;
+ alpha_current_align = 0;
+}
- emit_insn (&insn);
-
- /* emit "ldq litreg, lit(litreg)" */
-
- set_tok_const (newtok[1], lit);
- set_tok_preg (newtok[2], newtok[0].X_add_number);
+#if defined (OBJ_ECOFF) || defined (OBJ_EVAX)
- assemble_tokens_to_insn ("ldq", newtok, 3, &insn);
+/* Handle the OSF/1 and openVMS .comm pseudo quirks.
+ openVMS constructs a section for every common symbol. */
- assert (insn.nfixups < MAX_INSN_FIXUPS);
- if (insn.nfixups > 0)
- {
- memmove (&insn.fixups[1], &insn.fixups[0],
- sizeof (struct alpha_fixup) * insn.nfixups);
- }
- insn.nfixups++;
- insn.fixups[0].reloc = BFD_RELOC_ALPHA_LITUSE;
- insn.fixups[0].exp.X_op = O_symbol;
- insn.fixups[0].exp.X_add_symbol = section_symbol (now_seg);
- insn.fixups[0].exp.X_add_number = LITUSE_BASE;
- emit_lituse = 0;
+static void
+s_alpha_comm (int ignore ATTRIBUTE_UNUSED)
+{
+ char *name;
+ char c;
+ char *p;
+ offsetT temp;
+ symbolS *symbolP;
+#ifdef OBJ_EVAX
+ segT current_section = now_seg;
+ int current_subsec = now_subseg;
+ segT new_seg;
+#endif
- emit_insn (&insn);
+ name = input_line_pointer;
+ c = get_symbol_end ();
- /* emit "addq litreg, base, target" */
+ /* Just after name is now '\0'. */
+ p = input_line_pointer;
+ *p = c;
- if (basereg != AXP_REG_ZERO)
- {
- set_tok_reg (newtok[1], basereg);
- set_tok_reg (newtok[2], targreg);
- assemble_tokens ("addq", newtok, 3, 0);
- }
-#endif /* !OBJ_EVAX */
+ SKIP_WHITESPACE ();
- if (poffset)
- set_tok_const (*poffset, 0);
- *pbasereg = targreg;
+ /* Alpha OSF/1 compiler doesn't provide the comma, gcc does. */
+ if (*input_line_pointer == ',')
+ {
+ input_line_pointer++;
+ SKIP_WHITESPACE ();
}
- else
+ if ((temp = get_absolute_expression ()) < 0)
{
- offsetT low, high, extra, tmp;
+ as_warn (_(".COMMon length (%ld.) <0! Ignored."), (long) temp);
+ ignore_rest_of_line ();
+ return;
+ }
- /* for 32-bit operands, break up the addend */
+ *p = 0;
+ symbolP = symbol_find_or_make (name);
- low = sign_extend_16 (addend);
- tmp = addend - low;
- high = sign_extend_16 (tmp >> 16);
+#ifdef OBJ_EVAX
+ /* Make a section for the common symbol. */
+ new_seg = subseg_new (xstrdup (name), 0);
+#endif
- if (tmp - (high << 16))
- {
- extra = 0x4000;
- tmp -= 0x40000000;
- high = sign_extend_16 (tmp >> 16);
- }
- else
- extra = 0;
+ *p = c;
- set_tok_reg (newtok[0], targreg);
- set_tok_preg (newtok[2], basereg);
+#ifdef OBJ_EVAX
+ /* Alignment might follow. */
+ if (*input_line_pointer == ',')
+ {
+ offsetT align;
- if (extra)
- {
- /* emit "ldah r, extra(r) */
- set_tok_const (newtok[1], extra);
- assemble_tokens ("ldah", newtok, 3, 0);
- set_tok_preg (newtok[2], basereg = targreg);
- }
+ input_line_pointer++;
+ align = get_absolute_expression ();
+ bfd_set_section_alignment (stdoutput, new_seg, align);
+ }
+#endif
- if (high)
- {
- /* emit "ldah r, high(r) */
- set_tok_const (newtok[1], high);
- assemble_tokens ("ldah", newtok, 3, 0);
- basereg = targreg;
- set_tok_preg (newtok[2], basereg);
- }
-
- if ((low && !poffset) || (!poffset && basereg != targreg))
- {
- /* emit "lda r, low(base)" */
- set_tok_const (newtok[1], low);
- assemble_tokens ("lda", newtok, 3, 0);
- basereg = targreg;
- low = 0;
- }
-
- if (poffset)
- set_tok_const (*poffset, low);
- *pbasereg = basereg;
+ if (S_IS_DEFINED (symbolP) && ! S_IS_COMMON (symbolP))
+ {
+ as_bad (_("Ignoring attempt to re-define symbol"));
+ ignore_rest_of_line ();
+ return;
}
- return emit_lituse;
-}
+#ifdef OBJ_EVAX
+ if (bfd_section_size (stdoutput, new_seg) > 0)
+ {
+ if (bfd_section_size (stdoutput, new_seg) != temp)
+ as_bad (_("Length of .comm \"%s\" is already %ld. Not changed to %ld."),
+ S_GET_NAME (symbolP),
+ (long) bfd_section_size (stdoutput, new_seg),
+ (long) temp);
+ }
+#else
+ if (S_GET_VALUE (symbolP))
+ {
+ if (S_GET_VALUE (symbolP) != (valueT) temp)
+ as_bad (_("Length of .comm \"%s\" is already %ld. Not changed to %ld."),
+ S_GET_NAME (symbolP),
+ (long) S_GET_VALUE (symbolP),
+ (long) temp);
+ }
+#endif
+ else
+ {
+#ifdef OBJ_EVAX
+ subseg_set (new_seg, 0);
+ p = frag_more (temp);
+ new_seg->flags |= SEC_IS_COMMON;
+ if (! S_IS_DEFINED (symbolP))
+ S_SET_SEGMENT (symbolP, new_seg);
+#else
+ S_SET_VALUE (symbolP, (valueT) temp);
+#endif
+ S_SET_EXTERNAL (symbolP);
+ }
-/* The lda macro differs from the lda instruction in that it handles
- most simple expressions, particualrly symbol address loads and
- large constants. */
+#ifdef OBJ_EVAX
+ subseg_set (current_section, current_subsec);
+#endif
-static void
-emit_lda (tok, ntok, opname)
- const expressionS *tok;
- int ntok;
- const PTR opname;
-{
- int basereg;
- const expressionS *reloc = (const expressionS *) 0;
+ know (symbol_get_frag (symbolP) == &zero_address_frag);
-#ifdef RELOC_OP_P
- if (ntok && USER_RELOC_P (tok[ntok - 1].X_op))
- {
- const struct alpha_reloc_op_tag *r;
+ demand_empty_rest_of_line ();
+}
- reloc = &tok[ntok - 1];
- r = ALPHA_RELOC_TABLE (reloc->X_op);
- switch (reloc->X_op)
- {
- default:
- as_bad (_("Cannot use !%s!%d with %s"), r->name,
- (int) reloc->X_add_number, (const char *) opname);
+#endif /* ! OBJ_ELF */
- reloc = (const expressionS *) 0;
- ntok--;
- break;
+#ifdef OBJ_ECOFF
- case O_literal:
- ntok--;
- break;
+/* Handle the .rdata pseudo-op. This is like the usual one, but it
+ clears alpha_insn_label and restores auto alignment. */
- /* For lda $x,0($x)!lituse_base!y, don't use load_expression, since
- it is really too general for our needs. Instead just generate the
- lda directly. */
- case O_lituse_base:
- if (ntok != 4
- || tok[0].X_op != O_register
- || !is_ir_num (tok[0].X_add_number)
- || tok[1].X_op != O_constant
- || tok[2].X_op != O_pregister
- || !is_ir_num (tok[2].X_add_number))
- {
- as_bad (_("bad instruction format for lda !%s!%ld"), r->name,
- (long) reloc->X_add_number);
+static void
+s_alpha_rdata (int ignore ATTRIBUTE_UNUSED)
+{
+ int temp;
- reloc = (const expressionS *) 0;
- ntok--;
- break;
- }
+ temp = get_absolute_expression ();
+ subseg_new (".rdata", 0);
+ demand_empty_rest_of_line ();
+ alpha_insn_label = NULL;
+ alpha_auto_align_on = 1;
+ alpha_current_align = 0;
+}
- emit_loadstore (tok, ntok, "lda");
- return;
- }
- }
#endif
- if (ntok == 2)
- basereg = (tok[1].X_op == O_constant ? AXP_REG_ZERO : alpha_gp_register);
- else
- basereg = tok[2].X_add_number;
-
- (void) load_expression (tok[0].X_add_number, &tok[1], &basereg, NULL, reloc);
-}
+#ifdef OBJ_ECOFF
-/* The ldah macro differs from the ldah instruction in that it has $31
- as an implied base register. */
+/* Handle the .sdata pseudo-op. This is like the usual one, but it
+ clears alpha_insn_label and restores auto alignment. */
static void
-emit_ldah (tok, ntok, unused)
- const expressionS *tok;
- int ntok ATTRIBUTE_UNUSED;
- const PTR unused ATTRIBUTE_UNUSED;
+s_alpha_sdata (int ignore ATTRIBUTE_UNUSED)
{
- expressionS newtok[3];
+ int temp;
-#ifdef RELOC_OP_P
- if (ntok && USER_RELOC_P (tok[ntok - 1].X_op))
- {
- const expressionS *reloc_exp = &tok[ntok - 1];
- const struct alpha_reloc_op_tag *r = ALPHA_RELOC_TABLE (reloc_exp->X_op);
- as_bad (_("Cannot use !%s!%d with %s"), r->name,
- (int) reloc_exp->X_add_number, "ldah");
- ntok--;
- }
+ temp = get_absolute_expression ();
+ subseg_new (".sdata", 0);
+ demand_empty_rest_of_line ();
+ alpha_insn_label = NULL;
+ alpha_auto_align_on = 1;
+ alpha_current_align = 0;
+}
#endif
- newtok[0] = tok[0];
- newtok[1] = tok[1];
- set_tok_preg (newtok[2], AXP_REG_ZERO);
+#ifdef OBJ_ELF
+struct alpha_elf_frame_data
+{
+ symbolS *func_sym;
+ symbolS *func_end_sym;
+ symbolS *prologue_sym;
+ unsigned int mask;
+ unsigned int fmask;
+ int fp_regno;
+ int ra_regno;
+ offsetT frame_size;
+ offsetT mask_offset;
+ offsetT fmask_offset;
+
+ struct alpha_elf_frame_data *next;
+};
- assemble_tokens ("ldah", newtok, 3, 0);
-}
+static struct alpha_elf_frame_data *all_frame_data;
+static struct alpha_elf_frame_data **plast_frame_data = &all_frame_data;
+static struct alpha_elf_frame_data *cur_frame_data;
-/* Handle all "simple" integer register loads -- ldq, ldq_l, ldq_u,
- etc. They differ from the real instructions in that they do simple
- expressions like the lda macro. */
+/* Handle the .section pseudo-op. This is like the usual one, but it
+ clears alpha_insn_label and restores auto alignment. */
static void
-emit_ir_load (tok, ntok, opname)
- const expressionS *tok;
- int ntok;
- const PTR opname;
+s_alpha_section (int ignore ATTRIBUTE_UNUSED)
{
- int basereg, lituse;
- expressionS newtok[3];
- struct alpha_insn insn;
+ obj_elf_section (ignore);
-#ifdef RELOC_OP_P
- const expressionS *reloc = (const expressionS *) 0;
+ alpha_insn_label = NULL;
+ alpha_auto_align_on = 1;
+ alpha_current_align = 0;
+}
- if (ntok && USER_RELOC_P (tok[ntok - 1].X_op))
+static void
+s_alpha_ent (int dummy ATTRIBUTE_UNUSED)
+{
+ if (ECOFF_DEBUGGING)
+ ecoff_directive_ent (0);
+ else
{
- const struct alpha_reloc_op_tag *r;
+ char *name, name_end;
+ name = input_line_pointer;
+ name_end = get_symbol_end ();
- reloc = &tok[ntok - 1];
- switch (reloc->X_op)
+ if (! is_name_beginner (*name))
{
- case O_lituse_base:
- ntok--;
- break;
-
- case O_literal:
- if (strcmp ((const char *) opname, "ldq") == 0)
- {
- emit_lda (tok, ntok, opname);
- return;
- }
-
- /* fall through */
- default:
- ntok--;
- r = ALPHA_RELOC_TABLE (reloc->X_op);
- as_bad (_("Cannot use !%s!%d with %s"), r->name,
- (int) reloc->X_add_number, (const char *) opname);
+ as_warn (_(".ent directive has no name"));
+ *input_line_pointer = name_end;
}
- }
-#endif
+ else
+ {
+ symbolS *sym;
- if (ntok == 2)
- basereg = (tok[1].X_op == O_constant ? AXP_REG_ZERO : alpha_gp_register);
- else
- basereg = tok[2].X_add_number;
+ if (cur_frame_data)
+ as_warn (_("nested .ent directives"));
- lituse = load_expression (tok[0].X_add_number, &tok[1], &basereg,
- &newtok[1], (const expressionS *) 0);
+ sym = symbol_find_or_make (name);
+ symbol_get_bfdsym (sym)->flags |= BSF_FUNCTION;
- newtok[0] = tok[0];
- set_tok_preg (newtok[2], basereg);
+ cur_frame_data = calloc (1, sizeof (*cur_frame_data));
+ cur_frame_data->func_sym = sym;
- assemble_tokens_to_insn ((const char *) opname, newtok, 3, &insn);
+ /* Provide sensible defaults. */
+ cur_frame_data->fp_regno = 30; /* sp */
+ cur_frame_data->ra_regno = 26; /* ra */
-#ifdef RELOC_OP_P
- if (reloc)
- {
- int nfixups = insn.nfixups;
- const struct alpha_reloc_op_tag *r = ALPHA_RELOC_TABLE (reloc->X_op);
-
- assert (nfixups < MAX_INSN_FIXUPS);
- insn.fixups[nfixups].reloc = r->reloc;
- insn.fixups[nfixups].exp.X_op = O_symbol;
- insn.fixups[nfixups].exp.X_add_symbol = section_symbol (now_seg);
- insn.fixups[nfixups].exp.X_add_number = r->lituse;
- insn.sequence[nfixups] = reloc->X_add_number;
- insn.nfixups++;
- }
-#endif
+ *plast_frame_data = cur_frame_data;
+ plast_frame_data = &cur_frame_data->next;
- if (lituse)
- {
- assert (insn.nfixups < MAX_INSN_FIXUPS);
- if (insn.nfixups > 0)
- {
- memmove (&insn.fixups[1], &insn.fixups[0],
- sizeof (struct alpha_fixup) * insn.nfixups);
+ /* The .ent directive is sometimes followed by a number. Not sure
+ what it really means, but ignore it. */
+ *input_line_pointer = name_end;
+ SKIP_WHITESPACE ();
+ if (*input_line_pointer == ',')
+ {
+ input_line_pointer++;
+ SKIP_WHITESPACE ();
+ }
+ if (ISDIGIT (*input_line_pointer) || *input_line_pointer == '-')
+ (void) get_absolute_expression ();
}
- insn.nfixups++;
- insn.fixups[0].reloc = BFD_RELOC_ALPHA_LITUSE;
- insn.fixups[0].exp.X_op = O_symbol;
- insn.fixups[0].exp.X_add_symbol = section_symbol (now_seg);
- insn.fixups[0].exp.X_add_number = LITUSE_BASE;
+ demand_empty_rest_of_line ();
}
-
- emit_insn (&insn);
}
-/* Handle fp register loads, and both integer and fp register stores.
- Again, we handle simple expressions. */
-
static void
-emit_loadstore (tok, ntok, opname)
- const expressionS *tok;
- int ntok;
- const PTR opname;
+s_alpha_end (int dummy ATTRIBUTE_UNUSED)
{
- int basereg, lituse;
- expressionS newtok[3];
- struct alpha_insn insn;
-
-#ifdef RELOC_OP_P
- const expressionS *reloc = (const expressionS *) 0;
-
- if (ntok && USER_RELOC_P (tok[ntok - 1].X_op))
+ if (ECOFF_DEBUGGING)
+ ecoff_directive_end (0);
+ else
{
- reloc = &tok[--ntok];
- if (reloc->X_op != O_lituse_base)
+ char *name, name_end;
+ name = input_line_pointer;
+ name_end = get_symbol_end ();
+
+ if (! is_name_beginner (*name))
{
- const struct alpha_reloc_op_tag *r = &alpha_reloc_op[reloc->X_md];
- as_bad (_("Cannot use !%s!%d with %s"), r->name,
- (int) reloc->X_add_number, (const char *) opname);
+ as_warn (_(".end directive has no name"));
+ *input_line_pointer = name_end;
}
- }
-#endif
-
- if (ntok == 2)
- basereg = (tok[1].X_op == O_constant ? AXP_REG_ZERO : alpha_gp_register);
- else
- basereg = tok[2].X_add_number;
+ else
+ {
+ symbolS *sym;
- if (tok[1].X_op != O_constant || !range_signed_16 (tok[1].X_add_number))
- {
- if (alpha_noat_on)
- as_bad (_("macro requires $at register while noat in effect"));
+ sym = symbol_find (name);
+ if (!cur_frame_data)
+ as_warn (_(".end directive without matching .ent"));
+ else if (sym != cur_frame_data->func_sym)
+ as_warn (_(".end directive names different symbol than .ent"));
- lituse = load_expression (AXP_REG_AT, &tok[1], &basereg, &newtok[1],
- (const expressionS *) 0);
- }
- else
- {
- newtok[1] = tok[1];
- lituse = 0;
- }
+ /* Create an expression to calculate the size of the function. */
+ if (sym && cur_frame_data)
+ {
+ OBJ_SYMFIELD_TYPE *obj = symbol_get_obj (sym);
+ expressionS *exp = xmalloc (sizeof (expressionS));
- newtok[0] = tok[0];
- set_tok_preg (newtok[2], basereg);
+ obj->size = exp;
+ exp->X_op = O_subtract;
+ exp->X_add_symbol = symbol_temp_new_now ();
+ exp->X_op_symbol = sym;
+ exp->X_add_number = 0;
- assemble_tokens_to_insn ((const char *) opname, newtok, 3, &insn);
+ cur_frame_data->func_end_sym = exp->X_add_symbol;
+ }
-#ifdef RELOC_OP_P
- if (reloc)
- {
- int nfixups = insn.nfixups;
- const struct alpha_reloc_op_tag *r = ALPHA_RELOC_TABLE (reloc->X_op);
-
- assert (nfixups < MAX_INSN_FIXUPS);
- insn.fixups[nfixups].reloc = r->reloc;
- insn.fixups[nfixups].exp.X_op = O_symbol;
- insn.fixups[nfixups].exp.X_add_symbol = section_symbol (now_seg);
- insn.fixups[nfixups].exp.X_add_number = r->lituse;
- insn.sequence[nfixups] = reloc->X_add_number;
- insn.nfixups++;
- }
-#endif
+ cur_frame_data = NULL;
- if (lituse)
- {
- assert (insn.nfixups < MAX_INSN_FIXUPS);
- if (insn.nfixups > 0)
- {
- memmove (&insn.fixups[1], &insn.fixups[0],
- sizeof (struct alpha_fixup) * insn.nfixups);
+ *input_line_pointer = name_end;
}
- insn.nfixups++;
- insn.fixups[0].reloc = BFD_RELOC_ALPHA_LITUSE;
- insn.fixups[0].exp.X_op = O_symbol;
- insn.fixups[0].exp.X_add_symbol = section_symbol (now_seg);
- insn.fixups[0].exp.X_add_number = LITUSE_BASE;
+ demand_empty_rest_of_line ();
}
-
- emit_insn (&insn);
}
-/* Load a half-word or byte as an unsigned value. */
-
static void
-emit_ldXu (tok, ntok, vlgsize)
- const expressionS *tok;
- int ntok;
- const PTR vlgsize;
+s_alpha_mask (int fp)
{
- if (alpha_target & AXP_OPCODE_BWX)
- emit_ir_load (tok, ntok, ldXu_op[(long) vlgsize]);
+ if (ECOFF_DEBUGGING)
+ {
+ if (fp)
+ ecoff_directive_fmask (0);
+ else
+ ecoff_directive_mask (0);
+ }
else
{
- expressionS newtok[3];
+ long val;
+ offsetT offset;
-#ifdef RELOC_OP_P
- if (ntok && USER_RELOC_P (tok[ntok - 1].X_op))
+ if (!cur_frame_data)
{
- const expressionS *reloc_exp = &tok[ntok - 1];
- const struct alpha_reloc_op_tag *r
- = ALPHA_RELOC_TABLE (reloc_exp->X_op);
-
- as_bad (_("Cannot use !%s!%d with %s"), r->name,
- (int) reloc_exp->X_add_number, "ldbu/ldwu");
- ntok--;
+ if (fp)
+ as_warn (_(".fmask outside of .ent"));
+ else
+ as_warn (_(".mask outside of .ent"));
+ discard_rest_of_line ();
+ return;
}
-#endif
- if (alpha_noat_on)
- as_bad (_("macro requires $at register while noat in effect"));
+ if (get_absolute_expression_and_terminator (&val) != ',')
+ {
+ if (fp)
+ as_warn (_("bad .fmask directive"));
+ else
+ as_warn (_("bad .mask directive"));
+ --input_line_pointer;
+ discard_rest_of_line ();
+ return;
+ }
- /* emit "lda $at, exp" */
+ offset = get_absolute_expression ();
+ demand_empty_rest_of_line ();
- memcpy (newtok, tok, sizeof (expressionS) * ntok);
- newtok[0].X_add_number = AXP_REG_AT;
- assemble_tokens ("lda", newtok, ntok, 1);
+ if (fp)
+ {
+ cur_frame_data->fmask = val;
+ cur_frame_data->fmask_offset = offset;
+ }
+ else
+ {
+ cur_frame_data->mask = val;
+ cur_frame_data->mask_offset = offset;
+ }
+ }
+}
- /* emit "ldq_u targ, 0($at)" */
+static void
+s_alpha_frame (int dummy ATTRIBUTE_UNUSED)
+{
+ if (ECOFF_DEBUGGING)
+ ecoff_directive_frame (0);
+ else
+ {
+ long val;
- newtok[0] = tok[0];
- set_tok_const (newtok[1], 0);
- set_tok_preg (newtok[2], AXP_REG_AT);
- assemble_tokens ("ldq_u", newtok, 3, 1);
+ if (!cur_frame_data)
+ {
+ as_warn (_(".frame outside of .ent"));
+ discard_rest_of_line ();
+ return;
+ }
- /* emit "extXl targ, $at, targ" */
+ cur_frame_data->fp_regno = tc_get_register (1);
- set_tok_reg (newtok[1], AXP_REG_AT);
- newtok[2] = newtok[0];
- assemble_tokens (extXl_op[(long) vlgsize], newtok, 3, 1);
- }
-}
+ SKIP_WHITESPACE ();
+ if (*input_line_pointer++ != ','
+ || get_absolute_expression_and_terminator (&val) != ',')
+ {
+ as_warn (_("bad .frame directive"));
+ --input_line_pointer;
+ discard_rest_of_line ();
+ return;
+ }
+ cur_frame_data->frame_size = val;
-/* Load a half-word or byte as a signed value. */
+ cur_frame_data->ra_regno = tc_get_register (0);
-static void
-emit_ldX (tok, ntok, vlgsize)
- const expressionS *tok;
- int ntok;
- const PTR vlgsize;
-{
- emit_ldXu (tok, ntok, vlgsize);
- assemble_tokens (sextX_op[(long) vlgsize], tok, 1, 1);
+ /* Next comes the "offset of saved $a0 from $sp". In gcc terms
+ this is current_function_pretend_args_size. There's no place
+ to put this value, so ignore it. */
+ s_ignore (42);
+ }
}
-/* Load an integral value from an unaligned address as an unsigned
- value. */
-
static void
-emit_uldXu (tok, ntok, vlgsize)
- const expressionS *tok;
- int ntok;
- const PTR vlgsize;
+s_alpha_prologue (int ignore ATTRIBUTE_UNUSED)
{
- long lgsize = (long) vlgsize;
- expressionS newtok[3];
-
- if (alpha_noat_on)
- as_bad (_("macro requires $at register while noat in effect"));
+ symbolS *sym;
+ int arg;
- /* emit "lda $at, exp" */
+ arg = get_absolute_expression ();
+ demand_empty_rest_of_line ();
- memcpy (newtok, tok, sizeof (expressionS) * ntok);
- newtok[0].X_add_number = AXP_REG_AT;
- assemble_tokens ("lda", newtok, ntok, 1);
+ if (ECOFF_DEBUGGING)
+ sym = ecoff_get_cur_proc_sym ();
+ else
+ sym = cur_frame_data ? cur_frame_data->func_sym : NULL;
- /* emit "ldq_u $t9, 0($at)" */
+ if (sym == NULL)
+ {
+ as_bad (_(".prologue directive without a preceding .ent directive"));
+ return;
+ }
- set_tok_reg (newtok[0], AXP_REG_T9);
- set_tok_const (newtok[1], 0);
- set_tok_preg (newtok[2], AXP_REG_AT);
- assemble_tokens ("ldq_u", newtok, 3, 1);
+ switch (arg)
+ {
+ case 0: /* No PV required. */
+ S_SET_OTHER (sym, STO_ALPHA_NOPV
+ | (S_GET_OTHER (sym) & ~STO_ALPHA_STD_GPLOAD));
+ break;
+ case 1: /* Std GP load. */
+ S_SET_OTHER (sym, STO_ALPHA_STD_GPLOAD
+ | (S_GET_OTHER (sym) & ~STO_ALPHA_STD_GPLOAD));
+ break;
+ case 2: /* Non-std use of PV. */
+ break;
- /* emit "ldq_u $t10, size-1($at)" */
+ default:
+ as_bad (_("Invalid argument %d to .prologue."), arg);
+ break;
+ }
- set_tok_reg (newtok[0], AXP_REG_T10);
- set_tok_const (newtok[1], (1 << lgsize) - 1);
- assemble_tokens ("ldq_u", newtok, 3, 1);
+ if (cur_frame_data)
+ cur_frame_data->prologue_sym = symbol_temp_new_now ();
+}
- /* emit "extXl $t9, $at, $t9" */
+static char *first_file_directive;
- set_tok_reg (newtok[0], AXP_REG_T9);
- set_tok_reg (newtok[1], AXP_REG_AT);
- set_tok_reg (newtok[2], AXP_REG_T9);
- assemble_tokens (extXl_op[lgsize], newtok, 3, 1);
+static void
+s_alpha_file (int ignore ATTRIBUTE_UNUSED)
+{
+ /* Save the first .file directive we see, so that we can change our
+ minds about whether ecoff debugging should or shouldn't be enabled. */
+ if (alpha_flag_mdebug < 0 && ! first_file_directive)
+ {
+ char *start = input_line_pointer;
+ size_t len;
- /* emit "extXh $t10, $at, $t10" */
+ discard_rest_of_line ();
- set_tok_reg (newtok[0], AXP_REG_T10);
- set_tok_reg (newtok[2], AXP_REG_T10);
- assemble_tokens (extXh_op[lgsize], newtok, 3, 1);
+ len = input_line_pointer - start;
+ first_file_directive = xmalloc (len + 1);
+ memcpy (first_file_directive, start, len);
+ first_file_directive[len] = '\0';
- /* emit "or $t9, $t10, targ" */
+ input_line_pointer = start;
+ }
- set_tok_reg (newtok[0], AXP_REG_T9);
- set_tok_reg (newtok[1], AXP_REG_T10);
- newtok[2] = tok[0];
- assemble_tokens ("or", newtok, 3, 1);
+ if (ECOFF_DEBUGGING)
+ ecoff_directive_file (0);
+ else
+ dwarf2_directive_file (0);
}
-/* Load an integral value from an unaligned address as a signed value.
- Note that quads should get funneled to the unsigned load since we
- don't have to do the sign extension. */
-
static void
-emit_uldX (tok, ntok, vlgsize)
- const expressionS *tok;
- int ntok;
- const PTR vlgsize;
+s_alpha_loc (int ignore ATTRIBUTE_UNUSED)
{
- emit_uldXu (tok, ntok, vlgsize);
- assemble_tokens (sextX_op[(long) vlgsize], tok, 1, 1);
+ if (ECOFF_DEBUGGING)
+ ecoff_directive_loc (0);
+ else
+ dwarf2_directive_loc (0);
}
-/* Implement the ldil macro. */
-
static void
-emit_ldil (tok, ntok, unused)
- const expressionS *tok;
- int ntok;
- const PTR unused ATTRIBUTE_UNUSED;
+s_alpha_stab (int n)
{
- expressionS newtok[2];
-
-#ifdef RELOC_OP_P
- if (ntok && USER_RELOC_P (tok[ntok - 1].X_op))
+ /* If we've been undecided about mdebug, make up our minds in favour. */
+ if (alpha_flag_mdebug < 0)
{
- const expressionS *reloc_exp = &tok[ntok - 1];
- const struct alpha_reloc_op_tag *r = ALPHA_RELOC_TABLE (reloc_exp->X_op);
- as_bad (_("Cannot use !%s!%d with %s"), r->name,
- (int) reloc_exp->X_add_number, "ldil");
- ntok--;
- }
-#endif
+ segT sec = subseg_new (".mdebug", 0);
+ bfd_set_section_flags (stdoutput, sec, SEC_HAS_CONTENTS | SEC_READONLY);
+ bfd_set_section_alignment (stdoutput, sec, 3);
- memcpy (newtok, tok, sizeof (newtok));
- newtok[1].X_add_number = sign_extend_32 (tok[1].X_add_number);
+ ecoff_read_begin_hook ();
- assemble_tokens ("lda", newtok, ntok, 1);
-}
+ if (first_file_directive)
+ {
+ char *save_ilp = input_line_pointer;
+ input_line_pointer = first_file_directive;
+ ecoff_directive_file (0);
+ input_line_pointer = save_ilp;
+ free (first_file_directive);
+ }
-/* Store a half-word or byte. */
+ alpha_flag_mdebug = 1;
+ }
+ s_stab (n);
+}
static void
-emit_stX (tok, ntok, vlgsize)
- const expressionS *tok;
- int ntok;
- const PTR vlgsize;
+s_alpha_coff_wrapper (int which)
{
- int lgsize = (int) (long) vlgsize;
+ static void (* const fns[]) PARAMS ((int)) = {
+ ecoff_directive_begin,
+ ecoff_directive_bend,
+ ecoff_directive_def,
+ ecoff_directive_dim,
+ ecoff_directive_endef,
+ ecoff_directive_scl,
+ ecoff_directive_tag,
+ ecoff_directive_val,
+ };
- if (alpha_target & AXP_OPCODE_BWX)
- emit_loadstore (tok, ntok, stX_op[lgsize]);
+ assert (which >= 0 && which < (int) (sizeof (fns)/sizeof (*fns)));
+
+ if (ECOFF_DEBUGGING)
+ (*fns[which]) (0);
else
{
- expressionS newtok[3];
+ as_bad (_("ECOFF debugging is disabled."));
+ ignore_rest_of_line ();
+ }
+}
- if (alpha_noat_on)
- as_bad (_("macro requires $at register while noat in effect"));
+/* Called at the end of assembly. Here we emit unwind info for frames
+ unless the compiler has done it for us. */
- /* emit "lda $at, exp" */
+void
+alpha_elf_md_end (void)
+{
+ struct alpha_elf_frame_data *p;
- memcpy (newtok, tok, sizeof (expressionS) * ntok);
- newtok[0].X_add_number = AXP_REG_AT;
- assemble_tokens ("lda", newtok, ntok, 1);
+ if (cur_frame_data)
+ as_warn (_(".ent directive without matching .end"));
- /* emit "ldq_u $t9, 0($at)" */
+ /* If someone has generated the unwind info themselves, great. */
+ if (bfd_get_section_by_name (stdoutput, ".eh_frame") != NULL)
+ return;
- set_tok_reg (newtok[0], AXP_REG_T9);
- set_tok_const (newtok[1], 0);
- set_tok_preg (newtok[2], AXP_REG_AT);
- assemble_tokens ("ldq_u", newtok, 3, 1);
+ /* Generate .eh_frame data for the unwind directives specified. */
+ for (p = all_frame_data; p ; p = p->next)
+ if (p->prologue_sym)
+ {
+ /* Create a temporary symbol at the same location as our
+ function symbol. This prevents problems with globals. */
+ cfi_new_fde (symbol_temp_new (S_GET_SEGMENT (p->func_sym),
+ S_GET_VALUE (p->func_sym),
+ symbol_get_frag (p->func_sym)));
+
+ cfi_set_return_column (p->ra_regno);
+ cfi_add_CFA_def_cfa_register (30);
+ if (p->fp_regno != 30 || p->mask || p->fmask || p->frame_size)
+ {
+ unsigned int mask;
+ offsetT offset;
- /* emit "insXl src, $at, $t10" */
+ cfi_add_advance_loc (p->prologue_sym);
- newtok[0] = tok[0];
- set_tok_reg (newtok[1], AXP_REG_AT);
- set_tok_reg (newtok[2], AXP_REG_T10);
- assemble_tokens (insXl_op[lgsize], newtok, 3, 1);
+ if (p->fp_regno != 30)
+ if (p->frame_size != 0)
+ cfi_add_CFA_def_cfa (p->fp_regno, p->frame_size);
+ else
+ cfi_add_CFA_def_cfa_register (p->fp_regno);
+ else if (p->frame_size != 0)
+ cfi_add_CFA_def_cfa_offset (p->frame_size);
- /* emit "mskXl $t9, $at, $t9" */
+ mask = p->mask;
+ offset = p->mask_offset;
- set_tok_reg (newtok[0], AXP_REG_T9);
- newtok[2] = newtok[0];
- assemble_tokens (mskXl_op[lgsize], newtok, 3, 1);
+ /* Recall that $26 is special-cased and stored first. */
+ if ((mask >> 26) & 1)
+ {
+ cfi_add_CFA_offset (26, offset);
+ offset += 8;
+ mask &= ~(1 << 26);
+ }
+ while (mask)
+ {
+ unsigned int i;
+ i = mask & -mask;
+ mask ^= i;
+ i = ffs (i) - 1;
- /* emit "or $t9, $t10, $t9" */
+ cfi_add_CFA_offset (i, offset);
+ offset += 8;
+ }
- set_tok_reg (newtok[1], AXP_REG_T10);
- assemble_tokens ("or", newtok, 3, 1);
+ mask = p->fmask;
+ offset = p->fmask_offset;
+ while (mask)
+ {
+ unsigned int i;
+ i = mask & -mask;
+ mask ^= i;
+ i = ffs (i) - 1;
- /* emit "stq_u $t9, 0($at) */
+ cfi_add_CFA_offset (i + 32, offset);
+ offset += 8;
+ }
+ }
- set_tok_const (newtok[1], 0);
- set_tok_preg (newtok[2], AXP_REG_AT);
- assemble_tokens ("stq_u", newtok, 3, 1);
- }
+ cfi_end_fde (p->func_end_sym);
+ }
}
-/* Store an integer to an unaligned address. */
-
static void
-emit_ustX (tok, ntok, vlgsize)
- const expressionS *tok;
- int ntok;
- const PTR vlgsize;
+s_alpha_usepv (int unused ATTRIBUTE_UNUSED)
{
- int lgsize = (int) (long) vlgsize;
- expressionS newtok[3];
+ char *name, name_end;
+ char *which, which_end;
+ symbolS *sym;
+ int other;
- /* emit "lda $at, exp" */
+ name = input_line_pointer;
+ name_end = get_symbol_end ();
- memcpy (newtok, tok, sizeof (expressionS) * ntok);
- newtok[0].X_add_number = AXP_REG_AT;
- assemble_tokens ("lda", newtok, ntok, 1);
+ if (! is_name_beginner (*name))
+ {
+ as_bad (_(".usepv directive has no name"));
+ *input_line_pointer = name_end;
+ ignore_rest_of_line ();
+ return;
+ }
- /* emit "ldq_u $9, 0($at)" */
+ sym = symbol_find_or_make (name);
+ *input_line_pointer++ = name_end;
- set_tok_reg (newtok[0], AXP_REG_T9);
- set_tok_const (newtok[1], 0);
- set_tok_preg (newtok[2], AXP_REG_AT);
- assemble_tokens ("ldq_u", newtok, 3, 1);
+ if (name_end != ',')
+ {
+ as_bad (_(".usepv directive has no type"));
+ ignore_rest_of_line ();
+ return;
+ }
- /* emit "ldq_u $10, size-1($at)" */
+ SKIP_WHITESPACE ();
+ which = input_line_pointer;
+ which_end = get_symbol_end ();
- set_tok_reg (newtok[0], AXP_REG_T10);
- set_tok_const (newtok[1], (1 << lgsize) - 1);
- assemble_tokens ("ldq_u", newtok, 3, 1);
+ if (strcmp (which, "no") == 0)
+ other = STO_ALPHA_NOPV;
+ else if (strcmp (which, "std") == 0)
+ other = STO_ALPHA_STD_GPLOAD;
+ else
+ {
+ as_bad (_("unknown argument for .usepv"));
+ other = 0;
+ }
- /* emit "insXl src, $at, $t11" */
-
- newtok[0] = tok[0];
- set_tok_reg (newtok[1], AXP_REG_AT);
- set_tok_reg (newtok[2], AXP_REG_T11);
- assemble_tokens (insXl_op[lgsize], newtok, 3, 1);
+ *input_line_pointer = which_end;
+ demand_empty_rest_of_line ();
- /* emit "insXh src, $at, $t12" */
+ S_SET_OTHER (sym, other | (S_GET_OTHER (sym) & ~STO_ALPHA_STD_GPLOAD));
+}
+#endif /* OBJ_ELF */
- set_tok_reg (newtok[2], AXP_REG_T12);
- assemble_tokens (insXh_op[lgsize], newtok, 3, 1);
+/* Standard calling conventions leaves the CFA at $30 on entry. */
- /* emit "mskXl $t9, $at, $t9" */
+void
+alpha_cfi_frame_initial_instructions (void)
+{
+ cfi_add_CFA_def_cfa_register (30);
+}
- set_tok_reg (newtok[0], AXP_REG_T9);
- newtok[2] = newtok[0];
- assemble_tokens (mskXl_op[lgsize], newtok, 3, 1);
+#ifdef OBJ_EVAX
- /* emit "mskXh $t10, $at, $t10" */
+/* Handle the section specific pseudo-op. */
- set_tok_reg (newtok[0], AXP_REG_T10);
- newtok[2] = newtok[0];
- assemble_tokens (mskXh_op[lgsize], newtok, 3, 1);
+static void
+s_alpha_section (int secid)
+{
+ int temp;
+#define EVAX_SECTION_COUNT 5
+ static char *section_name[EVAX_SECTION_COUNT + 1] =
+ { "NULL", ".rdata", ".comm", ".link", ".ctors", ".dtors" };
- /* emit "or $t9, $t11, $t9" */
+ if ((secid <= 0) || (secid > EVAX_SECTION_COUNT))
+ {
+ as_fatal (_("Unknown section directive"));
+ demand_empty_rest_of_line ();
+ return;
+ }
+ temp = get_absolute_expression ();
+ subseg_new (section_name[secid], 0);
+ demand_empty_rest_of_line ();
+ alpha_insn_label = NULL;
+ alpha_auto_align_on = 1;
+ alpha_current_align = 0;
+}
- set_tok_reg (newtok[0], AXP_REG_T9);
- set_tok_reg (newtok[1], AXP_REG_T11);
- newtok[2] = newtok[0];
- assemble_tokens ("or", newtok, 3, 1);
+/* Parse .ent directives. */
- /* emit "or $t10, $t12, $t10" */
+static void
+s_alpha_ent (int ignore ATTRIBUTE_UNUSED)
+{
+ symbolS *symbol;
+ expressionS symexpr;
- set_tok_reg (newtok[0], AXP_REG_T10);
- set_tok_reg (newtok[1], AXP_REG_T12);
- newtok[2] = newtok[0];
- assemble_tokens ("or", newtok, 3, 1);
+ alpha_evax_proc.pdsckind = 0;
+ alpha_evax_proc.framereg = -1;
+ alpha_evax_proc.framesize = 0;
+ alpha_evax_proc.rsa_offset = 0;
+ alpha_evax_proc.ra_save = AXP_REG_RA;
+ alpha_evax_proc.fp_save = -1;
+ alpha_evax_proc.imask = 0;
+ alpha_evax_proc.fmask = 0;
+ alpha_evax_proc.prologue = 0;
+ alpha_evax_proc.type = 0;
- /* emit "stq_u $t9, 0($at)" */
+ expression (&symexpr);
- set_tok_reg (newtok[0], AXP_REG_T9);
- set_tok_const (newtok[1], 0);
- set_tok_preg (newtok[2], AXP_REG_AT);
- assemble_tokens ("stq_u", newtok, 3, 1);
+ if (symexpr.X_op != O_symbol)
+ {
+ as_fatal (_(".ent directive has no symbol"));
+ demand_empty_rest_of_line ();
+ return;
+ }
- /* emit "stq_u $t10, size-1($at)" */
+ symbol = make_expr_symbol (&symexpr);
+ symbol_get_bfdsym (symbol)->flags |= BSF_FUNCTION;
+ alpha_evax_proc.symbol = symbol;
- set_tok_reg (newtok[0], AXP_REG_T10);
- set_tok_const (newtok[1], (1 << lgsize) - 1);
- assemble_tokens ("stq_u", newtok, 3, 1);
+ demand_empty_rest_of_line ();
}
-/* Sign extend a half-word or byte. The 32-bit sign extend is
- implemented as "addl $31, $r, $t" in the opcode table. */
+/* Parse .frame <framreg>,<framesize>,RA,<rsa_offset> directives. */
static void
-emit_sextX (tok, ntok, vlgsize)
- const expressionS *tok;
- int ntok;
- const PTR vlgsize;
+s_alpha_frame (int ignore ATTRIBUTE_UNUSED)
{
- long lgsize = (long) vlgsize;
-
- if (alpha_target & AXP_OPCODE_BWX)
- assemble_tokens (sextX_op[lgsize], tok, ntok, 0);
- else
- {
- int bitshift = 64 - 8 * (1 << lgsize);
- expressionS newtok[3];
-
-#ifdef RELOC_OP_P
- if (ntok && USER_RELOC_P (tok[ntok - 1].X_op))
- {
- const expressionS *reloc_exp = &tok[ntok - 1];
- const struct alpha_reloc_op_tag *r
- = ALPHA_RELOC_TABLE (reloc_exp->X_op);
-
- as_bad (_("Cannot use !%s!%d with %s"), r->name,
- (int) reloc_exp->X_add_number, "setxt");
- ntok--;
- }
-#endif
+ long val;
- /* emit "sll src,bits,dst" */
+ alpha_evax_proc.framereg = tc_get_register (1);
- newtok[0] = tok[0];
- set_tok_const (newtok[1], bitshift);
- newtok[2] = tok[ntok - 1];
- assemble_tokens ("sll", newtok, 3, 1);
+ SKIP_WHITESPACE ();
+ if (*input_line_pointer++ != ','
+ || get_absolute_expression_and_terminator (&val) != ',')
+ {
+ as_warn (_("Bad .frame directive 1./2. param"));
+ --input_line_pointer;
+ demand_empty_rest_of_line ();
+ return;
+ }
- /* emit "sra dst,bits,dst" */
+ alpha_evax_proc.framesize = val;
- newtok[0] = newtok[2];
- assemble_tokens ("sra", newtok, 3, 1);
+ (void) tc_get_register (1);
+ SKIP_WHITESPACE ();
+ if (*input_line_pointer++ != ',')
+ {
+ as_warn (_("Bad .frame directive 3./4. param"));
+ --input_line_pointer;
+ demand_empty_rest_of_line ();
+ return;
}
+ alpha_evax_proc.rsa_offset = get_absolute_expression ();
}
-/* Implement the division and modulus macros. */
-
-#ifdef OBJ_EVAX
-
-/* Make register usage like in normal procedure call.
- Don't clobber PV and RA. */
-
static void
-emit_division (tok, ntok, symname)
- const expressionS *tok;
- int ntok;
- const PTR symname;
+s_alpha_pdesc (int ignore ATTRIBUTE_UNUSED)
{
- /* DIVISION and MODULUS. Yech.
- *
- * Convert
- * OP x,y,result
- * to
- * mov x,R16 # if x != R16
- * mov y,R17 # if y != R17
- * lda AT,__OP
- * jsr AT,(AT),0
- * mov R0,result
- *
- * with appropriate optimizations if R0,R16,R17 are the registers
- * specified by the compiler.
- */
-
- int xr, yr, rr;
- symbolS *sym;
- expressionS newtok[3];
+ char *name;
+ char name_end;
+ long val;
+ register char *p;
+ expressionS exp;
+ symbolS *entry_sym;
+ fixS *fixp;
+ segment_info_type *seginfo = seg_info (alpha_link_section);
-#ifdef RELOC_OP_P
- if (ntok && USER_RELOC_P (tok[ntok - 1].X_op))
+ if (now_seg != alpha_link_section)
{
- const expressionS *reloc_exp = &tok[ntok - 1];
- const struct alpha_reloc_op_tag *r = ALPHA_RELOC_TABLE (reloc_exp->X_op);
- as_bad (_("Cannot use !%s!%d with %s"), r->name,
- (int) reloc_exp->X_add_number, (char char *) symname);
- ntok--;
+ as_bad (_(".pdesc directive not in link (.link) section"));
+ demand_empty_rest_of_line ();
+ return;
}
-#endif
-
- xr = regno (tok[0].X_add_number);
- yr = regno (tok[1].X_add_number);
-
- if (ntok < 3)
- rr = xr;
- else
- rr = regno (tok[2].X_add_number);
- /* Move the operands into the right place */
- if (yr == AXP_REG_R16 && xr == AXP_REG_R17)
+ if ((alpha_evax_proc.symbol == 0)
+ || (!S_IS_DEFINED (alpha_evax_proc.symbol)))
{
- /* They are in exactly the wrong order -- swap through AT */
-
- if (alpha_noat_on)
- as_bad (_("macro requires $at register while noat in effect"));
-
- set_tok_reg (newtok[0], AXP_REG_R16);
- set_tok_reg (newtok[1], AXP_REG_AT);
- assemble_tokens ("mov", newtok, 2, 1);
-
- set_tok_reg (newtok[0], AXP_REG_R17);
- set_tok_reg (newtok[1], AXP_REG_R16);
- assemble_tokens ("mov", newtok, 2, 1);
-
- set_tok_reg (newtok[0], AXP_REG_AT);
- set_tok_reg (newtok[1], AXP_REG_R17);
- assemble_tokens ("mov", newtok, 2, 1);
+ as_fatal (_(".pdesc has no matching .ent"));
+ demand_empty_rest_of_line ();
+ return;
}
- else
- {
- if (yr == AXP_REG_R16)
- {
- set_tok_reg (newtok[0], AXP_REG_R16);
- set_tok_reg (newtok[1], AXP_REG_R17);
- assemble_tokens ("mov", newtok, 2, 1);
- }
- if (xr != AXP_REG_R16)
- {
- set_tok_reg (newtok[0], xr);
- set_tok_reg (newtok[1], AXP_REG_R16);
- assemble_tokens ("mov", newtok, 2, 1);
- }
+ *symbol_get_obj (alpha_evax_proc.symbol) =
+ (valueT) seginfo->literal_pool_size;
- if (yr != AXP_REG_R16 && yr != AXP_REG_R17)
- {
- set_tok_reg (newtok[0], yr);
- set_tok_reg (newtok[1], AXP_REG_R17);
- assemble_tokens ("mov", newtok, 2, 1);
- }
+ expression (&exp);
+ if (exp.X_op != O_symbol)
+ {
+ as_warn (_(".pdesc directive has no entry symbol"));
+ demand_empty_rest_of_line ();
+ return;
}
- sym = symbol_find_or_make ((const char *) symname);
-
- set_tok_reg (newtok[0], AXP_REG_AT);
- set_tok_sym (newtok[1], sym, 0);
- assemble_tokens ("lda", newtok, 2, 1);
-
- /* Call the division routine */
- set_tok_reg (newtok[0], AXP_REG_AT);
- set_tok_cpreg (newtok[1], AXP_REG_AT);
- set_tok_const (newtok[2], 0);
- assemble_tokens ("jsr", newtok, 3, 1);
+ entry_sym = make_expr_symbol (&exp);
+ /* Save bfd symbol of proc desc in function symbol. */
+ symbol_get_bfdsym (alpha_evax_proc.symbol)->udata.p
+ = symbol_get_bfdsym (entry_sym);
- /* Move the result to the right place */
- if (rr != AXP_REG_R0)
+ SKIP_WHITESPACE ();
+ if (*input_line_pointer++ != ',')
{
- set_tok_reg (newtok[0], AXP_REG_R0);
- set_tok_reg (newtok[1], rr);
- assemble_tokens ("mov", newtok, 2, 1);
+ as_warn (_("No comma after .pdesc <entryname>"));
+ demand_empty_rest_of_line ();
+ return;
}
-}
-#else /* !OBJ_EVAX */
+ SKIP_WHITESPACE ();
+ name = input_line_pointer;
+ name_end = get_symbol_end ();
-static void
-emit_division (tok, ntok, symname)
- const expressionS *tok;
- int ntok;
- const PTR symname;
-{
- /* DIVISION and MODULUS. Yech.
- * Convert
- * OP x,y,result
- * to
- * lda pv,__OP
- * mov x,t10
- * mov y,t11
- * jsr t9,(pv),__OP
- * mov t12,result
- *
- * with appropriate optimizations if t10,t11,t12 are the registers
- * specified by the compiler.
- */
+ if (strncmp (name, "stack", 5) == 0)
+ alpha_evax_proc.pdsckind = PDSC_S_K_KIND_FP_STACK;
- int xr, yr, rr;
- symbolS *sym;
- expressionS newtok[3];
+ else if (strncmp (name, "reg", 3) == 0)
+ alpha_evax_proc.pdsckind = PDSC_S_K_KIND_FP_REGISTER;
-#ifdef RELOC_OP_P
- if (ntok && USER_RELOC_P (tok[ntok - 1].X_op))
+ else if (strncmp (name, "null", 4) == 0)
+ alpha_evax_proc.pdsckind = PDSC_S_K_KIND_NULL;
+
+ else
{
- const expressionS *reloc_exp = &tok[ntok - 1];
- const struct alpha_reloc_op_tag *r = ALPHA_RELOC_TABLE (reloc_exp->X_op);
- as_bad (_("Cannot use !%s!%d with %s"), r->name,
- (int) reloc_exp->X_add_number, (const char *) symname);
- ntok--;
+ as_fatal (_("unknown procedure kind"));
+ demand_empty_rest_of_line ();
+ return;
}
-#endif
- xr = regno (tok[0].X_add_number);
- yr = regno (tok[1].X_add_number);
+ *input_line_pointer = name_end;
+ demand_empty_rest_of_line ();
- if (ntok < 3)
- rr = xr;
- else
- rr = regno (tok[2].X_add_number);
+#ifdef md_flush_pending_output
+ md_flush_pending_output ();
+#endif
- sym = symbol_find_or_make ((const char *) symname);
+ frag_align (3, 0, 0);
+ p = frag_more (16);
+ fixp = fix_new (frag_now, p - frag_now->fr_literal, 8, 0, 0, 0, 0);
+ fixp->fx_done = 1;
+ seginfo->literal_pool_size += 16;
- /* Move the operands into the right place */
- if (yr == AXP_REG_T10 && xr == AXP_REG_T11)
+ *p = alpha_evax_proc.pdsckind
+ | ((alpha_evax_proc.framereg == 29) ? PDSC_S_M_BASE_REG_IS_FP : 0);
+ *(p + 1) = PDSC_S_M_NATIVE | PDSC_S_M_NO_JACKET;
+
+ switch (alpha_evax_proc.pdsckind)
{
- /* They are in exactly the wrong order -- swap through AT */
+ case PDSC_S_K_KIND_NULL:
+ *(p + 2) = 0;
+ *(p + 3) = 0;
+ break;
+ case PDSC_S_K_KIND_FP_REGISTER:
+ *(p + 2) = alpha_evax_proc.fp_save;
+ *(p + 3) = alpha_evax_proc.ra_save;
+ break;
+ case PDSC_S_K_KIND_FP_STACK:
+ md_number_to_chars (p + 2, (valueT) alpha_evax_proc.rsa_offset, 2);
+ break;
+ default: /* impossible */
+ break;
+ }
- if (alpha_noat_on)
- as_bad (_("macro requires $at register while noat in effect"));
+ *(p + 4) = 0;
+ *(p + 5) = alpha_evax_proc.type & 0x0f;
- set_tok_reg (newtok[0], AXP_REG_T10);
- set_tok_reg (newtok[1], AXP_REG_AT);
- assemble_tokens ("mov", newtok, 2, 1);
+ /* Signature offset. */
+ md_number_to_chars (p + 6, (valueT) 0, 2);
- set_tok_reg (newtok[0], AXP_REG_T11);
- set_tok_reg (newtok[1], AXP_REG_T10);
- assemble_tokens ("mov", newtok, 2, 1);
+ fix_new_exp (frag_now, p - frag_now->fr_literal+8, 8, &exp, 0, BFD_RELOC_64);
- set_tok_reg (newtok[0], AXP_REG_AT);
- set_tok_reg (newtok[1], AXP_REG_T11);
- assemble_tokens ("mov", newtok, 2, 1);
- }
- else
- {
- if (yr == AXP_REG_T10)
- {
- set_tok_reg (newtok[0], AXP_REG_T10);
- set_tok_reg (newtok[1], AXP_REG_T11);
- assemble_tokens ("mov", newtok, 2, 1);
- }
+ if (alpha_evax_proc.pdsckind == PDSC_S_K_KIND_NULL)
+ return;
- if (xr != AXP_REG_T10)
- {
- set_tok_reg (newtok[0], xr);
- set_tok_reg (newtok[1], AXP_REG_T10);
- assemble_tokens ("mov", newtok, 2, 1);
- }
+ /* Add dummy fix to make add_to_link_pool work. */
+ p = frag_more (8);
+ fixp = fix_new (frag_now, p - frag_now->fr_literal, 8, 0, 0, 0, 0);
+ fixp->fx_done = 1;
+ seginfo->literal_pool_size += 8;
- if (yr != AXP_REG_T10 && yr != AXP_REG_T11)
- {
- set_tok_reg (newtok[0], yr);
- set_tok_reg (newtok[1], AXP_REG_T11);
- assemble_tokens ("mov", newtok, 2, 1);
- }
- }
+ /* pdesc+16: Size. */
+ md_number_to_chars (p, (valueT) alpha_evax_proc.framesize, 4);
- /* Call the division routine */
- set_tok_reg (newtok[0], AXP_REG_T9);
- set_tok_sym (newtok[1], sym, 0);
- assemble_tokens ("jsr", newtok, 2, 1);
+ md_number_to_chars (p + 4, (valueT) 0, 2);
- /* Reload the GP register */
-#ifdef OBJ_AOUT
-FIXME
-#endif
-#if defined(OBJ_ECOFF) || defined(OBJ_ELF)
- set_tok_reg (newtok[0], alpha_gp_register);
- set_tok_const (newtok[1], 0);
- set_tok_preg (newtok[2], AXP_REG_T9);
- assemble_tokens ("ldgp", newtok, 3, 1);
-#endif
+ /* Entry length. */
+ md_number_to_chars (p + 6, alpha_evax_proc.prologue, 2);
- /* Move the result to the right place */
- if (rr != AXP_REG_T12)
- {
- set_tok_reg (newtok[0], AXP_REG_T12);
- set_tok_reg (newtok[1], rr);
- assemble_tokens ("mov", newtok, 2, 1);
- }
-}
+ if (alpha_evax_proc.pdsckind == PDSC_S_K_KIND_FP_REGISTER)
+ return;
-#endif /* !OBJ_EVAX */
+ /* Add dummy fix to make add_to_link_pool work. */
+ p = frag_more (8);
+ fixp = fix_new (frag_now, p - frag_now->fr_literal, 8, 0, 0, 0, 0);
+ fixp->fx_done = 1;
+ seginfo->literal_pool_size += 8;
-/* The jsr and jmp macros differ from their instruction counterparts
- in that they can load the target address and default most
- everything. */
+ /* pdesc+24: register masks. */
+
+ md_number_to_chars (p, alpha_evax_proc.imask, 4);
+ md_number_to_chars (p + 4, alpha_evax_proc.fmask, 4);
+}
+
+/* Support for crash debug on vms. */
static void
-emit_jsrjmp (tok, ntok, vopname)
- const expressionS *tok;
- int ntok;
- const PTR vopname;
+s_alpha_name (int ignore ATTRIBUTE_UNUSED)
{
- const char *opname = (const char *) vopname;
- struct alpha_insn insn;
- expressionS newtok[3];
- int r, tokidx = 0, lituse = 0;
+ char *p;
+ expressionS exp;
+ segment_info_type *seginfo = seg_info (alpha_link_section);
-#ifdef RELOC_OP_P
- if (ntok && USER_RELOC_P (tok[ntok - 1].X_op))
+ if (now_seg != alpha_link_section)
{
- const expressionS *reloc_exp = &tok[ntok - 1];
- const struct alpha_reloc_op_tag *r = ALPHA_RELOC_TABLE (reloc_exp->X_op);
- as_bad (_("Cannot use !%s!%d with %s"), r->name,
- (int) reloc_exp->X_add_number, opname);
- ntok--;
+ as_bad (_(".name directive not in link (.link) section"));
+ demand_empty_rest_of_line ();
+ return;
}
-#endif
-
- if (tokidx < ntok && tok[tokidx].X_op == O_register)
- r = regno (tok[tokidx++].X_add_number);
- else
- r = strcmp (opname, "jmp") == 0 ? AXP_REG_ZERO : AXP_REG_RA;
-
- set_tok_reg (newtok[0], r);
- if (tokidx < ntok &&
- (tok[tokidx].X_op == O_pregister || tok[tokidx].X_op == O_cpregister))
- r = regno (tok[tokidx++].X_add_number);
-#ifdef OBJ_EVAX
- /* keep register if jsr $n.<sym> */
-#else
- else
+ expression (&exp);
+ if (exp.X_op != O_symbol)
{
- int basereg = alpha_gp_register;
- lituse = load_expression (r = AXP_REG_PV, &tok[tokidx], &basereg, NULL,
- (const expressionS *) 0);
+ as_warn (_(".name directive has no symbol"));
+ demand_empty_rest_of_line ();
+ return;
}
-#endif
- set_tok_cpreg (newtok[1], r);
+ demand_empty_rest_of_line ();
-#ifdef OBJ_EVAX
- /* FIXME: Add hint relocs to BFD for evax. */
-#else
- if (tokidx < ntok)
- newtok[2] = tok[tokidx];
- else
+#ifdef md_flush_pending_output
+ md_flush_pending_output ();
#endif
- set_tok_const (newtok[2], 0);
-
- assemble_tokens_to_insn (opname, newtok, 3, &insn);
- /* add the LITUSE fixup */
- if (lituse)
- {
- assert (insn.nfixups < MAX_INSN_FIXUPS);
- if (insn.nfixups > 0)
- {
- memmove (&insn.fixups[1], &insn.fixups[0],
- sizeof (struct alpha_fixup) * insn.nfixups);
- }
- insn.nfixups++;
- insn.fixups[0].reloc = BFD_RELOC_ALPHA_LITUSE;
- insn.fixups[0].exp.X_op = O_symbol;
- insn.fixups[0].exp.X_add_symbol = section_symbol (now_seg);
- insn.fixups[0].exp.X_add_number = LITUSE_JSR;
- }
+ frag_align (3, 0, 0);
+ p = frag_more (8);
+ seginfo->literal_pool_size += 8;
- emit_insn (&insn);
+ fix_new_exp (frag_now, p - frag_now->fr_literal, 8, &exp, 0, BFD_RELOC_64);
}
-/* The ret and jcr instructions differ from their instruction
- counterparts in that everything can be defaulted. */
-
static void
-emit_retjcr (tok, ntok, vopname)
- const expressionS *tok;
- int ntok;
- const PTR vopname;
+s_alpha_linkage (int ignore ATTRIBUTE_UNUSED)
{
- const char *opname = (const char *) vopname;
- expressionS newtok[3];
- int r, tokidx = 0;
+ expressionS exp;
+ char *p;
-#ifdef RELOC_OP_P
- if (ntok && USER_RELOC_P (tok[ntok - 1].X_op))
- {
- const expressionS *reloc_exp = &tok[ntok - 1];
- const struct alpha_reloc_op_tag *r = ALPHA_RELOC_TABLE (reloc_exp->X_op);
- as_bad (_("Cannot use !%s!%d with %s"), r->name,
- (int) reloc_exp->X_add_number, opname);
- ntok--;
- }
+#ifdef md_flush_pending_output
+ md_flush_pending_output ();
#endif
- if (tokidx < ntok && tok[tokidx].X_op == O_register)
- r = regno (tok[tokidx++].X_add_number);
+ expression (&exp);
+ if (exp.X_op != O_symbol)
+ {
+ as_fatal (_("No symbol after .linkage"));
+ }
else
- r = AXP_REG_ZERO;
-
- set_tok_reg (newtok[0], r);
+ {
+ p = frag_more (LKP_S_K_SIZE);
+ memset (p, 0, LKP_S_K_SIZE);
+ fix_new_exp (frag_now, p - frag_now->fr_literal, LKP_S_K_SIZE, &exp, 0,\
+ BFD_RELOC_ALPHA_LINKAGE);
+ }
+ demand_empty_rest_of_line ();
+}
- if (tokidx < ntok &&
- (tok[tokidx].X_op == O_pregister || tok[tokidx].X_op == O_cpregister))
- r = regno (tok[tokidx++].X_add_number);
- else
- r = AXP_REG_RA;
+static void
+s_alpha_code_address (int ignore ATTRIBUTE_UNUSED)
+{
+ expressionS exp;
+ char *p;
- set_tok_cpreg (newtok[1], r);
+#ifdef md_flush_pending_output
+ md_flush_pending_output ();
+#endif
- if (tokidx < ntok)
- newtok[2] = tok[tokidx];
+ expression (&exp);
+ if (exp.X_op != O_symbol)
+ as_fatal (_("No symbol after .code_address"));
else
- set_tok_const (newtok[2], strcmp (opname, "ret") == 0);
-
- assemble_tokens (opname, newtok, 3, 0);
+ {
+ p = frag_more (8);
+ memset (p, 0, 8);
+ fix_new_exp (frag_now, p - frag_now->fr_literal, 8, &exp, 0,\
+ BFD_RELOC_ALPHA_CODEADDR);
+ }
+ demand_empty_rest_of_line ();
}
-\f
-/* Assembler directives */
-
-/* Handle the .text pseudo-op. This is like the usual one, but it
- clears alpha_insn_label and restores auto alignment. */
static void
-s_alpha_text (i)
- int i;
-
+s_alpha_fp_save (int ignore ATTRIBUTE_UNUSED)
{
- s_text (i);
- alpha_insn_label = NULL;
- alpha_auto_align_on = 1;
- alpha_current_align = 0;
-}
-/* Handle the .data pseudo-op. This is like the usual one, but it
- clears alpha_insn_label and restores auto alignment. */
+ alpha_evax_proc.fp_save = tc_get_register (1);
-static void
-s_alpha_data (i)
- int i;
-{
- s_data (i);
- alpha_insn_label = NULL;
- alpha_auto_align_on = 1;
- alpha_current_align = 0;
+ demand_empty_rest_of_line ();
}
-#if defined (OBJ_ECOFF) || defined (OBJ_EVAX)
-
-/* Handle the OSF/1 and openVMS .comm pseudo quirks.
- openVMS constructs a section for every common symbol. */
-
static void
-s_alpha_comm (ignore)
- int ignore;
+s_alpha_mask (int ignore ATTRIBUTE_UNUSED)
{
- register char *name;
- register char c;
- register char *p;
- offsetT temp;
- register symbolS *symbolP;
-
-#ifdef OBJ_EVAX
- segT current_section = now_seg;
- int current_subsec = now_subseg;
- segT new_seg;
-#endif
-
- name = input_line_pointer;
- c = get_symbol_end ();
-
- /* just after name is now '\0' */
- p = input_line_pointer;
- *p = c;
-
- SKIP_WHITESPACE ();
+ long val;
- /* Alpha OSF/1 compiler doesn't provide the comma, gcc does. */
- if (*input_line_pointer == ',')
- {
- input_line_pointer++;
- SKIP_WHITESPACE ();
- }
- if ((temp = get_absolute_expression ()) < 0)
+ if (get_absolute_expression_and_terminator (&val) != ',')
{
- as_warn (_(".COMMon length (%ld.) <0! Ignored."), (long) temp);
- ignore_rest_of_line ();
- return;
+ as_warn (_("Bad .mask directive"));
+ --input_line_pointer;
}
-
- *p = 0;
- symbolP = symbol_find_or_make (name);
-
-#ifdef OBJ_EVAX
- /* Make a section for the common symbol. */
- new_seg = subseg_new (xstrdup (name), 0);
-#endif
-
- *p = c;
-
-#ifdef OBJ_EVAX
- /* alignment might follow */
- if (*input_line_pointer == ',')
+ else
{
- offsetT align;
-
- input_line_pointer++;
- align = get_absolute_expression ();
- bfd_set_section_alignment (stdoutput, new_seg, align);
+ alpha_evax_proc.imask = val;
+ (void) get_absolute_expression ();
}
-#endif
+ demand_empty_rest_of_line ();
+}
- if (S_IS_DEFINED (symbolP) && ! S_IS_COMMON (symbolP))
- {
- as_bad (_("Ignoring attempt to re-define symbol"));
- ignore_rest_of_line ();
- return;
- }
+static void
+s_alpha_fmask (int ignore ATTRIBUTE_UNUSED)
+{
+ long val;
-#ifdef OBJ_EVAX
- if (bfd_section_size (stdoutput, new_seg) > 0)
- {
- if (bfd_section_size (stdoutput, new_seg) != temp)
- as_bad (_("Length of .comm \"%s\" is already %ld. Not changed to %ld."),
- S_GET_NAME (symbolP),
- (long) bfd_section_size (stdoutput, new_seg),
- (long) temp);
- }
-#else
- if (S_GET_VALUE (symbolP))
+ if (get_absolute_expression_and_terminator (&val) != ',')
{
- if (S_GET_VALUE (symbolP) != (valueT) temp)
- as_bad (_("Length of .comm \"%s\" is already %ld. Not changed to %ld."),
- S_GET_NAME (symbolP),
- (long) S_GET_VALUE (symbolP),
- (long) temp);
+ as_warn (_("Bad .fmask directive"));
+ --input_line_pointer;
}
-#endif
else
{
-#ifdef OBJ_EVAX
- subseg_set (new_seg, 0);
- p = frag_more (temp);
- new_seg->flags |= SEC_IS_COMMON;
- if (! S_IS_DEFINED (symbolP))
- S_SET_SEGMENT (symbolP, new_seg);
-#else
- S_SET_VALUE (symbolP, (valueT) temp);
-#endif
- S_SET_EXTERNAL (symbolP);
+ alpha_evax_proc.fmask = val;
+ (void) get_absolute_expression ();
}
-
-#ifdef OBJ_EVAX
- subseg_set (current_section, current_subsec);
-#endif
-
- know (symbol_get_frag (symbolP) == &zero_address_frag);
-
demand_empty_rest_of_line ();
}
-#endif /* ! OBJ_ELF */
-
-#ifdef OBJ_ECOFF
-
-/* Handle the .rdata pseudo-op. This is like the usual one, but it
- clears alpha_insn_label and restores auto alignment. */
-
static void
-s_alpha_rdata (ignore)
- int ignore;
+s_alpha_end (int ignore ATTRIBUTE_UNUSED)
{
- int temp;
+ char c;
- temp = get_absolute_expression ();
- subseg_new (".rdata", 0);
+ c = get_symbol_end ();
+ *input_line_pointer = c;
demand_empty_rest_of_line ();
- alpha_insn_label = NULL;
- alpha_auto_align_on = 1;
- alpha_current_align = 0;
+ alpha_evax_proc.symbol = 0;
}
-#endif
-
-#ifdef OBJ_ECOFF
-
-/* Handle the .sdata pseudo-op. This is like the usual one, but it
- clears alpha_insn_label and restores auto alignment. */
-
static void
-s_alpha_sdata (ignore)
- int ignore;
+s_alpha_file (int ignore ATTRIBUTE_UNUSED)
{
- int temp;
+ symbolS *s;
+ int length;
+ static char case_hack[32];
- temp = get_absolute_expression ();
- subseg_new (".sdata", 0);
+ sprintf (case_hack, "<CASE:%01d%01d>",
+ alpha_flag_hash_long_names, alpha_flag_show_after_trunc);
+
+ s = symbol_find_or_make (case_hack);
+ symbol_get_bfdsym (s)->flags |= BSF_FILE;
+
+ get_absolute_expression ();
+ s = symbol_find_or_make (demand_copy_string (&length));
+ symbol_get_bfdsym (s)->flags |= BSF_FILE;
demand_empty_rest_of_line ();
- alpha_insn_label = NULL;
- alpha_auto_align_on = 1;
- alpha_current_align = 0;
}
-#endif
-
-#ifdef OBJ_ELF
+#endif /* OBJ_EVAX */
-/* Handle the .section pseudo-op. This is like the usual one, but it
- clears alpha_insn_label and restores auto alignment. */
+/* Handle the .gprel32 pseudo op. */
static void
-s_alpha_section (ignore)
- int ignore;
+s_alpha_gprel32 (int ignore ATTRIBUTE_UNUSED)
{
- obj_elf_section (ignore);
+ expressionS e;
+ char *p;
+
+ SKIP_WHITESPACE ();
+ expression (&e);
+
+#ifdef OBJ_ELF
+ switch (e.X_op)
+ {
+ case O_constant:
+ e.X_add_symbol = section_symbol (absolute_section);
+ e.X_op = O_symbol;
+ /* FALLTHRU */
+ case O_symbol:
+ break;
+ default:
+ abort ();
+ }
+#else
+#ifdef OBJ_ECOFF
+ switch (e.X_op)
+ {
+ case O_constant:
+ e.X_add_symbol = section_symbol (absolute_section);
+ /* fall through */
+ case O_symbol:
+ e.X_op = O_subtract;
+ e.X_op_symbol = alpha_gp_symbol;
+ break;
+ default:
+ abort ();
+ }
+#endif
+#endif
+ if (alpha_auto_align_on && alpha_current_align < 2)
+ alpha_align (2, (char *) NULL, alpha_insn_label, 0);
+ if (alpha_current_align > 2)
+ alpha_current_align = 2;
alpha_insn_label = NULL;
- alpha_auto_align_on = 1;
- alpha_current_align = 0;
+
+ p = frag_more (4);
+ memset (p, 0, 4);
+ fix_new_exp (frag_now, p - frag_now->fr_literal, 4,
+ &e, 0, BFD_RELOC_GPREL32);
}
+/* Handle floating point allocation pseudo-ops. This is like the
+ generic vresion, but it makes sure the current label, if any, is
+ correctly aligned. */
+
static void
-s_alpha_ent (dummy)
- int dummy ATTRIBUTE_UNUSED;
+s_alpha_float_cons (int type)
{
- if (ECOFF_DEBUGGING)
- ecoff_directive_ent (0);
- else
+ int log_size;
+
+ switch (type)
{
- char *name, name_end;
- name = input_line_pointer;
- name_end = get_symbol_end ();
+ default:
+ case 'f':
+ case 'F':
+ log_size = 2;
+ break;
- if (! is_name_beginner (*name))
- {
- as_warn (_(".ent directive has no name"));
- *input_line_pointer = name_end;
- }
- else
- {
- symbolS *sym;
+ case 'd':
+ case 'D':
+ case 'G':
+ log_size = 3;
+ break;
- if (alpha_cur_ent_sym)
- as_warn (_("nested .ent directives"));
+ case 'x':
+ case 'X':
+ case 'p':
+ case 'P':
+ log_size = 4;
+ break;
+ }
- sym = symbol_find_or_make (name);
- symbol_get_bfdsym (sym)->flags |= BSF_FUNCTION;
- alpha_cur_ent_sym = sym;
+ if (alpha_auto_align_on && alpha_current_align < log_size)
+ alpha_align (log_size, (char *) NULL, alpha_insn_label, 0);
+ if (alpha_current_align > log_size)
+ alpha_current_align = log_size;
+ alpha_insn_label = NULL;
- /* The .ent directive is sometimes followed by a number. Not sure
- what it really means, but ignore it. */
- *input_line_pointer = name_end;
- SKIP_WHITESPACE ();
- if (*input_line_pointer == ',')
- {
- input_line_pointer++;
- SKIP_WHITESPACE ();
- }
- if (isdigit (*input_line_pointer) || *input_line_pointer == '-')
- (void) get_absolute_expression ();
- }
- demand_empty_rest_of_line ();
- }
+ float_cons (type);
}
+/* Handle the .proc pseudo op. We don't really do much with it except
+ parse it. */
+
static void
-s_alpha_end (dummy)
- int dummy ATTRIBUTE_UNUSED;
+s_alpha_proc (int is_static ATTRIBUTE_UNUSED)
{
- if (ECOFF_DEBUGGING)
- ecoff_directive_end (0);
+ char *name;
+ char c;
+ char *p;
+ symbolS *symbolP;
+ int temp;
+
+ /* Takes ".proc name,nargs". */
+ SKIP_WHITESPACE ();
+ name = input_line_pointer;
+ c = get_symbol_end ();
+ p = input_line_pointer;
+ symbolP = symbol_find_or_make (name);
+ *p = c;
+ SKIP_WHITESPACE ();
+ if (*input_line_pointer != ',')
+ {
+ *p = 0;
+ as_warn (_("Expected comma after name \"%s\""), name);
+ *p = c;
+ temp = 0;
+ ignore_rest_of_line ();
+ }
else
{
- char *name, name_end;
- name = input_line_pointer;
- name_end = get_symbol_end ();
-
- if (! is_name_beginner (*name))
- {
- as_warn (_(".end directive has no name"));
- *input_line_pointer = name_end;
- }
- else
- {
- symbolS *sym;
-
- sym = symbol_find (name);
- if (sym != alpha_cur_ent_sym)
- as_warn (_(".end directive names different symbol than .ent"));
-
- /* Create an expression to calculate the size of the function. */
- if (sym)
- {
- symbol_get_obj (sym)->size =
- (expressionS *) xmalloc (sizeof (expressionS));
- symbol_get_obj (sym)->size->X_op = O_subtract;
- symbol_get_obj (sym)->size->X_add_symbol
- = symbol_new ("L0\001", now_seg, frag_now_fix (), frag_now);
- symbol_get_obj (sym)->size->X_op_symbol = sym;
- symbol_get_obj (sym)->size->X_add_number = 0;
- }
-
- alpha_cur_ent_sym = NULL;
-
- *input_line_pointer = name_end;
- }
- demand_empty_rest_of_line ();
+ input_line_pointer++;
+ temp = get_absolute_expression ();
}
+ /* *symbol_get_obj (symbolP) = (signed char) temp; */
+ as_warn (_("unhandled: .proc %s,%d"), name, temp);
+ demand_empty_rest_of_line ();
}
+/* Handle the .set pseudo op. This is used to turn on and off most of
+ the assembler features. */
+
static void
-s_alpha_mask (fp)
- int fp;
+s_alpha_set (int x ATTRIBUTE_UNUSED)
{
- if (ECOFF_DEBUGGING)
+ char *name, ch, *s;
+ int yesno = 1;
+
+ SKIP_WHITESPACE ();
+ name = input_line_pointer;
+ ch = get_symbol_end ();
+
+ s = name;
+ if (s[0] == 'n' && s[1] == 'o')
{
- if (fp)
- ecoff_directive_fmask (0);
- else
- ecoff_directive_mask (0);
+ yesno = 0;
+ s += 2;
}
+ if (!strcmp ("reorder", s))
+ /* ignore */ ;
+ else if (!strcmp ("at", s))
+ alpha_noat_on = !yesno;
+ else if (!strcmp ("macro", s))
+ alpha_macros_on = yesno;
+ else if (!strcmp ("move", s))
+ /* ignore */ ;
+ else if (!strcmp ("volatile", s))
+ /* ignore */ ;
else
- discard_rest_of_line ();
-}
+ as_warn (_("Tried to .set unrecognized mode `%s'"), name);
-static void
-s_alpha_frame (dummy)
- int dummy ATTRIBUTE_UNUSED;
-{
- if (ECOFF_DEBUGGING)
- ecoff_directive_frame (0);
- else
- discard_rest_of_line ();
+ *input_line_pointer = ch;
+ demand_empty_rest_of_line ();
}
+/* Handle the .base pseudo op. This changes the assembler's notion of
+ the $gp register. */
+
static void
-s_alpha_prologue (ignore)
- int ignore ATTRIBUTE_UNUSED;
+s_alpha_base (int ignore ATTRIBUTE_UNUSED)
{
- symbolS *sym;
- int arg;
-
- arg = get_absolute_expression ();
- demand_empty_rest_of_line ();
-
- if (ECOFF_DEBUGGING)
- sym = ecoff_get_cur_proc_sym ();
- else
- sym = alpha_cur_ent_sym;
- know (sym != NULL);
+ SKIP_WHITESPACE ();
- switch (arg)
+ if (*input_line_pointer == '$')
{
- case 0: /* No PV required. */
- S_SET_OTHER (sym, STO_ALPHA_NOPV
- | (S_GET_OTHER (sym) & ~STO_ALPHA_STD_GPLOAD));
- break;
- case 1: /* Std GP load. */
- S_SET_OTHER (sym, STO_ALPHA_STD_GPLOAD
- | (S_GET_OTHER (sym) & ~STO_ALPHA_STD_GPLOAD));
- break;
- case 2: /* Non-std use of PV. */
- break;
+ /* $rNN form. */
+ input_line_pointer++;
+ if (*input_line_pointer == 'r')
+ input_line_pointer++;
+ }
- default:
- as_bad (_("Invalid argument %d to .prologue."), arg);
- break;
+ alpha_gp_register = get_absolute_expression ();
+ if (alpha_gp_register < 0 || alpha_gp_register > 31)
+ {
+ alpha_gp_register = AXP_REG_GP;
+ as_warn (_("Bad base register, using $%d."), alpha_gp_register);
}
+
+ demand_empty_rest_of_line ();
}
-static char *first_file_directive;
+/* Handle the .align pseudo-op. This aligns to a power of two. It
+ also adjusts any current instruction label. We treat this the same
+ way the MIPS port does: .align 0 turns off auto alignment. */
static void
-s_alpha_file (ignore)
- int ignore ATTRIBUTE_UNUSED;
+s_alpha_align (int ignore ATTRIBUTE_UNUSED)
{
- /* Save the first .file directive we see, so that we can change our
- minds about whether ecoff debugging should or shouldn't be enabled. */
- if (alpha_flag_mdebug < 0 && ! first_file_directive)
- {
- char *start = input_line_pointer;
- size_t len;
-
- discard_rest_of_line ();
+ int align;
+ char fill, *pfill;
+ long max_alignment = 15;
- len = input_line_pointer - start;
- first_file_directive = xmalloc (len + 1);
- memcpy (first_file_directive, start, len);
- first_file_directive[len] = '\0';
+ align = get_absolute_expression ();
+ if (align > max_alignment)
+ {
+ align = max_alignment;
+ as_bad (_("Alignment too large: %d. assumed"), align);
+ }
+ else if (align < 0)
+ {
+ as_warn (_("Alignment negative: 0 assumed"));
+ align = 0;
+ }
- input_line_pointer = start;
+ if (*input_line_pointer == ',')
+ {
+ input_line_pointer++;
+ fill = get_absolute_expression ();
+ pfill = &fill;
}
+ else
+ pfill = NULL;
- if (ECOFF_DEBUGGING)
- ecoff_directive_file (0);
+ if (align != 0)
+ {
+ alpha_auto_align_on = 1;
+ alpha_align (align, pfill, alpha_insn_label, 1);
+ }
else
- dwarf2_directive_file (0);
+ {
+ alpha_auto_align_on = 0;
+ }
+
+ demand_empty_rest_of_line ();
}
+/* Hook the normal string processor to reset known alignment. */
+
static void
-s_alpha_loc (ignore)
- int ignore ATTRIBUTE_UNUSED;
+s_alpha_stringer (int terminate)
{
- if (ECOFF_DEBUGGING)
- ecoff_directive_loc (0);
- else
- dwarf2_directive_loc (0);
+ alpha_current_align = 0;
+ alpha_insn_label = NULL;
+ stringer (terminate);
}
+/* Hook the normal space processing to reset known alignment. */
+
static void
-s_alpha_stab (n)
- int n;
+s_alpha_space (int ignore)
{
- /* If we've been undecided about mdebug, make up our minds in favour. */
- if (alpha_flag_mdebug < 0)
- {
- segT sec = subseg_new (".mdebug", 0);
- bfd_set_section_flags (stdoutput, sec, SEC_HAS_CONTENTS | SEC_READONLY);
- bfd_set_section_alignment (stdoutput, sec, 3);
+ alpha_current_align = 0;
+ alpha_insn_label = NULL;
+ s_space (ignore);
+}
- ecoff_read_begin_hook ();
+/* Hook into cons for auto-alignment. */
- if (first_file_directive)
- {
- char *save_ilp = input_line_pointer;
- input_line_pointer = first_file_directive;
- ecoff_directive_file (0);
- input_line_pointer = save_ilp;
- free (first_file_directive);
- }
+void
+alpha_cons_align (int size)
+{
+ int log_size;
- alpha_flag_mdebug = 1;
- }
- s_stab (n);
+ log_size = 0;
+ while ((size >>= 1) != 0)
+ ++log_size;
+
+ if (alpha_auto_align_on && alpha_current_align < log_size)
+ alpha_align (log_size, (char *) NULL, alpha_insn_label, 0);
+ if (alpha_current_align > log_size)
+ alpha_current_align = log_size;
+ alpha_insn_label = NULL;
}
+/* Here come the .uword, .ulong, and .uquad explicitly unaligned
+ pseudos. We just turn off auto-alignment and call down to cons. */
+
static void
-s_alpha_coff_wrapper (which)
- int which;
+s_alpha_ucons (int bytes)
{
- static void (* const fns[]) PARAMS ((int)) = {
- ecoff_directive_begin,
- ecoff_directive_bend,
- ecoff_directive_def,
- ecoff_directive_dim,
- ecoff_directive_endef,
- ecoff_directive_scl,
- ecoff_directive_tag,
- ecoff_directive_val,
- };
-
- assert (which >= 0 && which < (int) (sizeof (fns)/sizeof (*fns)));
-
- if (ECOFF_DEBUGGING)
- (*fns[which]) (0);
- else
- {
- as_bad (_("ECOFF debugging is disabled."));
- ignore_rest_of_line ();
- }
+ int hold = alpha_auto_align_on;
+ alpha_auto_align_on = 0;
+ cons (bytes);
+ alpha_auto_align_on = hold;
}
-#endif /* OBJ_ELF */
-
-#ifdef OBJ_EVAX
-/* Handle the section specific pseudo-op. */
+/* Switch the working cpu type. */
static void
-s_alpha_section (secid)
- int secid;
+s_alpha_arch (int ignored ATTRIBUTE_UNUSED)
{
- int temp;
-#define EVAX_SECTION_COUNT 5
- static char *section_name[EVAX_SECTION_COUNT + 1] =
- { "NULL", ".rdata", ".comm", ".link", ".ctors", ".dtors" };
+ char *name, ch;
+ const struct cpu_type *p;
- if ((secid <= 0) || (secid > EVAX_SECTION_COUNT))
- {
- as_fatal (_("Unknown section directive"));
- demand_empty_rest_of_line ();
- return;
- }
- temp = get_absolute_expression ();
- subseg_new (section_name[secid], 0);
+ SKIP_WHITESPACE ();
+ name = input_line_pointer;
+ ch = get_symbol_end ();
+
+ for (p = cpu_types; p->name; ++p)
+ if (strcmp (name, p->name) == 0)
+ {
+ alpha_target_name = p->name, alpha_target = p->flags;
+ goto found;
+ }
+ as_warn ("Unknown CPU identifier `%s'", name);
+
+found:
+ *input_line_pointer = ch;
demand_empty_rest_of_line ();
- alpha_insn_label = NULL;
- alpha_auto_align_on = 1;
- alpha_current_align = 0;
}
-
-/* Parse .ent directives. */
+\f
+#ifdef DEBUG1
+/* print token expression with alpha specific extension. */
static void
-s_alpha_ent (ignore)
- int ignore;
+alpha_print_token (FILE *f, const expressionS *exp)
{
- symbolS *symbol;
- expressionS symexpr;
-
- alpha_evax_proc.pdsckind = 0;
- alpha_evax_proc.framereg = -1;
- alpha_evax_proc.framesize = 0;
- alpha_evax_proc.rsa_offset = 0;
- alpha_evax_proc.ra_save = AXP_REG_RA;
- alpha_evax_proc.fp_save = -1;
- alpha_evax_proc.imask = 0;
- alpha_evax_proc.fmask = 0;
- alpha_evax_proc.prologue = 0;
- alpha_evax_proc.type = 0;
-
- expression (&symexpr);
-
- if (symexpr.X_op != O_symbol)
+ switch (exp->X_op)
{
- as_fatal (_(".ent directive has no symbol"));
- demand_empty_rest_of_line ();
- return;
+ case O_cpregister:
+ putc (',', f);
+ /* FALLTHRU */
+ case O_pregister:
+ putc ('(', f);
+ {
+ expressionS nexp = *exp;
+ nexp.X_op = O_register;
+ print_expr (f, &nexp);
+ }
+ putc (')', f);
+ break;
+ default:
+ print_expr (f, exp);
+ break;
}
+}
+#endif
+\f
+/* The target specific pseudo-ops which we support. */
- symbol = make_expr_symbol (&symexpr);
- symbol_get_bfdsym (symbol)->flags |= BSF_FUNCTION;
- alpha_evax_proc.symbol = symbol;
+const pseudo_typeS md_pseudo_table[] =
+{
+#ifdef OBJ_ECOFF
+ {"comm", s_alpha_comm, 0}, /* OSF1 compiler does this. */
+ {"rdata", s_alpha_rdata, 0},
+#endif
+ {"text", s_alpha_text, 0},
+ {"data", s_alpha_data, 0},
+#ifdef OBJ_ECOFF
+ {"sdata", s_alpha_sdata, 0},
+#endif
+#ifdef OBJ_ELF
+ {"section", s_alpha_section, 0},
+ {"section.s", s_alpha_section, 0},
+ {"sect", s_alpha_section, 0},
+ {"sect.s", s_alpha_section, 0},
+#endif
+#ifdef OBJ_EVAX
+ { "pdesc", s_alpha_pdesc, 0},
+ { "name", s_alpha_name, 0},
+ { "linkage", s_alpha_linkage, 0},
+ { "code_address", s_alpha_code_address, 0},
+ { "ent", s_alpha_ent, 0},
+ { "frame", s_alpha_frame, 0},
+ { "fp_save", s_alpha_fp_save, 0},
+ { "mask", s_alpha_mask, 0},
+ { "fmask", s_alpha_fmask, 0},
+ { "end", s_alpha_end, 0},
+ { "file", s_alpha_file, 0},
+ { "rdata", s_alpha_section, 1},
+ { "comm", s_alpha_comm, 0},
+ { "link", s_alpha_section, 3},
+ { "ctors", s_alpha_section, 4},
+ { "dtors", s_alpha_section, 5},
+#endif
+#ifdef OBJ_ELF
+ /* Frame related pseudos. */
+ {"ent", s_alpha_ent, 0},
+ {"end", s_alpha_end, 0},
+ {"mask", s_alpha_mask, 0},
+ {"fmask", s_alpha_mask, 1},
+ {"frame", s_alpha_frame, 0},
+ {"prologue", s_alpha_prologue, 0},
+ {"file", s_alpha_file, 5},
+ {"loc", s_alpha_loc, 9},
+ {"stabs", s_alpha_stab, 's'},
+ {"stabn", s_alpha_stab, 'n'},
+ {"usepv", s_alpha_usepv, 0},
+ /* COFF debugging related pseudos. */
+ {"begin", s_alpha_coff_wrapper, 0},
+ {"bend", s_alpha_coff_wrapper, 1},
+ {"def", s_alpha_coff_wrapper, 2},
+ {"dim", s_alpha_coff_wrapper, 3},
+ {"endef", s_alpha_coff_wrapper, 4},
+ {"scl", s_alpha_coff_wrapper, 5},
+ {"tag", s_alpha_coff_wrapper, 6},
+ {"val", s_alpha_coff_wrapper, 7},
+#else
+ {"prologue", s_ignore, 0},
+#endif
+ {"gprel32", s_alpha_gprel32, 0},
+ {"t_floating", s_alpha_float_cons, 'd'},
+ {"s_floating", s_alpha_float_cons, 'f'},
+ {"f_floating", s_alpha_float_cons, 'F'},
+ {"g_floating", s_alpha_float_cons, 'G'},
+ {"d_floating", s_alpha_float_cons, 'D'},
- demand_empty_rest_of_line ();
- return;
-}
+ {"proc", s_alpha_proc, 0},
+ {"aproc", s_alpha_proc, 1},
+ {"set", s_alpha_set, 0},
+ {"reguse", s_ignore, 0},
+ {"livereg", s_ignore, 0},
+ {"base", s_alpha_base, 0}, /*??*/
+ {"option", s_ignore, 0},
+ {"aent", s_ignore, 0},
+ {"ugen", s_ignore, 0},
+ {"eflag", s_ignore, 0},
-/* Parse .frame <framreg>,<framesize>,RA,<rsa_offset> directives. */
+ {"align", s_alpha_align, 0},
+ {"double", s_alpha_float_cons, 'd'},
+ {"float", s_alpha_float_cons, 'f'},
+ {"single", s_alpha_float_cons, 'f'},
+ {"ascii", s_alpha_stringer, 0},
+ {"asciz", s_alpha_stringer, 1},
+ {"string", s_alpha_stringer, 1},
+ {"space", s_alpha_space, 0},
+ {"skip", s_alpha_space, 0},
+ {"zero", s_alpha_space, 0},
-static void
-s_alpha_frame (ignore)
- int ignore;
-{
- long val;
+/* Unaligned data pseudos. */
+ {"uword", s_alpha_ucons, 2},
+ {"ulong", s_alpha_ucons, 4},
+ {"uquad", s_alpha_ucons, 8},
- alpha_evax_proc.framereg = tc_get_register (1);
+#ifdef OBJ_ELF
+/* Dwarf wants these versions of unaligned. */
+ {"2byte", s_alpha_ucons, 2},
+ {"4byte", s_alpha_ucons, 4},
+ {"8byte", s_alpha_ucons, 8},
+#endif
- SKIP_WHITESPACE ();
- if (*input_line_pointer++ != ','
- || get_absolute_expression_and_terminator (&val) != ',')
- {
- as_warn (_("Bad .frame directive 1./2. param"));
- --input_line_pointer;
- demand_empty_rest_of_line ();
- return;
- }
+/* We don't do any optimizing, so we can safely ignore these. */
+ {"noalias", s_ignore, 0},
+ {"alias", s_ignore, 0},
- alpha_evax_proc.framesize = val;
+ {"arch", s_alpha_arch, 0},
- (void) tc_get_register (1);
- SKIP_WHITESPACE ();
- if (*input_line_pointer++ != ',')
- {
- as_warn (_("Bad .frame directive 3./4. param"));
- --input_line_pointer;
- demand_empty_rest_of_line ();
- return;
- }
- alpha_evax_proc.rsa_offset = get_absolute_expression ();
+ {NULL, 0, 0},
+};
+\f
+#ifdef OBJ_ECOFF
+
+/* @@@ GP selection voodoo. All of this seems overly complicated and
+ unnecessary; which is the primary reason it's for ECOFF only. */
+static inline void maybe_set_gp PARAMS ((asection *));
+
+static inline void
+maybe_set_gp (asection *sec)
+{
+ bfd_vma vma;
- return;
+ if (!sec)
+ return;
+ vma = bfd_get_section_vma (foo, sec);
+ if (vma && vma < alpha_gp_value)
+ alpha_gp_value = vma;
}
static void
-s_alpha_pdesc (ignore)
- int ignore;
+select_gp_value (void)
{
- char *name;
- char name_end;
- long val;
- register char *p;
- expressionS exp;
- symbolS *entry_sym;
- fixS *fixp;
- segment_info_type *seginfo = seg_info (alpha_link_section);
+ assert (alpha_gp_value == 0);
- if (now_seg != alpha_link_section)
- {
- as_bad (_(".pdesc directive not in link (.link) section"));
- demand_empty_rest_of_line ();
- return;
- }
+ /* Get minus-one in whatever width... */
+ alpha_gp_value = 0;
+ alpha_gp_value--;
- if ((alpha_evax_proc.symbol == 0)
- || (!S_IS_DEFINED (alpha_evax_proc.symbol)))
- {
- as_fatal (_(".pdesc has no matching .ent"));
- demand_empty_rest_of_line ();
- return;
- }
+ /* Select the smallest VMA of these existing sections. */
+ maybe_set_gp (alpha_lita_section);
- *symbol_get_obj (alpha_evax_proc.symbol) =
- (valueT) seginfo->literal_pool_size;
+/* @@ Will a simple 0x8000 work here? If not, why not? */
+#define GP_ADJUSTMENT (0x8000 - 0x10)
- expression (&exp);
- if (exp.X_op != O_symbol)
- {
- as_warn (_(".pdesc directive has no entry symbol"));
- demand_empty_rest_of_line ();
- return;
- }
+ alpha_gp_value += GP_ADJUSTMENT;
- entry_sym = make_expr_symbol (&exp);
- /* Save bfd symbol of proc desc in function symbol. */
- symbol_get_bfdsym (alpha_evax_proc.symbol)->udata.p
- = symbol_get_bfdsym (entry_sym);
+ S_SET_VALUE (alpha_gp_symbol, alpha_gp_value);
- SKIP_WHITESPACE ();
- if (*input_line_pointer++ != ',')
- {
- as_warn (_("No comma after .pdesc <entryname>"));
- demand_empty_rest_of_line ();
- return;
- }
+#ifdef DEBUG1
+ printf (_("Chose GP value of %lx\n"), alpha_gp_value);
+#endif
+}
+#endif /* OBJ_ECOFF */
- SKIP_WHITESPACE ();
- name = input_line_pointer;
- name_end = get_symbol_end ();
+#ifdef OBJ_ELF
+/* Map 's' to SHF_ALPHA_GPREL. */
- if (strncmp (name, "stack", 5) == 0)
- {
- alpha_evax_proc.pdsckind = PDSC_S_K_KIND_FP_STACK;
- }
- else if (strncmp (name, "reg", 3) == 0)
- {
- alpha_evax_proc.pdsckind = PDSC_S_K_KIND_FP_REGISTER;
- }
- else if (strncmp (name, "null", 4) == 0)
- {
- alpha_evax_proc.pdsckind = PDSC_S_K_KIND_NULL;
- }
- else
- {
- as_fatal (_("unknown procedure kind"));
- demand_empty_rest_of_line ();
- return;
- }
+int
+alpha_elf_section_letter (int letter, char **ptr_msg)
+{
+ if (letter == 's')
+ return SHF_ALPHA_GPREL;
- *input_line_pointer = name_end;
- demand_empty_rest_of_line ();
+ *ptr_msg = _("Bad .section directive: want a,s,w,x,M,S,G,T in string");
+ return -1;
+}
-#ifdef md_flush_pending_output
- md_flush_pending_output ();
-#endif
+/* Map SHF_ALPHA_GPREL to SEC_SMALL_DATA. */
- frag_align (3, 0, 0);
- p = frag_more (16);
- fixp = fix_new (frag_now, p - frag_now->fr_literal, 8, 0, 0, 0, 0);
- fixp->fx_done = 1;
- seginfo->literal_pool_size += 16;
+flagword
+alpha_elf_section_flags (flagword flags, int attr, int type ATTRIBUTE_UNUSED)
+{
+ if (attr & SHF_ALPHA_GPREL)
+ flags |= SEC_SMALL_DATA;
+ return flags;
+}
+#endif /* OBJ_ELF */
- *p = alpha_evax_proc.pdsckind
- | ((alpha_evax_proc.framereg == 29) ? PDSC_S_M_BASE_REG_IS_FP : 0);
- *(p + 1) = PDSC_S_M_NATIVE | PDSC_S_M_NO_JACKET;
+/* This is called from HANDLE_ALIGN in write.c. Fill in the contents
+ of an rs_align_code fragment. */
- switch (alpha_evax_proc.pdsckind)
+void
+alpha_handle_align (fragS *fragp)
+{
+ static char const unop[4] = { 0x00, 0x00, 0xfe, 0x2f };
+ static char const nopunop[8] =
+ {
+ 0x1f, 0x04, 0xff, 0x47,
+ 0x00, 0x00, 0xfe, 0x2f
+ };
+
+ int bytes, fix;
+ char *p;
+
+ if (fragp->fr_type != rs_align_code)
+ return;
+
+ bytes = fragp->fr_next->fr_address - fragp->fr_address - fragp->fr_fix;
+ p = fragp->fr_literal + fragp->fr_fix;
+ fix = 0;
+
+ if (bytes & 3)
{
- case PDSC_S_K_KIND_NULL:
- *(p + 2) = 0;
- *(p + 3) = 0;
- break;
- case PDSC_S_K_KIND_FP_REGISTER:
- *(p + 2) = alpha_evax_proc.fp_save;
- *(p + 3) = alpha_evax_proc.ra_save;
- break;
- case PDSC_S_K_KIND_FP_STACK:
- md_number_to_chars (p + 2, (valueT) alpha_evax_proc.rsa_offset, 2);
- break;
- default: /* impossible */
- break;
+ fix = bytes & 3;
+ memset (p, 0, fix);
+ p += fix;
+ bytes -= fix;
}
- *(p + 4) = 0;
- *(p + 5) = alpha_evax_proc.type & 0x0f;
+ if (bytes & 4)
+ {
+ memcpy (p, unop, 4);
+ p += 4;
+ bytes -= 4;
+ fix += 4;
+ }
- /* Signature offset. */
- md_number_to_chars (p + 6, (valueT) 0, 2);
+ memcpy (p, nopunop, 8);
- fix_new_exp (frag_now, p - frag_now->fr_literal+8, 8, &exp, 0, BFD_RELOC_64);
+ fragp->fr_fix += fix;
+ fragp->fr_var = 8;
+}
+\f
+/* Public interface functions. */
- if (alpha_evax_proc.pdsckind == PDSC_S_K_KIND_NULL)
- return;
+/* This function is called once, at assembler startup time. It sets
+ up all the tables, etc. that the MD part of the assembler will
+ need, that can be determined before arguments are parsed. */
- /* Add dummy fix to make add_to_link_pool work. */
- p = frag_more (8);
- fixp = fix_new (frag_now, p - frag_now->fr_literal, 8, 0, 0, 0, 0);
- fixp->fx_done = 1;
- seginfo->literal_pool_size += 8;
+void
+md_begin (void)
+{
+ unsigned int i;
- /* pdesc+16: Size. */
- md_number_to_chars (p, (valueT) alpha_evax_proc.framesize, 4);
+ /* Verify that X_op field is wide enough. */
+ {
+ expressionS e;
- md_number_to_chars (p + 4, (valueT) 0, 2);
+ e.X_op = O_max;
+ assert (e.X_op == O_max);
+ }
- /* Entry length. */
- md_number_to_chars (p + 6, alpha_evax_proc.prologue, 2);
+ /* Create the opcode hash table. */
+ alpha_opcode_hash = hash_new ();
- if (alpha_evax_proc.pdsckind == PDSC_S_K_KIND_FP_REGISTER)
- return;
+ for (i = 0; i < alpha_num_opcodes;)
+ {
+ const char *name, *retval, *slash;
- /* Add dummy fix to make add_to_link_pool work. */
- p = frag_more (8);
- fixp = fix_new (frag_now, p - frag_now->fr_literal, 8, 0, 0, 0, 0);
- fixp->fx_done = 1;
- seginfo->literal_pool_size += 8;
+ name = alpha_opcodes[i].name;
+ retval = hash_insert (alpha_opcode_hash, name, (void *) &alpha_opcodes[i]);
+ if (retval)
+ as_fatal (_("internal error: can't hash opcode `%s': %s"),
+ name, retval);
- /* pdesc+24: register masks. */
+ /* Some opcodes include modifiers of various sorts with a "/mod"
+ syntax, like the architecture manual suggests. However, for
+ use with gcc at least, we also need access to those same opcodes
+ without the "/". */
- md_number_to_chars (p, alpha_evax_proc.imask, 4);
- md_number_to_chars (p + 4, alpha_evax_proc.fmask, 4);
+ if ((slash = strchr (name, '/')) != NULL)
+ {
+ char *p = xmalloc (strlen (name));
- return;
-}
+ memcpy (p, name, slash - name);
+ strcpy (p + (slash - name), slash + 1);
-/* Support for crash debug on vms. */
+ (void) hash_insert (alpha_opcode_hash, p, (void *) &alpha_opcodes[i]);
+ /* Ignore failures -- the opcode table does duplicate some
+ variants in different forms, like "hw_stq" and "hw_st/q". */
+ }
-static void
-s_alpha_name (ignore)
- int ignore;
-{
- register char *p;
- expressionS exp;
- segment_info_type *seginfo = seg_info (alpha_link_section);
+ while (++i < alpha_num_opcodes
+ && (alpha_opcodes[i].name == name
+ || !strcmp (alpha_opcodes[i].name, name)))
+ continue;
+ }
- if (now_seg != alpha_link_section)
+ /* Create the macro hash table. */
+ alpha_macro_hash = hash_new ();
+
+ for (i = 0; i < alpha_num_macros;)
{
- as_bad (_(".name directive not in link (.link) section"));
- demand_empty_rest_of_line ();
- return;
+ const char *name, *retval;
+
+ name = alpha_macros[i].name;
+ retval = hash_insert (alpha_macro_hash, name, (void *) &alpha_macros[i]);
+ if (retval)
+ as_fatal (_("internal error: can't hash macro `%s': %s"),
+ name, retval);
+
+ while (++i < alpha_num_macros
+ && (alpha_macros[i].name == name
+ || !strcmp (alpha_macros[i].name, name)))
+ continue;
}
- expression (&exp);
- if (exp.X_op != O_symbol)
+ /* Construct symbols for each of the registers. */
+ for (i = 0; i < 32; ++i)
{
- as_warn (_(".name directive has no symbol"));
- demand_empty_rest_of_line ();
- return;
+ char name[4];
+
+ sprintf (name, "$%d", i);
+ alpha_register_table[i] = symbol_create (name, reg_section, i,
+ &zero_address_frag);
}
- demand_empty_rest_of_line ();
+ for (; i < 64; ++i)
+ {
+ char name[5];
-#ifdef md_flush_pending_output
- md_flush_pending_output ();
-#endif
+ sprintf (name, "$f%d", i - 32);
+ alpha_register_table[i] = symbol_create (name, reg_section, i,
+ &zero_address_frag);
+ }
- frag_align (3, 0, 0);
- p = frag_more (8);
- seginfo->literal_pool_size += 8;
+ /* Create the special symbols and sections we'll be using. */
- fix_new_exp (frag_now, p - frag_now->fr_literal, 8, &exp, 0, BFD_RELOC_64);
+ /* So .sbss will get used for tiny objects. */
+ bfd_set_gp_size (stdoutput, g_switch_value);
- return;
-}
+#ifdef OBJ_ECOFF
+ create_literal_section (".lita", &alpha_lita_section, &alpha_lita_symbol);
-static void
-s_alpha_linkage (ignore)
- int ignore;
-{
- expressionS exp;
- char *p;
+ /* For handling the GP, create a symbol that won't be output in the
+ symbol table. We'll edit it out of relocs later. */
+ alpha_gp_symbol = symbol_create ("<GP value>", alpha_lita_section, 0x8000,
+ &zero_address_frag);
+#endif
-#ifdef md_flush_pending_output
- md_flush_pending_output ();
+#ifdef OBJ_EVAX
+ create_literal_section (".link", &alpha_link_section, &alpha_link_symbol);
#endif
- expression (&exp);
- if (exp.X_op != O_symbol)
- {
- as_fatal (_("No symbol after .linkage"));
- }
- else
+#ifdef OBJ_ELF
+ if (ECOFF_DEBUGGING)
{
- p = frag_more (LKP_S_K_SIZE);
- memset (p, 0, LKP_S_K_SIZE);
- fix_new_exp (frag_now, p - frag_now->fr_literal, LKP_S_K_SIZE, &exp, 0,\
- BFD_RELOC_ALPHA_LINKAGE);
+ segT sec = subseg_new (".mdebug", (subsegT) 0);
+ bfd_set_section_flags (stdoutput, sec, SEC_HAS_CONTENTS | SEC_READONLY);
+ bfd_set_section_alignment (stdoutput, sec, 3);
}
- demand_empty_rest_of_line ();
+#endif
+
+ /* Create literal lookup hash table. */
+ alpha_literal_hash = hash_new ();
- return;
+ subseg_set (text_section, 0);
}
-static void
-s_alpha_code_address (ignore)
- int ignore;
+/* The public interface to the instruction assembler. */
+
+void
+md_assemble (char *str)
{
- expressionS exp;
- char *p;
+ /* Current maximum is 13. */
+ char opname[32];
+ expressionS tok[MAX_INSN_ARGS];
+ int ntok, trunclen;
+ size_t opnamelen;
-#ifdef md_flush_pending_output
- md_flush_pending_output ();
-#endif
+ /* Split off the opcode. */
+ opnamelen = strspn (str, "abcdefghijklmnopqrstuvwxyz_/46819");
+ trunclen = (opnamelen < sizeof (opname) - 1
+ ? opnamelen
+ : sizeof (opname) - 1);
+ memcpy (opname, str, trunclen);
+ opname[trunclen] = '\0';
- expression (&exp);
- if (exp.X_op != O_symbol)
- {
- as_fatal (_("No symbol after .code_address"));
- }
- else
+ /* Tokenize the rest of the line. */
+ if ((ntok = tokenize_arguments (str + opnamelen, tok, MAX_INSN_ARGS)) < 0)
{
- p = frag_more (8);
- memset (p, 0, 8);
- fix_new_exp (frag_now, p - frag_now->fr_literal, 8, &exp, 0,\
- BFD_RELOC_ALPHA_CODEADDR);
+ if (ntok != TOKENIZE_ERROR_REPORT)
+ as_bad (_("syntax error"));
+
+ return;
}
- demand_empty_rest_of_line ();
- return;
+ /* Finish it off. */
+ assemble_tokens (opname, tok, ntok, alpha_macros_on);
}
-static void
-s_alpha_fp_save (ignore)
- int ignore;
-{
+/* Round up a section's size to the appropriate boundary. */
- alpha_evax_proc.fp_save = tc_get_register (1);
+valueT
+md_section_align (segT seg, valueT size)
+{
+ int align = bfd_get_section_alignment (stdoutput, seg);
+ valueT mask = ((valueT) 1 << align) - 1;
- demand_empty_rest_of_line ();
- return;
+ return (size + mask) & ~mask;
}
-static void
-s_alpha_mask (ignore)
- int ignore;
-{
- long val;
+/* Turn a string in input_line_pointer into a floating point constant
+ of type TYPE, and store the appropriate bytes in *LITP. The number
+ of LITTLENUMS emitted is stored in *SIZEP. An error message is
+ returned, or NULL on OK. */
- if (get_absolute_expression_and_terminator (&val) != ',')
- {
- as_warn (_("Bad .mask directive"));
- --input_line_pointer;
- }
- else
- {
- alpha_evax_proc.imask = val;
- (void) get_absolute_expression ();
- }
- demand_empty_rest_of_line ();
+/* Equal to MAX_PRECISION in atof-ieee.c. */
+#define MAX_LITTLENUMS 6
- return;
-}
+extern char *vax_md_atof (int, char *, int *);
-static void
-s_alpha_fmask (ignore)
- int ignore;
+char *
+md_atof (int type, char *litP, int *sizeP)
{
- long val;
+ int prec;
+ LITTLENUM_TYPE words[MAX_LITTLENUMS];
+ LITTLENUM_TYPE *wordP;
+ char *t;
- if (get_absolute_expression_and_terminator (&val) != ',')
+ switch (type)
{
- as_warn (_("Bad .fmask directive"));
- --input_line_pointer;
+ /* VAX floats. */
+ case 'G':
+ /* VAX md_atof doesn't like "G" for some reason. */
+ type = 'g';
+ case 'F':
+ case 'D':
+ return vax_md_atof (type, litP, sizeP);
+
+ /* IEEE floats. */
+ case 'f':
+ prec = 2;
+ break;
+
+ case 'd':
+ prec = 4;
+ break;
+
+ case 'x':
+ case 'X':
+ prec = 6;
+ break;
+
+ case 'p':
+ case 'P':
+ prec = 6;
+ break;
+
+ default:
+ *sizeP = 0;
+ return _("Bad call to MD_ATOF()");
}
- else
+ t = atof_ieee (input_line_pointer, type, words);
+ if (t)
+ input_line_pointer = t;
+ *sizeP = prec * sizeof (LITTLENUM_TYPE);
+
+ for (wordP = words + prec - 1; prec--;)
{
- alpha_evax_proc.fmask = val;
- (void) get_absolute_expression ();
+ md_number_to_chars (litP, (long) (*wordP--), sizeof (LITTLENUM_TYPE));
+ litP += sizeof (LITTLENUM_TYPE);
}
- demand_empty_rest_of_line ();
- return;
+ return 0;
}
-static void
-s_alpha_end (ignore)
- int ignore;
-{
- char c;
-
- c = get_symbol_end ();
- *input_line_pointer = c;
- demand_empty_rest_of_line ();
- alpha_evax_proc.symbol = 0;
-
- return;
-}
+/* Take care of the target-specific command-line options. */
-static void
-s_alpha_file (ignore)
- int ignore;
+int
+md_parse_option (int c, char *arg)
{
- symbolS *s;
- int length;
- static char case_hack[32];
+ switch (c)
+ {
+ case 'F':
+ alpha_nofloats_on = 1;
+ break;
- extern char *demand_copy_string PARAMS ((int *lenP));
+ case OPTION_32ADDR:
+ alpha_addr32_on = 1;
+ break;
- sprintf (case_hack, "<CASE:%01d%01d>",
- alpha_flag_hash_long_names, alpha_flag_show_after_trunc);
+ case 'g':
+ alpha_debug = 1;
+ break;
- s = symbol_find_or_make (case_hack);
- symbol_get_bfdsym (s)->flags |= BSF_FILE;
+ case 'G':
+ g_switch_value = atoi (arg);
+ break;
- get_absolute_expression ();
- s = symbol_find_or_make (demand_copy_string (&length));
- symbol_get_bfdsym (s)->flags |= BSF_FILE;
- demand_empty_rest_of_line ();
+ case 'm':
+ {
+ const struct cpu_type *p;
- return;
-}
-#endif /* OBJ_EVAX */
+ for (p = cpu_types; p->name; ++p)
+ if (strcmp (arg, p->name) == 0)
+ {
+ alpha_target_name = p->name, alpha_target = p->flags;
+ goto found;
+ }
+ as_warn (_("Unknown CPU identifier `%s'"), arg);
+ found:;
+ }
+ break;
-/* Handle the .gprel32 pseudo op. */
+#ifdef OBJ_EVAX
+ case '+': /* For g++. Hash any name > 63 chars long. */
+ alpha_flag_hash_long_names = 1;
+ break;
-static void
-s_alpha_gprel32 (ignore)
- int ignore ATTRIBUTE_UNUSED;
-{
- expressionS e;
- char *p;
+ case 'H': /* Show new symbol after hash truncation. */
+ alpha_flag_show_after_trunc = 1;
+ break;
- SKIP_WHITESPACE ();
- expression (&e);
+ case 'h': /* For gnu-c/vax compatibility. */
+ break;
+#endif
+
+ case OPTION_RELAX:
+ alpha_flag_relax = 1;
+ break;
#ifdef OBJ_ELF
- switch (e.X_op)
- {
- case O_constant:
- e.X_add_symbol = section_symbol (absolute_section);
- e.X_op = O_symbol;
- /* FALLTHRU */
- case O_symbol:
+ case OPTION_MDEBUG:
+ alpha_flag_mdebug = 1;
break;
- default:
- abort ();
- }
-#else
-#ifdef OBJ_ECOFF
- switch (e.X_op)
- {
- case O_constant:
- e.X_add_symbol = section_symbol (absolute_section);
- /* fall through */
- case O_symbol:
- e.X_op = O_subtract;
- e.X_op_symbol = alpha_gp_symbol;
+ case OPTION_NO_MDEBUG:
+ alpha_flag_mdebug = 0;
break;
- default:
- abort ();
- }
-#endif
#endif
- if (alpha_auto_align_on && alpha_current_align < 2)
- alpha_align (2, (char *) NULL, alpha_insn_label, 0);
- if (alpha_current_align > 2)
- alpha_current_align = 2;
- alpha_insn_label = NULL;
+ default:
+ return 0;
+ }
- p = frag_more (4);
- memset (p, 0, 4);
- fix_new_exp (frag_now, p - frag_now->fr_literal, 4,
- &e, 0, BFD_RELOC_GPREL32);
+ return 1;
}
-/* Handle floating point allocation pseudo-ops. This is like the
- generic vresion, but it makes sure the current label, if any, is
- correctly aligned. */
+/* Print a description of the command-line options that we accept. */
-static void
-s_alpha_float_cons (type)
- int type;
+void
+md_show_usage (FILE *stream)
{
- int log_size;
-
- switch (type)
- {
- default:
- case 'f':
- case 'F':
- log_size = 2;
- break;
-
- case 'd':
- case 'D':
- case 'G':
- log_size = 3;
- break;
-
- case 'x':
- case 'X':
- case 'p':
- case 'P':
- log_size = 4;
- break;
- }
-
- if (alpha_auto_align_on && alpha_current_align < log_size)
- alpha_align (log_size, (char *) NULL, alpha_insn_label, 0);
- if (alpha_current_align > log_size)
- alpha_current_align = log_size;
- alpha_insn_label = NULL;
-
- float_cons (type);
+ fputs (_("\
+Alpha options:\n\
+-32addr treat addresses as 32-bit values\n\
+-F lack floating point instructions support\n\
+-mev4 | -mev45 | -mev5 | -mev56 | -mpca56 | -mev6 | -mev67 | -mev68 | -mall\n\
+ specify variant of Alpha architecture\n\
+-m21064 | -m21066 | -m21164 | -m21164a | -m21164pc | -m21264 | -m21264a | -m21264b\n\
+ these variants include PALcode opcodes\n"),
+ stream);
+#ifdef OBJ_EVAX
+ fputs (_("\
+VMS options:\n\
+-+ hash encode (don't truncate) names longer than 64 characters\n\
+-H show new symbol after hash truncation\n"),
+ stream);
+#endif
}
-/* Handle the .proc pseudo op. We don't really do much with it except
- parse it. */
+/* Decide from what point a pc-relative relocation is relative to,
+ relative to the pc-relative fixup. Er, relatively speaking. */
-static void
-s_alpha_proc (is_static)
- int is_static ATTRIBUTE_UNUSED;
+long
+md_pcrel_from (fixS *fixP)
{
- char *name;
- char c;
- char *p;
- symbolS *symbolP;
- int temp;
+ valueT addr = fixP->fx_where + fixP->fx_frag->fr_address;
- /* Takes ".proc name,nargs" */
- SKIP_WHITESPACE ();
- name = input_line_pointer;
- c = get_symbol_end ();
- p = input_line_pointer;
- symbolP = symbol_find_or_make (name);
- *p = c;
- SKIP_WHITESPACE ();
- if (*input_line_pointer != ',')
- {
- *p = 0;
- as_warn (_("Expected comma after name \"%s\""), name);
- *p = c;
- temp = 0;
- ignore_rest_of_line ();
- }
- else
+ switch (fixP->fx_r_type)
{
- input_line_pointer++;
- temp = get_absolute_expression ();
+ case BFD_RELOC_23_PCREL_S2:
+ case BFD_RELOC_ALPHA_HINT:
+ case BFD_RELOC_ALPHA_BRSGP:
+ return addr + 4;
+ default:
+ return addr;
}
- /* *symbol_get_obj (symbolP) = (signed char) temp; */
- as_warn (_("unhandled: .proc %s,%d"), name, temp);
- demand_empty_rest_of_line ();
}
-/* Handle the .set pseudo op. This is used to turn on and off most of
- the assembler features. */
+/* Attempt to simplify or even eliminate a fixup. The return value is
+ ignored; perhaps it was once meaningful, but now it is historical.
+ To indicate that a fixup has been eliminated, set fixP->fx_done.
-static void
-s_alpha_set (x)
- int x ATTRIBUTE_UNUSED;
-{
- char *name, ch, *s;
- int yesno = 1;
+ For ELF, here it is that we transform the GPDISP_HI16 reloc we used
+ internally into the GPDISP reloc used externally. We had to do
+ this so that we'd have the GPDISP_LO16 reloc as a tag to compute
+ the distance to the "lda" instruction for setting the addend to
+ GPDISP. */
- SKIP_WHITESPACE ();
- name = input_line_pointer;
- ch = get_symbol_end ();
+void
+md_apply_fix3 (fixS *fixP, valueT * valP, segT seg)
+{
+ char * const fixpos = fixP->fx_frag->fr_literal + fixP->fx_where;
+ valueT value = * valP;
+ unsigned image, size;
- s = name;
- if (s[0] == 'n' && s[1] == 'o')
+ switch (fixP->fx_r_type)
{
- yesno = 0;
- s += 2;
- }
- if (!strcmp ("reorder", s))
- /* ignore */ ;
- else if (!strcmp ("at", s))
- alpha_noat_on = !yesno;
- else if (!strcmp ("macro", s))
- alpha_macros_on = yesno;
- else if (!strcmp ("move", s))
- /* ignore */ ;
- else if (!strcmp ("volatile", s))
- /* ignore */ ;
- else
- as_warn (_("Tried to .set unrecognized mode `%s'"), name);
+ /* The GPDISP relocations are processed internally with a symbol
+ referring to the current function's section; we need to drop
+ in a value which, when added to the address of the start of
+ the function, gives the desired GP. */
+ case BFD_RELOC_ALPHA_GPDISP_HI16:
+ {
+ fixS *next = fixP->fx_next;
- *input_line_pointer = ch;
- demand_empty_rest_of_line ();
-}
+ /* With user-specified !gpdisp relocations, we can be missing
+ the matching LO16 reloc. We will have already issued an
+ error message. */
+ if (next)
+ fixP->fx_offset = (next->fx_frag->fr_address + next->fx_where
+ - fixP->fx_frag->fr_address - fixP->fx_where);
-/* Handle the .base pseudo op. This changes the assembler's notion of
- the $gp register. */
+ value = (value - sign_extend_16 (value)) >> 16;
+ }
+#ifdef OBJ_ELF
+ fixP->fx_r_type = BFD_RELOC_ALPHA_GPDISP;
+#endif
+ goto do_reloc_gp;
-static void
-s_alpha_base (ignore)
- int ignore ATTRIBUTE_UNUSED;
-{
-#if 0
- if (first_32bit_quadrant)
- {
- /* not fatal, but it might not work in the end */
- as_warn (_("File overrides no-base-register option."));
- first_32bit_quadrant = 0;
- }
+ case BFD_RELOC_ALPHA_GPDISP_LO16:
+ value = sign_extend_16 (value);
+ fixP->fx_offset = 0;
+#ifdef OBJ_ELF
+ fixP->fx_done = 1;
#endif
- SKIP_WHITESPACE ();
- if (*input_line_pointer == '$')
- { /* $rNN form */
- input_line_pointer++;
- if (*input_line_pointer == 'r')
- input_line_pointer++;
- }
+ do_reloc_gp:
+ fixP->fx_addsy = section_symbol (seg);
+ md_number_to_chars (fixpos, value, 2);
+ break;
- alpha_gp_register = get_absolute_expression ();
- if (alpha_gp_register < 0 || alpha_gp_register > 31)
- {
- alpha_gp_register = AXP_REG_GP;
- as_warn (_("Bad base register, using $%d."), alpha_gp_register);
- }
+ case BFD_RELOC_16:
+ if (fixP->fx_pcrel)
+ fixP->fx_r_type = BFD_RELOC_16_PCREL;
+ size = 2;
+ goto do_reloc_xx;
- demand_empty_rest_of_line ();
-}
+ case BFD_RELOC_32:
+ if (fixP->fx_pcrel)
+ fixP->fx_r_type = BFD_RELOC_32_PCREL;
+ size = 4;
+ goto do_reloc_xx;
-/* Handle the .align pseudo-op. This aligns to a power of two. It
- also adjusts any current instruction label. We treat this the same
- way the MIPS port does: .align 0 turns off auto alignment. */
+ case BFD_RELOC_64:
+ if (fixP->fx_pcrel)
+ fixP->fx_r_type = BFD_RELOC_64_PCREL;
+ size = 8;
-static void
-s_alpha_align (ignore)
- int ignore ATTRIBUTE_UNUSED;
-{
- int align;
- char fill, *pfill;
- long max_alignment = 15;
+ do_reloc_xx:
+ if (fixP->fx_pcrel == 0 && fixP->fx_addsy == 0)
+ {
+ md_number_to_chars (fixpos, value, size);
+ goto done;
+ }
+ return;
- align = get_absolute_expression ();
- if (align > max_alignment)
- {
- align = max_alignment;
- as_bad (_("Alignment too large: %d. assumed"), align);
- }
- else if (align < 0)
- {
- as_warn (_("Alignment negative: 0 assumed"));
- align = 0;
- }
+#ifdef OBJ_ECOFF
+ case BFD_RELOC_GPREL32:
+ assert (fixP->fx_subsy == alpha_gp_symbol);
+ fixP->fx_subsy = 0;
+ /* FIXME: inherited this obliviousness of `value' -- why? */
+ md_number_to_chars (fixpos, -alpha_gp_value, 4);
+ break;
+#else
+ case BFD_RELOC_GPREL32:
+#endif
+ case BFD_RELOC_GPREL16:
+ case BFD_RELOC_ALPHA_GPREL_HI16:
+ case BFD_RELOC_ALPHA_GPREL_LO16:
+ return;
- if (*input_line_pointer == ',')
- {
- input_line_pointer++;
- fill = get_absolute_expression ();
- pfill = &fill;
- }
- else
- pfill = NULL;
+ case BFD_RELOC_23_PCREL_S2:
+ if (fixP->fx_pcrel == 0 && fixP->fx_addsy == 0)
+ {
+ image = bfd_getl32 (fixpos);
+ image = (image & ~0x1FFFFF) | ((value >> 2) & 0x1FFFFF);
+ goto write_done;
+ }
+ return;
- if (align != 0)
- {
- alpha_auto_align_on = 1;
- alpha_align (align, pfill, alpha_insn_label, 1);
- }
- else
- {
- alpha_auto_align_on = 0;
- }
+ case BFD_RELOC_ALPHA_HINT:
+ if (fixP->fx_pcrel == 0 && fixP->fx_addsy == 0)
+ {
+ image = bfd_getl32 (fixpos);
+ image = (image & ~0x3FFF) | ((value >> 2) & 0x3FFF);
+ goto write_done;
+ }
+ return;
- demand_empty_rest_of_line ();
-}
+#ifdef OBJ_ELF
+ case BFD_RELOC_ALPHA_BRSGP:
+ return;
-/* Hook the normal string processor to reset known alignment. */
+ case BFD_RELOC_ALPHA_TLSGD:
+ case BFD_RELOC_ALPHA_TLSLDM:
+ case BFD_RELOC_ALPHA_GOTDTPREL16:
+ case BFD_RELOC_ALPHA_DTPREL_HI16:
+ case BFD_RELOC_ALPHA_DTPREL_LO16:
+ case BFD_RELOC_ALPHA_DTPREL16:
+ case BFD_RELOC_ALPHA_GOTTPREL16:
+ case BFD_RELOC_ALPHA_TPREL_HI16:
+ case BFD_RELOC_ALPHA_TPREL_LO16:
+ case BFD_RELOC_ALPHA_TPREL16:
+ if (fixP->fx_addsy)
+ S_SET_THREAD_LOCAL (fixP->fx_addsy);
+ return;
+#endif
-static void
-s_alpha_stringer (terminate)
- int terminate;
-{
- alpha_current_align = 0;
- alpha_insn_label = NULL;
- stringer (terminate);
-}
+#ifdef OBJ_ECOFF
+ case BFD_RELOC_ALPHA_LITERAL:
+ md_number_to_chars (fixpos, value, 2);
+ return;
+#endif
+ case BFD_RELOC_ALPHA_ELF_LITERAL:
+ case BFD_RELOC_ALPHA_LITUSE:
+ case BFD_RELOC_ALPHA_LINKAGE:
+ case BFD_RELOC_ALPHA_CODEADDR:
+ return;
-/* Hook the normal space processing to reset known alignment. */
+ case BFD_RELOC_VTABLE_INHERIT:
+ case BFD_RELOC_VTABLE_ENTRY:
+ return;
-static void
-s_alpha_space (ignore)
- int ignore;
-{
- alpha_current_align = 0;
- alpha_insn_label = NULL;
- s_space (ignore);
-}
+ default:
+ {
+ const struct alpha_operand *operand;
-/* Hook into cons for auto-alignment. */
+ if ((int) fixP->fx_r_type >= 0)
+ as_fatal (_("unhandled relocation type %s"),
+ bfd_get_reloc_code_name (fixP->fx_r_type));
-void
-alpha_cons_align (size)
- int size;
-{
- int log_size;
+ assert (-(int) fixP->fx_r_type < (int) alpha_num_operands);
+ operand = &alpha_operands[-(int) fixP->fx_r_type];
- log_size = 0;
- while ((size >>= 1) != 0)
- ++log_size;
+ /* The rest of these fixups only exist internally during symbol
+ resolution and have no representation in the object file.
+ Therefore they must be completely resolved as constants. */
- if (alpha_auto_align_on && alpha_current_align < log_size)
- alpha_align (log_size, (char *) NULL, alpha_insn_label, 0);
- if (alpha_current_align > log_size)
- alpha_current_align = log_size;
- alpha_insn_label = NULL;
-}
+ if (fixP->fx_addsy != 0
+ && S_GET_SEGMENT (fixP->fx_addsy) != absolute_section)
+ as_bad_where (fixP->fx_file, fixP->fx_line,
+ _("non-absolute expression in constant field"));
-/* Here come the .uword, .ulong, and .uquad explicitly unaligned
- pseudos. We just turn off auto-alignment and call down to cons. */
+ image = bfd_getl32 (fixpos);
+ image = insert_operand (image, operand, (offsetT) value,
+ fixP->fx_file, fixP->fx_line);
+ }
+ goto write_done;
+ }
-static void
-s_alpha_ucons (bytes)
- int bytes;
-{
- int hold = alpha_auto_align_on;
- alpha_auto_align_on = 0;
- cons (bytes);
- alpha_auto_align_on = hold;
+ if (fixP->fx_addsy != 0 || fixP->fx_pcrel != 0)
+ return;
+ else
+ {
+ as_warn_where (fixP->fx_file, fixP->fx_line,
+ _("type %d reloc done?\n"), (int) fixP->fx_r_type);
+ goto done;
+ }
+
+write_done:
+ md_number_to_chars (fixpos, image, 4);
+
+done:
+ fixP->fx_done = 1;
}
-/* Switch the working cpu type. */
+/* Look for a register name in the given symbol. */
-static void
-s_alpha_arch (ignored)
- int ignored ATTRIBUTE_UNUSED;
+symbolS *
+md_undefined_symbol (char *name)
{
- char *name, ch;
- const struct cpu_type *p;
+ if (*name == '$')
+ {
+ int is_float = 0, num;
- SKIP_WHITESPACE ();
- name = input_line_pointer;
- ch = get_symbol_end ();
+ switch (*++name)
+ {
+ case 'f':
+ if (name[1] == 'p' && name[2] == '\0')
+ return alpha_register_table[AXP_REG_FP];
+ is_float = 32;
+ /* Fall through. */
- for (p = cpu_types; p->name; ++p)
- if (strcmp (name, p->name) == 0)
- {
- alpha_target_name = p->name, alpha_target = p->flags;
- goto found;
- }
- as_warn ("Unknown CPU identifier `%s'", name);
+ case 'r':
+ if (!ISDIGIT (*++name))
+ break;
+ /* Fall through. */
-found:
- *input_line_pointer = ch;
- demand_empty_rest_of_line ();
-}
-\f
-#ifdef DEBUG1
-/* print token expression with alpha specific extension. */
+ case '0': case '1': case '2': case '3': case '4':
+ case '5': case '6': case '7': case '8': case '9':
+ if (name[1] == '\0')
+ num = name[0] - '0';
+ else if (name[0] != '0' && ISDIGIT (name[1]) && name[2] == '\0')
+ {
+ num = (name[0] - '0') * 10 + name[1] - '0';
+ if (num >= 32)
+ break;
+ }
+ else
+ break;
-static void
-alpha_print_token (f, exp)
- FILE *f;
- const expressionS *exp;
-{
- switch (exp->X_op)
- {
- case O_cpregister:
- putc (',', f);
- /* FALLTHRU */
- case O_pregister:
- putc ('(', f);
- {
- expressionS nexp = *exp;
- nexp.X_op = O_register;
- print_expr (f, &nexp);
- }
- putc (')', f);
- break;
- default:
- print_expr (f, exp);
- break;
- }
- return;
-}
-#endif
-\f
-/* The target specific pseudo-ops which we support. */
+ if (!alpha_noat_on && (num + is_float) == AXP_REG_AT)
+ as_warn (_("Used $at without \".set noat\""));
+ return alpha_register_table[num + is_float];
-const pseudo_typeS md_pseudo_table[] = {
-#ifdef OBJ_ECOFF
- {"comm", s_alpha_comm, 0}, /* osf1 compiler does this */
- {"rdata", s_alpha_rdata, 0},
-#endif
- {"text", s_alpha_text, 0},
- {"data", s_alpha_data, 0},
-#ifdef OBJ_ECOFF
- {"sdata", s_alpha_sdata, 0},
-#endif
-#ifdef OBJ_ELF
- {"section", s_alpha_section, 0},
- {"section.s", s_alpha_section, 0},
- {"sect", s_alpha_section, 0},
- {"sect.s", s_alpha_section, 0},
-#endif
-#ifdef OBJ_EVAX
- { "pdesc", s_alpha_pdesc, 0},
- { "name", s_alpha_name, 0},
- { "linkage", s_alpha_linkage, 0},
- { "code_address", s_alpha_code_address, 0},
- { "ent", s_alpha_ent, 0},
- { "frame", s_alpha_frame, 0},
- { "fp_save", s_alpha_fp_save, 0},
- { "mask", s_alpha_mask, 0},
- { "fmask", s_alpha_fmask, 0},
- { "end", s_alpha_end, 0},
- { "file", s_alpha_file, 0},
- { "rdata", s_alpha_section, 1},
- { "comm", s_alpha_comm, 0},
- { "link", s_alpha_section, 3},
- { "ctors", s_alpha_section, 4},
- { "dtors", s_alpha_section, 5},
-#endif
-#ifdef OBJ_ELF
- /* Frame related pseudos. */
- {"ent", s_alpha_ent, 0},
- {"end", s_alpha_end, 0},
- {"mask", s_alpha_mask, 0},
- {"fmask", s_alpha_mask, 1},
- {"frame", s_alpha_frame, 0},
- {"prologue", s_alpha_prologue, 0},
- {"file", s_alpha_file, 5},
- {"loc", s_alpha_loc, 9},
- {"stabs", s_alpha_stab, 's'},
- {"stabn", s_alpha_stab, 'n'},
- /* COFF debugging related pseudos. */
- {"begin", s_alpha_coff_wrapper, 0},
- {"bend", s_alpha_coff_wrapper, 1},
- {"def", s_alpha_coff_wrapper, 2},
- {"dim", s_alpha_coff_wrapper, 3},
- {"endef", s_alpha_coff_wrapper, 4},
- {"scl", s_alpha_coff_wrapper, 5},
- {"tag", s_alpha_coff_wrapper, 6},
- {"val", s_alpha_coff_wrapper, 7},
-#else
- {"prologue", s_ignore, 0},
-#endif
- {"gprel32", s_alpha_gprel32, 0},
- {"t_floating", s_alpha_float_cons, 'd'},
- {"s_floating", s_alpha_float_cons, 'f'},
- {"f_floating", s_alpha_float_cons, 'F'},
- {"g_floating", s_alpha_float_cons, 'G'},
- {"d_floating", s_alpha_float_cons, 'D'},
+ case 'a':
+ if (name[1] == 't' && name[2] == '\0')
+ {
+ if (!alpha_noat_on)
+ as_warn (_("Used $at without \".set noat\""));
+ return alpha_register_table[AXP_REG_AT];
+ }
+ break;
- {"proc", s_alpha_proc, 0},
- {"aproc", s_alpha_proc, 1},
- {"set", s_alpha_set, 0},
- {"reguse", s_ignore, 0},
- {"livereg", s_ignore, 0},
- {"base", s_alpha_base, 0}, /*??*/
- {"option", s_ignore, 0},
- {"aent", s_ignore, 0},
- {"ugen", s_ignore, 0},
- {"eflag", s_ignore, 0},
+ case 'g':
+ if (name[1] == 'p' && name[2] == '\0')
+ return alpha_register_table[alpha_gp_register];
+ break;
- {"align", s_alpha_align, 0},
- {"double", s_alpha_float_cons, 'd'},
- {"float", s_alpha_float_cons, 'f'},
- {"single", s_alpha_float_cons, 'f'},
- {"ascii", s_alpha_stringer, 0},
- {"asciz", s_alpha_stringer, 1},
- {"string", s_alpha_stringer, 1},
- {"space", s_alpha_space, 0},
- {"skip", s_alpha_space, 0},
- {"zero", s_alpha_space, 0},
+ case 's':
+ if (name[1] == 'p' && name[2] == '\0')
+ return alpha_register_table[AXP_REG_SP];
+ break;
+ }
+ }
+ return NULL;
+}
-/* Unaligned data pseudos. */
- {"uword", s_alpha_ucons, 2},
- {"ulong", s_alpha_ucons, 4},
- {"uquad", s_alpha_ucons, 8},
+#ifdef OBJ_ECOFF
+/* @@@ Magic ECOFF bits. */
-#ifdef OBJ_ELF
-/* Dwarf wants these versions of unaligned. */
- {"2byte", s_alpha_ucons, 2},
- {"4byte", s_alpha_ucons, 4},
- {"8byte", s_alpha_ucons, 8},
+void
+alpha_frob_ecoff_data (void)
+{
+ select_gp_value ();
+ /* $zero and $f31 are read-only. */
+ alpha_gprmask &= ~1;
+ alpha_fprmask &= ~1;
+}
#endif
-/* We don't do any optimizing, so we can safely ignore these. */
- {"noalias", s_ignore, 0},
- {"alias", s_ignore, 0},
+/* Hook to remember a recently defined label so that the auto-align
+ code can adjust the symbol after we know what alignment will be
+ required. */
- {"arch", s_alpha_arch, 0},
+void
+alpha_define_label (symbolS *sym)
+{
+ alpha_insn_label = sym;
+}
- {NULL, 0, 0},
-};
-\f
-/* Build a BFD section with its flags set appropriately for the .lita,
- .lit8, or .lit4 sections. */
+/* Return true if we must always emit a reloc for a type and false if
+ there is some hope of resolving it at assembly time. */
-static void
-create_literal_section (name, secp, symp)
- const char *name;
- segT *secp;
- symbolS **symp;
+int
+alpha_force_relocation (fixS *f)
{
- segT current_section = now_seg;
- int current_subsec = now_subseg;
- segT new_sec;
+ if (alpha_flag_relax)
+ return 1;
- *secp = new_sec = subseg_new (name, 0);
- subseg_set (current_section, current_subsec);
- bfd_set_section_alignment (stdoutput, new_sec, 4);
- bfd_set_section_flags (stdoutput, new_sec,
- SEC_RELOC | SEC_ALLOC | SEC_LOAD | SEC_READONLY
- | SEC_DATA);
+ switch (f->fx_r_type)
+ {
+ case BFD_RELOC_ALPHA_GPDISP_HI16:
+ case BFD_RELOC_ALPHA_GPDISP_LO16:
+ case BFD_RELOC_ALPHA_GPDISP:
+ case BFD_RELOC_ALPHA_LITERAL:
+ case BFD_RELOC_ALPHA_ELF_LITERAL:
+ case BFD_RELOC_ALPHA_LITUSE:
+ case BFD_RELOC_GPREL16:
+ case BFD_RELOC_GPREL32:
+ case BFD_RELOC_ALPHA_GPREL_HI16:
+ case BFD_RELOC_ALPHA_GPREL_LO16:
+ case BFD_RELOC_ALPHA_LINKAGE:
+ case BFD_RELOC_ALPHA_CODEADDR:
+ case BFD_RELOC_ALPHA_BRSGP:
+ case BFD_RELOC_ALPHA_TLSGD:
+ case BFD_RELOC_ALPHA_TLSLDM:
+ case BFD_RELOC_ALPHA_GOTDTPREL16:
+ case BFD_RELOC_ALPHA_DTPREL_HI16:
+ case BFD_RELOC_ALPHA_DTPREL_LO16:
+ case BFD_RELOC_ALPHA_DTPREL16:
+ case BFD_RELOC_ALPHA_GOTTPREL16:
+ case BFD_RELOC_ALPHA_TPREL_HI16:
+ case BFD_RELOC_ALPHA_TPREL_LO16:
+ case BFD_RELOC_ALPHA_TPREL16:
+ return 1;
- S_CLEAR_EXTERNAL (*symp = section_symbol (new_sec));
-}
+ default:
+ break;
+ }
-#ifdef OBJ_ECOFF
+ return generic_force_reloc (f);
+}
-/* @@@ GP selection voodoo. All of this seems overly complicated and
- unnecessary; which is the primary reason it's for ECOFF only. */
+/* Return true if we can partially resolve a relocation now. */
-static inline void
-maybe_set_gp (sec)
- asection *sec;
+int
+alpha_fix_adjustable (fixS *f)
{
- bfd_vma vma;
- if (!sec)
- return;
- vma = bfd_get_section_vma (foo, sec);
- if (vma && vma < alpha_gp_value)
- alpha_gp_value = vma;
-}
+ /* Are there any relocation types for which we must generate a
+ reloc but we can adjust the values contained within it? */
+ switch (f->fx_r_type)
+ {
+ case BFD_RELOC_ALPHA_GPDISP_HI16:
+ case BFD_RELOC_ALPHA_GPDISP_LO16:
+ case BFD_RELOC_ALPHA_GPDISP:
+ return 0;
-static void
-select_gp_value ()
-{
- assert (alpha_gp_value == 0);
+ case BFD_RELOC_ALPHA_LITERAL:
+ case BFD_RELOC_ALPHA_ELF_LITERAL:
+ case BFD_RELOC_ALPHA_LITUSE:
+ case BFD_RELOC_ALPHA_LINKAGE:
+ case BFD_RELOC_ALPHA_CODEADDR:
+ return 1;
- /* Get minus-one in whatever width... */
- alpha_gp_value = 0;
- alpha_gp_value--;
+ case BFD_RELOC_VTABLE_ENTRY:
+ case BFD_RELOC_VTABLE_INHERIT:
+ return 0;
- /* Select the smallest VMA of these existing sections. */
- maybe_set_gp (alpha_lita_section);
-#if 0
- /* These were disabled before -- should we use them? */
- maybe_set_gp (sdata);
- maybe_set_gp (lit8_sec);
- maybe_set_gp (lit4_sec);
-#endif
+ case BFD_RELOC_GPREL16:
+ case BFD_RELOC_GPREL32:
+ case BFD_RELOC_ALPHA_GPREL_HI16:
+ case BFD_RELOC_ALPHA_GPREL_LO16:
+ case BFD_RELOC_23_PCREL_S2:
+ case BFD_RELOC_32:
+ case BFD_RELOC_64:
+ case BFD_RELOC_ALPHA_HINT:
+ return 1;
-/* @@ Will a simple 0x8000 work here? If not, why not? */
-#define GP_ADJUSTMENT (0x8000 - 0x10)
+ case BFD_RELOC_ALPHA_TLSGD:
+ case BFD_RELOC_ALPHA_TLSLDM:
+ case BFD_RELOC_ALPHA_GOTDTPREL16:
+ case BFD_RELOC_ALPHA_DTPREL_HI16:
+ case BFD_RELOC_ALPHA_DTPREL_LO16:
+ case BFD_RELOC_ALPHA_DTPREL16:
+ case BFD_RELOC_ALPHA_GOTTPREL16:
+ case BFD_RELOC_ALPHA_TPREL_HI16:
+ case BFD_RELOC_ALPHA_TPREL_LO16:
+ case BFD_RELOC_ALPHA_TPREL16:
+ /* ??? No idea why we can't return a reference to .tbss+10, but
+ we're preventing this in the other assemblers. Follow for now. */
+ return 0;
- alpha_gp_value += GP_ADJUSTMENT;
+#ifdef OBJ_ELF
+ case BFD_RELOC_ALPHA_BRSGP:
+ /* If we have a BRSGP reloc to a local symbol, adjust it to BRADDR and
+ let it get resolved at assembly time. */
+ {
+ symbolS *sym = f->fx_addsy;
+ const char *name;
+ int offset = 0;
- S_SET_VALUE (alpha_gp_symbol, alpha_gp_value);
+ if (generic_force_reloc (f))
+ return 0;
-#ifdef DEBUG1
- printf (_("Chose GP value of %lx\n"), alpha_gp_value);
+ switch (S_GET_OTHER (sym) & STO_ALPHA_STD_GPLOAD)
+ {
+ case STO_ALPHA_NOPV:
+ break;
+ case STO_ALPHA_STD_GPLOAD:
+ offset = 8;
+ break;
+ default:
+ if (S_IS_LOCAL (sym))
+ name = "<local>";
+ else
+ name = S_GET_NAME (sym);
+ as_bad_where (f->fx_file, f->fx_line,
+ _("!samegp reloc against symbol without .prologue: %s"),
+ name);
+ break;
+ }
+ f->fx_r_type = BFD_RELOC_23_PCREL_S2;
+ f->fx_offset += offset;
+ return 1;
+ }
#endif
+
+ default:
+ return 1;
+ }
}
-#endif /* OBJ_ECOFF */
-/* Called internally to handle all alignment needs. This takes care
- of eliding calls to frag_align if'n the cached current alignment
- says we've already got it, as well as taking care of the auto-align
- feature wrt labels. */
+/* Generate the BFD reloc to be stuck in the object file from the
+ fixup used internally in the assembler. */
-static void
-alpha_align (n, pfill, label, force)
- int n;
- char *pfill;
- symbolS *label;
- int force ATTRIBUTE_UNUSED;
+arelent *
+tc_gen_reloc (asection *sec ATTRIBUTE_UNUSED,
+ fixS *fixp)
{
- if (alpha_current_align >= n)
- return;
+ arelent *reloc;
- if (pfill == NULL)
- {
- if (subseg_text_p (now_seg))
- frag_align_code (n, 0);
- else
- frag_align (n, 0, 0);
- }
- else
- frag_align (n, *pfill, 0);
+ reloc = xmalloc (sizeof (* reloc));
+ reloc->sym_ptr_ptr = xmalloc (sizeof (asymbol *));
+ *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy);
+ reloc->address = fixp->fx_frag->fr_address + fixp->fx_where;
- alpha_current_align = n;
+ /* Make sure none of our internal relocations make it this far.
+ They'd better have been fully resolved by this point. */
+ assert ((int) fixp->fx_r_type > 0);
- if (label != NULL && S_GET_SEGMENT (label) == now_seg)
+ reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type);
+ if (reloc->howto == NULL)
{
- symbol_set_frag (label, frag_now);
- S_SET_VALUE (label, (valueT) frag_now_fix ());
+ as_bad_where (fixp->fx_file, fixp->fx_line,
+ _("cannot represent `%s' relocation in object file"),
+ bfd_get_reloc_code_name (fixp->fx_r_type));
+ return NULL;
}
- record_alignment (now_seg, n);
+ if (!fixp->fx_pcrel != !reloc->howto->pc_relative)
+ as_fatal (_("internal error? cannot generate `%s' relocation"),
+ bfd_get_reloc_code_name (fixp->fx_r_type));
- /* ??? If alpha_flag_relax && force && elf, record the requested alignment
- in a reloc for the linker to see. */
-}
+ assert (!fixp->fx_pcrel == !reloc->howto->pc_relative);
-/* This is called from HANDLE_ALIGN in write.c. Fill in the contents
- of an rs_align_code fragment. */
+#ifdef OBJ_ECOFF
+ if (fixp->fx_r_type == BFD_RELOC_ALPHA_LITERAL)
+ /* Fake out bfd_perform_relocation. sigh. */
+ reloc->addend = -alpha_gp_value;
+ else
+#endif
+ {
+ reloc->addend = fixp->fx_offset;
+#ifdef OBJ_ELF
+ /* Ohhh, this is ugly. The problem is that if this is a local global
+ symbol, the relocation will entirely be performed at link time, not
+ at assembly time. bfd_perform_reloc doesn't know about this sort
+ of thing, and as a result we need to fake it out here. */
+ if ((S_IS_EXTERNAL (fixp->fx_addsy) || S_IS_WEAK (fixp->fx_addsy)
+ || (S_GET_SEGMENT (fixp->fx_addsy)->flags & SEC_MERGE)
+ || (S_GET_SEGMENT (fixp->fx_addsy)->flags & SEC_THREAD_LOCAL))
+ && !S_IS_COMMON (fixp->fx_addsy))
+ reloc->addend -= symbol_get_bfdsym (fixp->fx_addsy)->value;
+#endif
+ }
-void
-alpha_handle_align (fragp)
- fragS *fragp;
-{
- static char const unop[4] = { 0x00, 0x00, 0xe0, 0x2f };
- static char const nopunop[8] = {
- 0x1f, 0x04, 0xff, 0x47,
- 0x00, 0x00, 0xe0, 0x2f
- };
+ return reloc;
+}
- int bytes, fix;
- char *p;
+/* Parse a register name off of the input_line and return a register
+ number. Gets md_undefined_symbol above to do the register name
+ matching for us.
- if (fragp->fr_type != rs_align_code)
- return;
+ Only called as a part of processing the ECOFF .frame directive. */
- bytes = fragp->fr_next->fr_address - fragp->fr_address - fragp->fr_fix;
- p = fragp->fr_literal + fragp->fr_fix;
- fix = 0;
+int
+tc_get_register (int frame ATTRIBUTE_UNUSED)
+{
+ int framereg = AXP_REG_SP;
- if (bytes & 3)
+ SKIP_WHITESPACE ();
+ if (*input_line_pointer == '$')
{
- fix = bytes & 3;
- memset (p, 0, fix);
- p += fix;
- bytes -= fix;
- }
+ char *s = input_line_pointer;
+ char c = get_symbol_end ();
+ symbolS *sym = md_undefined_symbol (s);
- if (bytes & 4)
- {
- memcpy (p, unop, 4);
- p += 4;
- bytes -= 4;
- fix += 4;
+ *strchr (s, '\0') = c;
+ if (sym && (framereg = S_GET_VALUE (sym)) <= 31)
+ goto found;
}
+ as_warn (_("frame reg expected, using $%d."), framereg);
- memcpy (p, nopunop, 8);
+found:
+ note_gpreg (framereg);
+ return framereg;
+}
- fragp->fr_fix += fix;
- fragp->fr_var = 8;
+/* This is called before the symbol table is processed. In order to
+ work with gcc when using mips-tfile, we must keep all local labels.
+ However, in other cases, we want to discard them. If we were
+ called with -g, but we didn't see any debugging information, it may
+ mean that gcc is smuggling debugging information through to
+ mips-tfile, in which case we must generate all local labels. */
+
+#ifdef OBJ_ECOFF
+
+void
+alpha_frob_file_before_adjust (void)
+{
+ if (alpha_debug != 0
+ && ! ecoff_debugging_seen)
+ flag_keep_locals = 1;
}
+#endif /* OBJ_ECOFF */
+
/* The Alpha has support for some VAX floating point types, as well as for
IEEE floating point. We consider IEEE to be the primary floating point
format, and sneak in the VAX floating point support here. */
projects / deliverable / binutils-gdb.git / blobdiff