/* tc-arc.c -- Assembler for the ARC
- Copyright (C) 1994-2017 Free Software Foundation, Inc.
+ Copyright (C) 1994-2020 Free Software Foundation, Inc.
Contributor: Claudiu Zissulescu <claziss@synopsys.com>
#include "as.h"
#include "subsegs.h"
-#include "struc-symbol.h"
#include "dwarf2dbg.h"
#include "dw2gencfi.h"
#include "safe-ctype.h"
#define LP_INSN(x) ((MAJOR_OPCODE (x) == 0x4) \
&& (SUB_OPCODE (x) == 0x28))
-/* Equal to MAX_PRECISION in atof-ieee.c. */
-#define MAX_LITTLENUMS 6
-
#ifndef TARGET_WITH_CPU
#define TARGET_WITH_CPU "arc700"
#endif /* TARGET_WITH_CPU */
#define is_spfp_p(op) (((sc) == SPX))
#define is_dpfp_p(op) (((sc) == DPX))
#define is_fpuda_p(op) (((sc) == DPA))
-#define is_br_jmp_insn_p(op) (((op)->insn_class == BRANCH \
- || (op)->insn_class == JUMP))
+#define is_br_jmp_insn_p(op) (((op)->insn_class == BRANCH \
+ || (op)->insn_class == JUMP \
+ || (op)->insn_class == BRCC \
+ || (op)->insn_class == BBIT0 \
+ || (op)->insn_class == BBIT1 \
+ || (op)->insn_class == BI \
+ || (op)->insn_class == EI \
+ || (op)->insn_class == ENTER \
+ || (op)->insn_class == JLI \
+ || (op)->insn_class == LOOP \
+ || (op)->insn_class == LEAVE \
+ ))
#define is_kernel_insn_p(op) (((op)->insn_class == KERNEL))
#define is_nps400_p(op) (((sc) == NPS400))
#define ARC_CPU_TYPE_AV2HS(NAME,EXTRA) \
{ #NAME, ARC_OPCODE_ARCv2HS, bfd_mach_arc_arcv2, \
EF_ARC_CPU_ARCV2HS, EXTRA}
+#define ARC_CPU_TYPE_NONE \
+ { 0, 0, 0, 0, 0 }
/* A table of CPU names and opcode sets. */
static const struct cpu_type
}
cpu_types[] =
{
- ARC_CPU_TYPE_A7xx (arc700, 0x00),
- ARC_CPU_TYPE_A7xx (nps400, NPS400),
-
- ARC_CPU_TYPE_AV2EM (arcem, 0x00),
- ARC_CPU_TYPE_AV2EM (em, 0x00),
- ARC_CPU_TYPE_AV2EM (em4, CD),
- ARC_CPU_TYPE_AV2EM (em4_dmips, CD),
- ARC_CPU_TYPE_AV2EM (em4_fpus, CD),
- ARC_CPU_TYPE_AV2EM (em4_fpuda, CD | DPA),
- ARC_CPU_TYPE_AV2EM (quarkse_em, CD | SPX | DPX),
-
- ARC_CPU_TYPE_AV2HS (archs, CD),
- ARC_CPU_TYPE_AV2HS (hs, CD),
- ARC_CPU_TYPE_AV2HS (hs34, CD),
- ARC_CPU_TYPE_AV2HS (hs38, CD),
- ARC_CPU_TYPE_AV2HS (hs38_linux, CD),
-
- ARC_CPU_TYPE_A6xx (arc600, 0x00),
- ARC_CPU_TYPE_A6xx (arc600_norm, 0x00),
- ARC_CPU_TYPE_A6xx (arc600_mul64, 0x00),
- ARC_CPU_TYPE_A6xx (arc600_mul32x16, 0x00),
- ARC_CPU_TYPE_A6xx (arc601, 0x00),
- ARC_CPU_TYPE_A6xx (arc601_norm, 0x00),
- ARC_CPU_TYPE_A6xx (arc601_mul64, 0x00),
- ARC_CPU_TYPE_A6xx (arc601_mul32x16, 0x00),
- { 0, 0, 0, 0, 0 }
+ #include "elf/arc-cpu.def"
};
/* Information about the cpu/variant we're assembling for. */
static struct cpu_type selected_cpu = { 0, 0, 0, E_ARC_OSABI_CURRENT, 0 };
+/* TRUE if current assembly code uses RF16 only registers. */
+static bfd_boolean rf16_only = TRUE;
+
/* MPY option. */
static unsigned mpy_option = 0;
md_number_to_chars (buf, val, n);
break;
case 6:
- md_number_to_chars (buf, (val & 0xffff00000000) >> 32, 2);
+ md_number_to_chars (buf, (val & 0xffff00000000ull) >> 32, 2);
md_number_to_chars_midend (buf + 2, (val & 0xffffffff), 4);
break;
case 4:
md_number_to_chars (buf + 2, (val & 0xffff), 2);
break;
case 8:
- md_number_to_chars_midend (buf, (val & 0xffffffff00000000) >> 32, 4);
+ md_number_to_chars_midend (buf, (val & 0xffffffff00000000ull) >> 32, 4);
md_number_to_chars_midend (buf + 4, (val & 0xffffffff), 4);
break;
default:
arc_select_cpu (const char *arg, enum mach_selection_type sel)
{
int i;
+ static struct cpu_type old_cpu = { 0, 0, 0, E_ARC_OSABI_CURRENT, 0 };
/* We should only set a default if we've not made a selection from some
other source. */
}
return;
}
-
/* Initialise static global data about selected machine type. */
selected_cpu.flags = cpu_types[i].flags;
selected_cpu.name = cpu_types[i].name;
/* Check if set features are compatible with the chosen CPU. */
arc_check_feature ();
+ /* If we change the CPU, we need to re-init the bfd. */
+ if (mach_selection_mode != MACH_SELECTION_NONE
+ && (old_cpu.mach != selected_cpu.mach))
+ {
+ bfd_find_target (arc_target_format, stdoutput);
+ if (! bfd_set_arch_mach (stdoutput, bfd_arch_arc, selected_cpu.mach))
+ as_warn (_("Could not set architecture and machine"));
+ }
+
mach_selection_mode = sel;
+ old_cpu = selected_cpu;
}
/* Here ends all the ARCompact extension instruction assembling
fflush (stderr);
}
+/* Helper for parsing an argument, used for sorting out the relocation
+ type. */
+
+static void
+parse_reloc_symbol (expressionS *resultP)
+{
+ char *reloc_name, c, *sym_name;
+ size_t len;
+ int i;
+ const struct arc_reloc_op_tag *r;
+ expressionS right;
+ symbolS *base;
+
+ /* A relocation operand has the following form
+ @identifier@relocation_type. The identifier is already in
+ tok! */
+ if (resultP->X_op != O_symbol)
+ {
+ as_bad (_("No valid label relocation operand"));
+ resultP->X_op = O_illegal;
+ return;
+ }
+
+ /* Parse @relocation_type. */
+ input_line_pointer++;
+ c = get_symbol_name (&reloc_name);
+ len = input_line_pointer - reloc_name;
+ if (len == 0)
+ {
+ as_bad (_("No relocation operand"));
+ resultP->X_op = O_illegal;
+ return;
+ }
+
+ /* Go through known relocation and try to find a match. */
+ r = &arc_reloc_op[0];
+ for (i = arc_num_reloc_op - 1; i >= 0; i--, r++)
+ if (len == r->length
+ && memcmp (reloc_name, r->name, len) == 0)
+ break;
+ if (i < 0)
+ {
+ as_bad (_("Unknown relocation operand: @%s"), reloc_name);
+ resultP->X_op = O_illegal;
+ return;
+ }
+
+ *input_line_pointer = c;
+ SKIP_WHITESPACE_AFTER_NAME ();
+ /* Extra check for TLS: base. */
+ if (*input_line_pointer == '@')
+ {
+ if (resultP->X_op_symbol != NULL
+ || resultP->X_op != O_symbol)
+ {
+ as_bad (_("Unable to parse TLS base: %s"),
+ input_line_pointer);
+ resultP->X_op = O_illegal;
+ return;
+ }
+ input_line_pointer++;
+ c = get_symbol_name (&sym_name);
+ base = symbol_find_or_make (sym_name);
+ resultP->X_op = O_subtract;
+ resultP->X_op_symbol = base;
+ restore_line_pointer (c);
+ right.X_add_number = 0;
+ }
+
+ if ((*input_line_pointer != '+')
+ && (*input_line_pointer != '-'))
+ right.X_add_number = 0;
+ else
+ {
+ /* Parse the constant of a complex relocation expression
+ like @identifier@reloc +/- const. */
+ if (! r->complex_expr)
+ {
+ as_bad (_("@%s is not a complex relocation."), r->name);
+ resultP->X_op = O_illegal;
+ return;
+ }
+ expression (&right);
+ if (right.X_op != O_constant)
+ {
+ as_bad (_("Bad expression: @%s + %s."),
+ r->name, input_line_pointer);
+ resultP->X_op = O_illegal;
+ return;
+ }
+ }
+
+ resultP->X_md = r->op;
+ resultP->X_add_number = right.X_add_number;
+}
+
/* Parse the arguments to an opcode. */
static int
bfd_boolean saw_arg = FALSE;
int brk_lvl = 0;
int num_args = 0;
- int i;
- size_t len;
- const struct arc_reloc_op_tag *r;
- expressionS tmpE;
- char *reloc_name, c;
memset (tok, 0, sizeof (*tok) * ntok);
goto err;
/* Parse @label. */
+ input_line_pointer++;
tok->X_op = O_symbol;
tok->X_md = O_absent;
expression (tok);
- if (*input_line_pointer != '@')
- goto normalsymbol; /* This is not a relocation. */
-
- relocationsym:
-
- /* A relocation operand has the following form
- @identifier@relocation_type. The identifier is already
- in tok! */
- if (tok->X_op != O_symbol)
- {
- as_bad (_("No valid label relocation operand"));
- goto err;
- }
- /* Parse @relocation_type. */
- input_line_pointer++;
- c = get_symbol_name (&reloc_name);
- len = input_line_pointer - reloc_name;
- if (len == 0)
- {
- as_bad (_("No relocation operand"));
- goto err;
- }
-
- /* Go through known relocation and try to find a match. */
- r = &arc_reloc_op[0];
- for (i = arc_num_reloc_op - 1; i >= 0; i--, r++)
- if (len == r->length
- && memcmp (reloc_name, r->name, len) == 0)
- break;
- if (i < 0)
- {
- as_bad (_("Unknown relocation operand: @%s"), reloc_name);
- goto err;
- }
-
- *input_line_pointer = c;
- SKIP_WHITESPACE_AFTER_NAME ();
- /* Extra check for TLS: base. */
if (*input_line_pointer == '@')
- {
- symbolS *base;
- if (tok->X_op_symbol != NULL
- || tok->X_op != O_symbol)
- {
- as_bad (_("Unable to parse TLS base: %s"),
- input_line_pointer);
- goto err;
- }
- input_line_pointer++;
- char *sym_name;
- c = get_symbol_name (&sym_name);
- base = symbol_find_or_make (sym_name);
- tok->X_op = O_subtract;
- tok->X_op_symbol = base;
- restore_line_pointer (c);
- tmpE.X_add_number = 0;
- }
- if ((*input_line_pointer != '+')
- && (*input_line_pointer != '-'))
- {
- tmpE.X_add_number = 0;
- }
- else
- {
- /* Parse the constant of a complex relocation expression
- like @identifier@reloc +/- const. */
- if (! r->complex_expr)
- {
- as_bad (_("@%s is not a complex relocation."), r->name);
- goto err;
- }
- expression (&tmpE);
- if (tmpE.X_op != O_constant)
- {
- as_bad (_("Bad expression: @%s + %s."),
- r->name, input_line_pointer);
- goto err;
- }
- }
-
- tok->X_md = r->op;
- tok->X_add_number = tmpE.X_add_number;
+ parse_reloc_symbol (tok);
debug_exp (tok);
+ if (tok->X_op == O_illegal
+ || tok->X_op == O_absent
+ || num_args == ntok)
+ goto err;
+
saw_comma = FALSE;
saw_arg = TRUE;
tok++;
identifier@relocation_type, if it is the case parse the
relocation type as well. */
if (*input_line_pointer == '@')
- goto relocationsym;
+ parse_reloc_symbol (tok);
- normalsymbol:
debug_exp (tok);
if (tok->X_op == O_illegal
case O_symbol:
{
const char *p;
+ char *tmpp, *pp;
const struct arc_aux_reg *auxr;
if (opcode->insn_class != AUXREG)
goto de_fault;
p = S_GET_NAME (tok[tokidx].X_add_symbol);
- auxr = hash_find (arc_aux_hash, p);
+ /* For compatibility reasons, an aux register can
+ be spelled with upper or lower case
+ letters. */
+ tmpp = strdup (p);
+ for (pp = tmpp; *pp; ++pp) *pp = TOLOWER (*pp);
+
+ auxr = hash_find (arc_aux_hash, tmpp);
if (auxr)
{
/* We modify the token array here, safe in the
tok[tokidx].X_add_number = auxr->address;
ARC_SET_FLAG (tok[tokidx].X_add_symbol, ARC_FLAG_AUX);
}
+ free (tmpp);
if (tok[tokidx].X_op != O_constant)
goto de_fault;
default:
break;
}
+
+ switch (tok[i].X_op)
+ {
+ case O_register:
+ if ((tok[i].X_add_number >= 4 && tok[i].X_add_number <= 9)
+ || (tok[i].X_add_number >= 16 && tok[i].X_add_number <= 25))
+ rf16_only = FALSE;
+ break;
+ default:
+ break;
+ }
}
}
md_section_align (segT segment,
valueT size)
{
- int align = bfd_get_section_alignment (stdoutput, segment);
+ int align = bfd_section_alignment (segment);
return ((size + (1 << align) - 1) & (-((valueT) 1 << align)));
}
int size, fix;
struct arc_relax_type *relax_arg = &fragP->tc_frag_data;
- fix = (fragP->fr_fix < 0 ? 0 : fragP->fr_fix);
+ fix = fragP->fr_fix;
dest = fragP->fr_literal + fix;
table_entry = TC_GENERIC_RELAX_TABLE + fragP->fr_subtype;
GOTPC reference to _GLOBAL_OFFSET_TABLE_. */
if (((*name == '_')
&& (*(name+1) == 'G')
- && (strcmp (name, GLOBAL_OFFSET_TABLE_NAME) == 0))
- || ((*name == '_')
- && (*(name+1) == 'D')
- && (strcmp (name, DYNAMIC_STRUCT_NAME) == 0)))
+ && (strcmp (name, GLOBAL_OFFSET_TABLE_NAME) == 0)))
{
if (!GOT_symbol)
{
/* Called for any expression that can not be recognized. When the
function is called, `input_line_pointer' will point to the start of
- the expression. */
+ the expression. We use it when we have complex operations like
+ @label1 - @label2. */
void
-md_operand (expressionS *expressionP ATTRIBUTE_UNUSED)
+md_operand (expressionS *expressionP)
{
char *p = input_line_pointer;
if (*p == '@')
{
input_line_pointer++;
expressionP->X_op = O_symbol;
+ expressionP->X_md = O_absent;
expression (expressionP);
}
}
if (!assembling_insn)
return FALSE;
- if (e->X_op == O_symbol)
+ if (e->X_op == O_symbol
+ && e->X_md == O_absent)
return FALSE;
sym = hash_find (arc_reg_hash, name);
as_bad (_("Insn %s has a jump/branch instruction %s in its delay slot."),
arc_last_insns[1].opcode->name,
arc_last_insns[0].opcode->name);
+ if (arc_last_insns[1].has_delay_slot
+ && arc_last_insns[0].has_limm)
+ as_bad (_("Insn %s has an instruction %s with limm in its delay slot."),
+ arc_last_insns[1].opcode->name,
+ arc_last_insns[0].opcode->name);
}
void
if (*r_type_p == BFD_RELOC_32
&& exp->X_op == O_subtract
&& exp->X_op_symbol != NULL
- && exp->X_op_symbol->bsym->section == now_seg)
+ && S_GET_SEGMENT (exp->X_op_symbol) == now_seg)
*r_type_p = BFD_RELOC_ARC_32_PCREL;
}
insn_name = xstrdup (p);
restore_line_pointer (c);
+ /* Convert to lower case. */
+ for (p = insn_name; *p; ++p)
+ *p = TOLOWER (*p);
+
/* 2nd: get major opcode. */
if (*input_line_pointer != ',')
{
if (!arcext_section)
{
arcext_section = subseg_new (".arcextmap", 0);
- bfd_set_section_flags (stdoutput, arcext_section,
- SEC_READONLY | SEC_HAS_CONTENTS);
+ bfd_set_section_flags (arcext_section, SEC_READONLY | SEC_HAS_CONTENTS);
}
else
subseg_set (arcext_section, 0);
/* Tag_ARC_ABI_tls. */
arc_set_attribute_int (Tag_ARC_ABI_tls, tls_option);
+
+ /* Tag_ARC_ATR_version. */
+ arc_set_attribute_int (Tag_ARC_ATR_version, 1);
+
+ /* Tag_ARC_ABI_rf16. */
+ if (attributes_set_explicitly[Tag_ARC_ABI_rf16]
+ && bfd_elf_get_obj_attr_int (stdoutput, OBJ_ATTR_PROC,
+ Tag_ARC_ABI_rf16)
+ && !rf16_only)
+ {
+ as_warn (_("Overwrite explicitly set Tag_ARC_ABI_rf16 to full "
+ "register file"));
+ bfd_elf_add_proc_attr_int (stdoutput, Tag_ARC_ABI_rf16, 0);
+ }
}
/* Add the default contents for the .ARC.attributes section. */
T (Tag_ARC_ABI_double_size),
T (Tag_ARC_ISA_config),
T (Tag_ARC_ISA_apex),
- T (Tag_ARC_ISA_mpy_option)
+ T (Tag_ARC_ISA_mpy_option),
+ T (Tag_ARC_ATR_version)
#undef T
};
unsigned int i;
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