Fix region length calculations when regions end with .align padding.

[deliverable/binutils-gdb.git] / gas / config / tc-arm.c

diff --git a/gas/config/tc-arm.c b/gas/config/tc-arm.c
index 85afdc28d7b6fe79944c1e6ba34e7d4cb1548868..aef76e7c0cecda6f38cf2c2d43752f96528b6052 100644 (file)
--- a/gas/config/tc-arm.c
+++ b/gas/config/tc-arm.c
@@ -929,7 +929,8 @@ static void do_vfp_sp_dyadic        PARAMS ((char *));
 static void do_vfp_dp_dyadic   PARAMS ((char *));
 static void do_vfp_reg_from_sp  PARAMS ((char *));
 static void do_vfp_sp_from_reg  PARAMS ((char *));
-static void do_vfp_sp_reg2     PARAMS ((char *));
+static void do_vfp_reg2_from_sp2 PARAMS ((char *));
+static void do_vfp_sp2_from_reg2 PARAMS ((char *));
 static void do_vfp_reg_from_dp  PARAMS ((char *));
 static void do_vfp_reg2_from_dp PARAMS ((char *));
 static void do_vfp_dp_from_reg  PARAMS ((char *));
@@ -1976,8 +1977,8 @@ static const struct asm_opcode insns[] =
   {"fcmpezd", 0xeeb50bc0, 7, FPU_VFP_EXT_V1,   do_vfp_dp_compare_z},
 
   /* VFP V2.  */
-  {"fmsrr",   0xec400a10, 5, FPU_VFP_EXT_V2,   do_vfp_sp_reg2},
-  {"fmrrs",   0xec500a10, 5, FPU_VFP_EXT_V2,   do_vfp_sp_reg2},
+  {"fmsrr",   0xec400a10, 5, FPU_VFP_EXT_V2,   do_vfp_sp2_from_reg2},
+  {"fmrrs",   0xec500a10, 5, FPU_VFP_EXT_V2,   do_vfp_reg2_from_sp2},
   {"fmdrr",   0xec400b10, 5, FPU_VFP_EXT_V2,   do_vfp_dp_from_reg2},
   {"fmrrd",   0xec500b10, 5, FPU_VFP_EXT_V2,   do_vfp_reg2_from_dp},
 
@@ -7299,7 +7300,9 @@ do_adr (str)
   /* Frag hacking will turn this into a sub instruction if the offset turns
      out to be negative.  */
   inst.reloc.type = BFD_RELOC_ARM_IMMEDIATE;
+#ifndef TE_WINCE
   inst.reloc.exp.X_add_number -= 8; /* PC relative adjust.  */
+#endif
   inst.reloc.pc_rel = 1;
 
   end_of_line (str);
@@ -7330,7 +7333,9 @@ do_adrl (str)
   /* Frag hacking will turn this into a sub instruction if the offset turns
      out to be negative.  */
   inst.reloc.type              = BFD_RELOC_ARM_ADRL_IMMEDIATE;
+#ifndef TE_WINCE  
   inst.reloc.exp.X_add_number -= 8; /* PC relative adjust  */
+#endif
   inst.reloc.pc_rel            = 1;
   inst.size                    = INSN_SIZE * 2;
 }
@@ -8950,15 +8955,13 @@ do_vfp_reg_from_sp (str)
 }
 
 static void
-do_vfp_sp_reg2 (str)
+do_vfp_reg2_from_sp2 (str)
      char *str;
 {
   skip_whitespace (str);
 
-  if (reg_required_here (&str, 12) == FAIL)
-    return;
-
-  if (skip_past_comma (&str) == FAIL
+  if (reg_required_here (&str, 12) == FAIL
+      || skip_past_comma (&str) == FAIL
       || reg_required_here (&str, 16) == FAIL
       || skip_past_comma (&str) == FAIL)
     {
@@ -8997,6 +9000,32 @@ do_vfp_sp_from_reg (str)
   end_of_line (str);
 }
 
+static void
+do_vfp_sp2_from_reg2 (str)
+     char *str;
+{
+  skip_whitespace (str);
+
+  /* We require exactly two consecutive SP registers.  */
+  if (vfp_sp_reg_list (&str, VFP_REG_Sm) != 2)
+    {
+      if (! inst.error)
+       inst.error = _("only two consecutive VFP SP registers allowed here");
+    }
+
+  if (skip_past_comma (&str) == FAIL
+      || reg_required_here (&str, 12) == FAIL
+      || skip_past_comma (&str) == FAIL
+      || reg_required_here (&str, 16) == FAIL)
+    {
+      if (! inst.error)
+       inst.error = BAD_ARGS;
+      return;
+    }
+
+  end_of_line (str);
+}
+
 static void
 do_vfp_reg_from_dp (str)
      char *str;
@@ -9071,7 +9100,7 @@ do_vfp_dp_from_reg2 (str)
   if (skip_past_comma (&str) == FAIL
       || reg_required_here (&str, 12) == FAIL
       || skip_past_comma (&str) == FAIL
-      || reg_required_here (&str, 16))
+      || reg_required_here (&str, 16) == FAIL)
     {
       if (! inst.error)
        inst.error = BAD_ARGS;
@@ -12794,6 +12823,16 @@ tc_gen_reloc (section, fixp)
       return NULL;
 
     case BFD_RELOC_ARM_OFFSET_IMM:
+      if (fixp->fx_addsy != NULL
+         && !S_IS_DEFINED (fixp->fx_addsy)
+         && S_IS_LOCAL (fixp->fx_addsy))
+       {
+         as_bad_where (fixp->fx_file, fixp->fx_line,
+                       _("undefined local label `%s'"),
+                       S_GET_NAME (fixp->fx_addsy));
+         return NULL;
+       }
+
       as_bad_where (fixp->fx_file, fixp->fx_line,
                    _("internal_relocation (type: OFFSET_IMM) not fixed up"));
       return NULL;
@@ -13287,6 +13326,7 @@ static struct arm_cpu_option_table arm_cpus[] =
   {"arm9e-r0",         ARM_ARCH_V5TExP, FPU_ARCH_VFP_V2},
   {"arm9e",            ARM_ARCH_V5TE,   FPU_ARCH_VFP_V2},
   {"arm926ej",         ARM_ARCH_V5TEJ,  FPU_ARCH_VFP_V2},
+  {"arm926ejs",                ARM_ARCH_V5TEJ,  FPU_ARCH_VFP_V2},
   {"arm946e-r0",       ARM_ARCH_V5TExP, FPU_ARCH_VFP_V2},
   {"arm946e",          ARM_ARCH_V5TE,   FPU_ARCH_VFP_V2},
   {"arm966e-r0",       ARM_ARCH_V5TExP, FPU_ARCH_VFP_V2},
@@ -13296,6 +13336,7 @@ static struct arm_cpu_option_table arm_cpus[] =
   {"arm1020",          ARM_ARCH_V5TE,   FPU_ARCH_VFP_V2},
   {"arm1020t",         ARM_ARCH_V5T,    FPU_ARCH_VFP_V1},
   {"arm1020e",         ARM_ARCH_V5TE,   FPU_ARCH_VFP_V2},
+  {"arm1026ejs",       ARM_ARCH_V5TE,   FPU_ARCH_VFP_V2},
   {"arm1136js",                ARM_ARCH_V6,     FPU_NONE},
   {"arm1136jfs",       ARM_ARCH_V6,     FPU_ARCH_VFP_V2},
   /* ??? XSCALE is really an architecture.  */
@@ -13337,6 +13378,7 @@ static struct arm_arch_option_table arm_archs[] =
   {"armv5texp",                ARM_ARCH_V5TExP, FPU_ARCH_VFP},
   {"armv5tej",         ARM_ARCH_V5TEJ,  FPU_ARCH_VFP},
   {"armv6",             ARM_ARCH_V6,     FPU_ARCH_VFP},
+  {"armv6j",            ARM_ARCH_V6,     FPU_ARCH_VFP},
   {"xscale",           ARM_ARCH_XSCALE, FPU_ARCH_VFP},
   {"iwmmxt",           ARM_ARCH_IWMMXT, FPU_ARCH_VFP},
   {NULL, 0, 0}