/* tc-bfin.c -- Assembler for the ADI Blackfin.
- Copyright 2005, 2006, 2007, 2008, 2009
- Free Software Foundation, Inc.
+ Copyright (C) 2005-2020 Free Software Foundation, Inc.
This file is part of GAS, the GNU Assembler.
02110-1301, USA. */
#include "as.h"
-#include "struc-symbol.h"
#include "bfin-defs.h"
#include "obstack.h"
#include "safe-ctype.h"
#ifdef OBJ_ELF
#include "dwarf2dbg.h"
#endif
-#include "libbfd.h"
#include "elf/common.h"
#include "elf/bfin.h"
static void
bfin_s_bss (int ignore ATTRIBUTE_UNUSED)
{
- register int temp;
+ int temp;
temp = get_absolute_expression ();
subseg_set (bss_section, (subsegT) temp);
};
/* Characters that are used to denote comments and line separators. */
-const char comment_chars[] = "";
+const char comment_chars[] = "#";
const char line_comment_chars[] = "#";
const char line_separator_chars[] = ";";
BFIN_CPU_BF548M,
BFIN_CPU_BF549,
BFIN_CPU_BF549M,
- BFIN_CPU_BF561
+ BFIN_CPU_BF561,
+ BFIN_CPU_BF592,
} bfin_cpu_t;
bfin_cpu_t bfin_cpu_type = BFIN_CPU_UNKNOWN;
{"bf506", BFIN_CPU_BF506, 0x0000, AC_05000074},
+ {"bf512", BFIN_CPU_BF512, 0x0002, AC_05000074},
{"bf512", BFIN_CPU_BF512, 0x0001, AC_05000074},
{"bf512", BFIN_CPU_BF512, 0x0000, AC_05000074},
+ {"bf514", BFIN_CPU_BF514, 0x0002, AC_05000074},
{"bf514", BFIN_CPU_BF514, 0x0001, AC_05000074},
{"bf514", BFIN_CPU_BF514, 0x0000, AC_05000074},
+ {"bf516", BFIN_CPU_BF516, 0x0002, AC_05000074},
{"bf516", BFIN_CPU_BF516, 0x0001, AC_05000074},
{"bf516", BFIN_CPU_BF516, 0x0000, AC_05000074},
+ {"bf518", BFIN_CPU_BF518, 0x0002, AC_05000074},
{"bf518", BFIN_CPU_BF518, 0x0001, AC_05000074},
{"bf518", BFIN_CPU_BF518, 0x0000, AC_05000074},
{"bf542m", BFIN_CPU_BF542M, 0x0003, AC_05000074},
+ {"bf542", BFIN_CPU_BF542, 0x0004, AC_05000074},
{"bf542", BFIN_CPU_BF542, 0x0002, AC_05000074},
{"bf542", BFIN_CPU_BF542, 0x0001, AC_05000074},
{"bf542", BFIN_CPU_BF542, 0x0000, AC_05000074},
{"bf544m", BFIN_CPU_BF544M, 0x0003, AC_05000074},
+ {"bf544", BFIN_CPU_BF544, 0x0004, AC_05000074},
{"bf544", BFIN_CPU_BF544, 0x0002, AC_05000074},
{"bf544", BFIN_CPU_BF544, 0x0001, AC_05000074},
{"bf544", BFIN_CPU_BF544, 0x0000, AC_05000074},
{"bf547m", BFIN_CPU_BF547M, 0x0003, AC_05000074},
+ {"bf547", BFIN_CPU_BF547, 0x0004, AC_05000074},
{"bf547", BFIN_CPU_BF547, 0x0002, AC_05000074},
{"bf547", BFIN_CPU_BF547, 0x0001, AC_05000074},
{"bf547", BFIN_CPU_BF547, 0x0000, AC_05000074},
{"bf548m", BFIN_CPU_BF548M, 0x0003, AC_05000074},
+ {"bf548", BFIN_CPU_BF548, 0x0004, AC_05000074},
{"bf548", BFIN_CPU_BF548, 0x0002, AC_05000074},
{"bf548", BFIN_CPU_BF548, 0x0001, AC_05000074},
{"bf548", BFIN_CPU_BF548, 0x0000, AC_05000074},
{"bf549m", BFIN_CPU_BF549M, 0x0003, AC_05000074},
+ {"bf549", BFIN_CPU_BF549, 0x0004, AC_05000074},
{"bf549", BFIN_CPU_BF549, 0x0002, AC_05000074},
{"bf549", BFIN_CPU_BF549, 0x0001, AC_05000074},
{"bf549", BFIN_CPU_BF549, 0x0000, AC_05000074},
{"bf561", BFIN_CPU_BF561, 0x0003, AC_05000074},
{"bf561", BFIN_CPU_BF561, 0x0002, AC_05000074},
- {NULL, 0, 0, 0}
+ {"bf592", BFIN_CPU_BF592, 0x0001, AC_05000074},
+ {"bf592", BFIN_CPU_BF592, 0x0000, AC_05000074},
};
/* Define bfin-specific command-line options (there are none). */
int
-md_parse_option (int c ATTRIBUTE_UNUSED, char *arg ATTRIBUTE_UNUSED)
+md_parse_option (int c ATTRIBUTE_UNUSED, const char *arg ATTRIBUTE_UNUSED)
{
switch (c)
{
case OPTION_MCPU:
{
- const char *p, *q;
- int i;
+ const char *q;
+ unsigned int i;
- i = 0;
- while ((p = bfin_cpus[i].name) != NULL)
+ for (i = 0; i < ARRAY_SIZE (bfin_cpus); i++)
{
+ const char *p = bfin_cpus[i].name;
if (strncmp (arg, p, strlen (p)) == 0)
break;
- i++;
}
- if (p == NULL)
+ if (i == ARRAY_SIZE (bfin_cpus))
as_fatal ("-mcpu=%s is not valid", arg);
bfin_cpu_type = bfin_cpus[i].type;
- q = arg + strlen (p);
+ q = arg + strlen (bfin_cpus[i].name);
if (*q == '\0')
{
else if (strcmp (q, "-any") == 0)
{
bfin_si_revision = 0xffff;
- while (bfin_cpus[i].type == bfin_cpu_type)
+ while (i < ARRAY_SIZE (bfin_cpus)
+ && bfin_cpus[i].type == bfin_cpu_type)
{
bfin_anomaly_checks |= bfin_cpus[i].anomaly_checks;
i++;
bfin_si_revision = (si_major << 8) | si_minor;
- while (bfin_cpus[i].type == bfin_cpu_type
+ while (i < ARRAY_SIZE (bfin_cpus)
+ && bfin_cpus[i].type == bfin_cpu_type
&& bfin_cpus[i].si_revision != bfin_si_revision)
i++;
- if (bfin_cpus[i].type != bfin_cpu_type)
+ if (i == ARRAY_SIZE (bfin_cpus)
+ || bfin_cpus[i].type != bfin_cpu_type)
goto invalid_silicon_revision;
bfin_anomaly_checks |= bfin_cpus[i].anomaly_checks;
/* Perform machine-specific initializations. */
void
-md_begin ()
+md_begin (void)
{
/* Set the ELF flags if desired. */
if (bfin_flags)
md_assemble (char *line)
{
char *toP = 0;
- extern char *current_inputline;
int size, insn_size;
struct bfin_insn *tmp_insn;
size_t len;
static size_t buffer_len = 0;
+ static char *current_inputline;
parse_state state;
len = strlen (line);
if (len + 2 > buffer_len)
{
- if (buffer_len > 0)
- free (current_inputline);
buffer_len = len + 40;
- current_inputline = xmalloc (buffer_len);
+ current_inputline = XRESIZEVEC (char, current_inputline, buffer_len);
}
memcpy (current_inputline, line, len);
current_inputline[len] = ';';
/* Round up a section size to the appropriate boundary. */
valueT
-md_section_align (segment, size)
- segT segment;
- valueT size;
+md_section_align (segT segment, valueT size)
{
- int boundary = bfd_get_section_alignment (stdoutput, segment);
- return ((size + (1 << boundary) - 1) & (-1 << boundary));
+ int boundary = bfd_section_alignment (segment);
+ return ((size + (1 << boundary) - 1) & -(1 << boundary));
}
-char *
+const char *
md_atof (int type, char * litP, int * sizeP)
{
return ieee_md_atof (type, litP, sizeP, FALSE);
then it is done here. */
arelent *
-tc_gen_reloc (seg, fixp)
- asection *seg ATTRIBUTE_UNUSED;
- fixS *fixp;
+tc_gen_reloc (asection *seg ATTRIBUTE_UNUSED, fixS *fixp)
{
arelent *reloc;
- reloc = (arelent *) xmalloc (sizeof (arelent));
- reloc->sym_ptr_ptr = (asymbol **) xmalloc (sizeof (asymbol *));
+ reloc = XNEW (arelent);
+ reloc->sym_ptr_ptr = XNEW (asymbol *);
*reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy);
reloc->address = fixp->fx_frag->fr_address + fixp->fx_where;
given a PC relative reloc. */
long
-md_pcrel_from_section (fixP, sec)
- fixS *fixP;
- segT sec;
+md_pcrel_from_section (fixS *fixP, segT sec)
{
if (fixP->fx_addsy != (symbolS *) NULL
&& (!S_IS_DEFINED (fixP->fx_addsy)
INSTR_T
gencode (unsigned long x)
{
- INSTR_T cell = obstack_alloc (&mempool, sizeof (struct bfin_insn));
+ INSTR_T cell = XOBNEW (&mempool, struct bfin_insn);
memset (cell, 0, sizeof (struct bfin_insn));
cell->value = (x);
return cell;
int count_insns;
static void *
-allocate (int n)
+allocate (size_t n)
{
return obstack_alloc (&mempool, n);
}
INSTR_T
Expr_Node_Gen_Reloc (Expr_Node * head, int parent_reloc)
{
- /* Top level reloction expression generator VDSP style.
+ /* Top level relocation expression generator VDSP style.
If the relocation is just by itself, generate one item
else generate this convoluted expression. */
INSTR_T note = NULL_CODE;
INSTR_T note1 = NULL_CODE;
- int pcrel = 1; /* Is the parent reloc pcrelative?
+ int pcrel = 1; /* Is the parent reloc pc-relative?
This calculation here and HOWTO should match. */
if (parent_reloc)
return GEN_OPCODE32 ();
}
+INSTR_T
+bfin_gen_pseudochr (int ch)
+{
+ INIT (PseudoChr);
+
+ ASSIGN (ch);
+
+ return GEN_OPCODE16 ();
+}
+
/* Multiple instruction generation. */
INSTR_T
char *lbeginsym, *lendsym;
Expr_Node_Value lbeginval, lendval;
Expr_Node *lbegin, *lend;
+ symbolS *sym;
loopsym = exp->value.s_value;
lbeginsym = (char *) xmalloc (strlen (loopsym) + strlen ("__BEGIN") + 5);
lbegin = Expr_Node_Create (Expr_Node_Reloc, lbeginval, NULL, NULL);
lend = Expr_Node_Create (Expr_Node_Reloc, lendval, NULL, NULL);
- symbol_remove (symbol_find (loopsym), &symbol_rootP, &symbol_lastP);
+ sym = symbol_find(loopsym);
+ if (!S_IS_LOCAL (sym) || (S_IS_LOCAL (sym) && !symbol_used_p (sym)))
+ symbol_remove (sym, &symbol_rootP, &symbol_lastP);
+
+ return bfin_gen_loopsetup (lbegin, reg, rop, lend, preg);
+}
- return bfin_gen_loopsetup(lbegin, reg, rop, lend, preg);
+void
+bfin_loop_attempt_create_label (Expr_Node *exp, int is_begin)
+{
+ char *name;
+ name = fb_label_name (exp->value.i_value, is_begin);
+ exp->value.s_value = xstrdup (name);
+ exp->type = Expr_Node_Reloc;
}
void
/* LOOP_END follows the last instruction in the loop.
Adjust label address. */
if (!begin)
- ((struct local_symbol *) linelabel)->lsy_value -= last_insn_size;
+ *symbol_X_add_number (linelabel) -= last_insn_size;
}
bfd_boolean
}
bfd_boolean
-bfin_start_label (char *s, char *ptr)
+bfin_start_label (char *s)
{
- while (s != ptr)
+ while (*s != 0)
{
if (*s == '(' || *s == '[')
return FALSE;