tc-cr16.c: Use memmove to concatenate 2 overlapping strings

[deliverable/binutils-gdb.git] / gas / config / tc-cr16.c

diff --git a/gas/config/tc-cr16.c b/gas/config/tc-cr16.c
index 76de462701a2ea7119ba8211c13a290d433192e6..951e9ac7f38ec558f56236fa84ad10f3f69ce3dc 100644 (file)
--- a/gas/config/tc-cr16.c
+++ b/gas/config/tc-cr16.c
@@ -1,5 +1,5 @@
 /* tc-cr16.c -- Assembler code for the CR16 CPU core.
-   Copyright (C) 2007-2017 Free Software Foundation, Inc.
+   Copyright (C) 2007-2020 Free Software Foundation, Inc.
 
    Contributed by M R Swami Reddy <MR.Swami.Reddy@nsc.com>
 
@@ -178,7 +178,12 @@ l_cons (int nbytes)
               if ((width = exp.X_add_number) >
                   (unsigned int)(BITS_PER_CHAR * nbytes))
                 {
-                  as_warn (_("field width %lu too big to fit in %d bytes: truncated to %d bits"), width, nbytes, (BITS_PER_CHAR * nbytes));
+                 as_warn (ngettext ("field width %lu too big to fit in %d"
+                                    " byte: truncated to %d bits",
+                                    "field width %lu too big to fit in %d"
+                                    " bytes: truncated to %d bits",
+                                    nbytes),
+                          width, nbytes, (BITS_PER_CHAR * nbytes));
                   width = BITS_PER_CHAR * nbytes;
                 }                   /* Too big.  */
 
@@ -334,7 +339,7 @@ get_register_pair (char *reg_name)
   const reg_entry *rreg;
   char tmp_rp[16]="\0";
 
-  /* Add '(' and ')' to the reg pair, if its not present.  */
+  /* Add '(' and ')' to the reg pair, if it's not present.  */
   if (reg_name[0] != '(')
     {
       tmp_rp[0] = '(';
@@ -637,7 +642,7 @@ md_convert_frag (bfd *abfd ATTRIBUTE_UNUSED, asection *sec, fragS *fragP)
 {
   /* 'opcode' points to the start of the instruction, whether
      we need to change the instruction's fixed encoding.  */
-  char *opcode = fragP->fr_literal + fragP->fr_fix;
+  char *opcode = &fragP->fr_literal[0] + fragP->fr_fix;
   bfd_reloc_code_real_type reloc;
 
   subseg_change (sec, 0);
@@ -1119,8 +1124,7 @@ getreg_image (reg r)
 /* Issue a error message when register is illegal.  */
 #define IMAGE_ERR \
   as_bad (_("Illegal register (`%s') in Instruction: `%s'"), \
-            reg_name, ins_parse);                            \
-  break;
+         reg_name, ins_parse);
 
   switch (rreg->type)
     {
@@ -1129,6 +1133,7 @@ getreg_image (reg r)
         return rreg->image;
       else
         IMAGE_ERR;
+      break;
 
     case CR16_P_REGTYPE:
       return rreg->image;
@@ -1136,6 +1141,7 @@ getreg_image (reg r)
 
     default:
       IMAGE_ERR;
+      break;
     }
 
   return 0;
@@ -1153,8 +1159,8 @@ getreg_image (reg r)
 static void
 set_operand (char *operand, ins * cr16_ins)
 {
-  char *operandS; /* Pointer to start of sub-opearand.  */
-  char *operandE; /* Pointer to end of sub-opearand.  */
+  char *operandS; /* Pointer to start of sub-operand.  */
+  char *operandE; /* Pointer to end of sub-operand.  */
 
   argument *cur_arg = &cr16_ins->arg[cur_arg_num]; /* Current argument.  */
 
@@ -1654,7 +1660,7 @@ getidxregp_image (reg r)
   return 0;
 }
 
-/* Retrieve the opcode image of a given processort register.
+/* Retrieve the opcode image of a given processor register.
    If the register is illegal for the current instruction,
    issue an error.  */
 static int
@@ -1692,7 +1698,7 @@ getprocreg_image (int r)
   return 0;
 }
 
-/* Retrieve the opcode image of a given processort register.
+/* Retrieve the opcode image of a given processor register.
    If the register is illegal for the current instruction,
    issue an error.  */
 static int
@@ -1846,7 +1852,7 @@ print_constant (int nbits, int shift, argument *arg)
       /* When instruction size is 3 and 'shift' is 16, a 16-bit constant is
          always filling the upper part of output_opcode[1]. If we mistakenly
          write it to output_opcode[0], the constant prefix (that is, 'match')
-         will be overriden.
+         will be overridden.
          0        1         2         3
          +---------+---------+---------+---------+
          | 'match' |         | X X X X |         |
@@ -2002,7 +2008,7 @@ check_range (long *num, int bits, int unsigned flags, int update)
 
   if (bits == 0 && value > 0) return OP_OUT_OF_RANGE;
 
-  /* For hosts witah longs bigger than 32-bits make sure that the top
+  /* For hosts with longs bigger than 32-bits make sure that the top
      bits of a 32-bit negative value read in by the parser are set,
      so that the correct comparisons are made.  */
   if (value & 0x80000000)
@@ -2085,7 +2091,7 @@ check_range (long *num, int bits, int unsigned flags, int update)
    return retval;
 }
 
-/* Bunch of error checkings.
+/* Bunch of error checking.
    The checks are made after a matching instruction was found.  */
 
 static void
@@ -2108,7 +2114,7 @@ warn_if_needed (ins *insn)
     {
       unsigned int count = insn->arg[0].constant, reg_val;
 
-      /* Check if count operand caused to save/retrive the RA twice
+      /* Check if count operand caused to save/retrieve the RA twice
          to generate warning message.  */
      if (insn->nargs > 2)
        {
@@ -2289,7 +2295,7 @@ assemble_insn (const char *mnemonic, ins *insn)
             goto next_insn;
 
           /* If 'storb' instruction with 'sp' reg and 16-bit disp of
-           * reg-pair, leads to undifined trap, so this should use
+           * reg-pair, leads to undefined trap, so this should use
            * 20-bit disp of reg-pair.  */
           if (IS_INSN_MNEMONIC ("storb") && (instruction->size == 2)
               && (insn->arg[i].r == 15) && (insn->arg[i + 1].type == arg_crp))
@@ -2323,8 +2329,8 @@ assemble_insn (const char *mnemonic, ins *insn)
       match = 1;
       break;
 
-/* Try again with next instruction.  */
-next_insn:
+      /* Try again with next instruction.  */
+    next_insn:
       instruction++;
     }
 
@@ -2356,7 +2362,7 @@ next_insn:
   else
     /* Full match - print the encoding to output file.  */
     {
-      /* Make further checkings (such that couldn't be made earlier).
+      /* Make further checking (such that couldn't be made earlier).
          Warn the user if necessary.  */
       warn_if_needed (insn);
 
@@ -2538,7 +2544,7 @@ md_assemble (char *op)
     ;
   *param++ = '\0';
 
-  /* bCC instuctions and adjust the mnemonic by adding extra white spaces.  */
+  /* bCC instructions and adjust the mnemonic by adding extra white spaces.  */
   if (is_bcc_insn (op))
     {
       strcpy (param1, get_b_cc (op));
@@ -2554,13 +2560,16 @@ md_assemble (char *op)
   if (streq ("cinv", op))
     {
      /* Validate the cinv options.  */
+      unsigned int op_len, param_len;
       check_cinv_options (param);
-      strcat (op, param);
+      op_len = strlen (op);
+      param_len = strlen (param) + 1;
+      memmove (op + op_len, param, param_len);
     }
 
   /* MAPPING - SHIFT INSN, if imm4/imm16 positive values
      lsh[b/w] imm4/imm6, reg ==> ashu[b/w] imm4/imm16, reg
-     as CR16 core doesn't support lsh[b/w] right shift operaions.  */
+     as CR16 core doesn't support lsh[b/w] right shift operations.  */
   if ((streq ("lshb", op) || streq ("lshw", op) || streq ("lshd", op))
       && (param [0] == '$'))
     {