/* tc-i386.h -- Header file for tc-i386.c
- Copyright (C) 1989, 92, 93, 94, 95, 96, 97, 98, 99, 2000, 2001
- Free Software Foundation.
+ Copyright 1989, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000,
+ 2001, 2002, 2003, 2004, 2005, 2006, 2007
+ Free Software Foundation, Inc.
This file is part of GAS, the GNU Assembler.
You should have received a copy of the GNU General Public License
along with GAS; see the file COPYING. If not, write to the Free
- Software Foundation, 59 Temple Place - Suite 330, Boston, MA
- 02111-1307, USA. */
+ Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA
+ 02110-1301, USA. */
#ifndef TC_I386
#define TC_I386 1
-#ifdef ANSI_PROTOTYPES
struct fix;
-#endif
#define TARGET_BYTES_BIG_ENDIAN 0
-#ifdef TE_LYNX
-#define TARGET_FORMAT "coff-i386-lynx"
-#endif
-
-#ifdef BFD_ASSEMBLER
-/* This is used to determine relocation types in tc-i386.c. The first
- parameter is the current relocation type, the second one is the desired
- type. The idea is that if the original type is already some kind of PIC
- relocation, we leave it alone, otherwise we give it the desired type */
-
-#define tc_fix_adjustable(X) tc_i386_fix_adjustable(X)
-extern int tc_i386_fix_adjustable PARAMS ((struct fix *));
-
-#if (defined (OBJ_MAYBE_ELF) || defined (OBJ_ELF) || defined (OBJ_MAYBE_COFF) || defined (OBJ_COFF)) && !defined (TE_PE)
-/* This arranges for gas/write.c to not apply a relocation if
- tc_fix_adjustable() says it is not adjustable.
- The "! symbol_used_in_reloc_p" test is there specifically to cover
- the case of non-global symbols in linkonce sections. It's the
- generally correct thing to do though; If a reloc is going to be
- emitted against a symbol then we don't want to adjust the fixup by
- applying the reloc during assembly. The reloc will be applied by
- the linker during final link. */
-#define TC_FIX_ADJUSTABLE(fixP) \
- (! symbol_used_in_reloc_p ((fixP)->fx_addsy) && tc_fix_adjustable (fixP))
-#endif
-
-/* This expression evaluates to false if the relocation is for a local object
- for which we still want to do the relocation at runtime. True if we
- are willing to perform this relocation while building the .o file.
- This is only used for pcrel relocations, so GOTOFF does not need to be
- checked here. I am not sure if some of the others are ever used with
- pcrel, but it is easier to be safe than sorry. */
-
-#define TC_RELOC_RTSYM_LOC_FIXUP(FIX) \
- ((FIX)->fx_r_type != BFD_RELOC_386_PLT32 \
- && (FIX)->fx_r_type != BFD_RELOC_386_GOT32 \
- && (FIX)->fx_r_type != BFD_RELOC_386_GOTPC \
- && ((FIX)->fx_addsy == NULL \
- || (! S_IS_EXTERNAL ((FIX)->fx_addsy) \
- && ! S_IS_WEAK ((FIX)->fx_addsy) \
- && S_IS_DEFINED ((FIX)->fx_addsy) \
- && ! S_IS_COMMON ((FIX)->fx_addsy))))
-
#define TARGET_ARCH bfd_arch_i386
+#define TARGET_MACH (i386_mach ())
+extern unsigned long i386_mach (void);
+#ifdef TE_FreeBSD
+#define AOUT_TARGET_FORMAT "a.out-i386-freebsd"
+#endif
#ifdef TE_NetBSD
#define AOUT_TARGET_FORMAT "a.out-i386-netbsd"
#endif
#define AOUT_TARGET_FORMAT "a.out-i386"
#endif
+#ifdef TE_FreeBSD
+#define ELF_TARGET_FORMAT "elf32-i386-freebsd"
+#define ELF_TARGET_FORMAT64 "elf64-x86-64-freebsd"
+#elif defined (TE_VXWORKS)
+#define ELF_TARGET_FORMAT "elf32-i386-vxworks"
+#endif
+
+#ifndef ELF_TARGET_FORMAT
+#define ELF_TARGET_FORMAT "elf32-i386"
+#endif
+
+#ifndef ELF_TARGET_FORMAT64
+#define ELF_TARGET_FORMAT64 "elf64-x86-64"
+#endif
+
#if ((defined (OBJ_MAYBE_COFF) && defined (OBJ_MAYBE_AOUT)) \
|| defined (OBJ_ELF) || defined (OBJ_MAYBE_ELF))
-extern const char *i386_target_format PARAMS ((void));
+extern const char *i386_target_format (void);
#define TARGET_FORMAT i386_target_format ()
#else
#ifdef OBJ_ELF
-#define TARGET_FORMAT "elf32-i386"
+#define TARGET_FORMAT ELF_TARGET_FORMAT
#endif
#ifdef OBJ_AOUT
#define TARGET_FORMAT AOUT_TARGET_FORMAT
#endif
#endif
-#else /* ! BFD_ASSEMBLER */
-
-/* COFF STUFF */
-
-#define COFF_MAGIC I386MAGIC
-#define BFD_ARCH bfd_arch_i386
-#define COFF_FLAGS F_AR32WR
-#define TC_COUNT_RELOC(x) ((x)->fx_addsy || (x)->fx_r_type==7)
-#define TC_COFF_FIX2RTYPE(fixP) tc_coff_fix2rtype(fixP)
-extern short tc_coff_fix2rtype PARAMS ((struct fix *));
-#define TC_COFF_SIZEMACHDEP(frag) tc_coff_sizemachdep(frag)
-extern int tc_coff_sizemachdep PARAMS ((fragS *frag));
-
-#ifdef TE_GO32
-/* DJGPP now expects some sections to be 2**4 aligned. */
-#define SUB_SEGMENT_ALIGN(SEG) \
- ((strcmp (obj_segment_name (SEG), ".text") == 0 \
- || strcmp (obj_segment_name (SEG), ".data") == 0 \
- || strcmp (obj_segment_name (SEG), ".bss") == 0 \
- || strncmp (obj_segment_name (SEG), ".gnu.linkonce.t", 15) == 0 \
- || strncmp (obj_segment_name (SEG), ".gnu.linkonce.d", 15) == 0 \
- || strncmp (obj_segment_name (SEG), ".gnu.linkonce.r", 15) == 0) \
- ? 4 \
- : 2)
-#else
-#define SUB_SEGMENT_ALIGN(SEG) 2
+#if (defined (OBJ_MAYBE_ELF) || defined (OBJ_ELF))
+#define md_end i386_elf_emit_arch_note
+extern void i386_elf_emit_arch_note (void);
#endif
-#define TC_RVA_RELOC 7
-/* Need this for PIC relocations */
-#define NEED_FX_R_TYPE
-
-#ifdef TE_386BSD
-/* The BSDI linker apparently rejects objects with a machine type of
- M_386 (100). */
-#define AOUT_MACHTYPE 0
-#else
-#define AOUT_MACHTYPE 100
-#endif
-
-#undef REVERSE_SORT_RELOCS
-
-#endif /* ! BFD_ASSEMBLER */
-
-#define TC_FORCE_RELOCATION(fixp) tc_i386_force_relocation(fixp)
-extern int tc_i386_force_relocation PARAMS ((struct fix *));
-
-#ifdef BFD_ASSEMBLER
-#define NO_RELOC BFD_RELOC_NONE
-#else
-#define NO_RELOC 0
-#endif
-#define tc_coff_symbol_emit_hook(a) ; /* not used */
-
-#ifndef BFD_ASSEMBLER
-#ifndef OBJ_AOUT
-#ifndef TE_PE
-#ifndef TE_GO32
-/* Local labels starts with .L */
-#define LOCAL_LABEL(name) (name[0] == '.' \
- && (name[1] == 'L' || name[1] == 'X' || name[1] == '.'))
-#endif
-#endif
-#endif
-#endif
+#define SUB_SEGMENT_ALIGN(SEG, FRCHAIN) 0
#define LOCAL_LABELS_FB 1
-#define tc_aout_pre_write_hook(x) {;} /* not used */
-#define tc_crawl_symbol_chain(a) {;} /* not used */
-#define tc_headers_hook(a) {;} /* not used */
-
extern const char extra_symbol_chars[];
#define tc_symbol_chars extra_symbol_chars
-#define MAX_OPERANDS 3 /* max operands per insn */
-#define MAX_IMMEDIATE_OPERANDS 2/* max immediates per insn (lcall, ljmp) */
+extern const char *i386_comment_chars;
+#define tc_comment_chars i386_comment_chars
+
+#define MAX_OPERANDS 4 /* max operands per insn */
+#define MAX_IMMEDIATE_OPERANDS 2/* max immediates per insn (lcall, ljmp, insertq, extrq) */
#define MAX_MEMORY_OPERANDS 2 /* max memory refs per insn (string ops) */
/* Prefixes will be emitted in the order defined below.
WAIT_PREFIX must be the first prefix since FWAIT is really is an
- instruction, and so must come before any prefixes. */
+ instruction, and so must come before any prefixes.
+ The preferred prefix order is SEG_PREFIX, ADDR_PREFIX, DATA_PREFIX,
+ LOCKREP_PREFIX. */
#define WAIT_PREFIX 0
-#define LOCKREP_PREFIX 1
+#define SEG_PREFIX 1
#define ADDR_PREFIX 2
#define DATA_PREFIX 3
-#define SEG_PREFIX 4
+#define LOCKREP_PREFIX 4
#define REX_PREFIX 5 /* must come last. */
#define MAX_PREFIXES 6 /* max prefixes per opcode */
#define END_OF_INSN '\0'
-/* Intel Syntax */
-/* Values 0-4 map onto scale factor */
-#define BYTE_PTR 0
-#define WORD_PTR 1
-#define DWORD_PTR 2
-#define QWORD_PTR 3
-#define XWORD_PTR 4
-#define SHORT 5
-#define OFFSET_FLAT 6
-#define FLAT 7
-#define NONE_FOUND 8
-
typedef struct
{
/* instruction name sans width suffix ("mov" for movl insns) */
/* cpu feature flags */
unsigned int cpu_flags;
-#define Cpu086 0x1 /* Any old cpu will do, 0 does the same */
-#define Cpu186 0x2 /* i186 or better required */
-#define Cpu286 0x4 /* i286 or better required */
-#define Cpu386 0x8 /* i386 or better required */
-#define Cpu486 0x10 /* i486 or better required */
-#define Cpu586 0x20 /* i585 or better required */
-#define Cpu686 0x40 /* i686 or better required */
-#define CpuP4 0x80 /* Pentium4 or better required */
-#define CpuK6 0x100 /* AMD K6 or better required*/
-#define CpuAthlon 0x200 /* AMD Athlon or better required*/
-#define CpuSledgehammer 0x400 /* Sledgehammer or better required */
-#define CpuMMX 0x800 /* MMX support required */
-#define CpuSSE 0x1000 /* Streaming SIMD extensions required */
-#define CpuSSE2 0x2000 /* Streaming SIMD extensions 2 required */
-#define Cpu3dnow 0x4000 /* 3dnow! support required */
-#define CpuUnknown 0x8000 /* The CPU is unknown, be on the safe side. */
+#define Cpu186 0x1 /* i186 or better required */
+#define Cpu286 0x2 /* i286 or better required */
+#define Cpu386 0x4 /* i386 or better required */
+#define Cpu486 0x8 /* i486 or better required */
+#define Cpu586 0x10 /* i585 or better required */
+#define Cpu686 0x20 /* i686 or better required */
+#define CpuP4 0x40 /* Pentium4 or better required */
+#define CpuK6 0x80 /* AMD K6 or better required*/
+#define CpuSledgehammer 0x100 /* Sledgehammer or better required */
+#define CpuMMX 0x200 /* MMX support required */
+#define CpuMMX2 0x400 /* extended MMX support (with SSE or 3DNow!Ext) required */
+#define CpuSSE 0x800 /* Streaming SIMD extensions required */
+#define CpuSSE2 0x1000 /* Streaming SIMD extensions 2 required */
+#define Cpu3dnow 0x2000 /* 3dnow! support required */
+#define Cpu3dnowA 0x4000 /* 3dnow!Extensions support required */
+#define CpuSSE3 0x8000 /* Streaming SIMD extensions 3 required */
+#define CpuPadLock 0x10000 /* VIA PadLock required */
+#define CpuSVME 0x20000 /* AMD Secure Virtual Machine Ext-s required */
+#define CpuVMX 0x40000 /* VMX Instructions required */
+#define CpuSSSE3 0x80000 /* Supplemental Streaming SIMD extensions 3 required */
+#define CpuSSE4a 0x100000 /* SSE4a New Instuctions required */
+#define CpuABM 0x200000 /* ABM New Instructions required */
/* These flags are set by gas depending on the flag_code. */
#define Cpu64 0x4000000 /* 64bit support required */
#define CpuNo64 0x8000000 /* Not supported in the 64bit mode */
/* The default value for unknown CPUs - enable all features to avoid problems. */
-#define CpuUnknownFlags (Cpu086|Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|Cpu686|CpuP4|CpuSledgehammer|CpuMMX|CpuSSE|CpuSSE2|Cpu3dnow|CpuK6|CpuAthlon)
+#define CpuUnknownFlags (Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|Cpu686 \
+ |CpuP4|CpuSledgehammer|CpuMMX|CpuMMX2|CpuSSE|CpuSSE2|CpuSSE3|CpuVMX \
+ |Cpu3dnow|Cpu3dnowA|CpuK6|CpuPadLock|CpuSVME|CpuSSSE3|CpuABM|CpuSSE4a)
/* the bits in opcode_modifier are used to generate the final opcode from
the base_opcode. These bits also are used to detect alternate forms of
#define JumpByte 0x100 /* loop and jecxz */
#define JumpInterSegment 0x200 /* special case for intersegment leaps/calls */
#define FloatD 0x400 /* direction for float insns: MUST BE 0x400 */
-#define Seg2ShortForm 0x800 /* encoding of load segment reg insns */
-#define Seg3ShortForm 0x1000 /* fs/gs segment register insns. */
#define Size16 0x2000 /* needs size prefix if in 32-bit mode */
#define Size32 0x4000 /* needs size prefix if in 16-bit mode */
-#define Size64 0x8000 /* needs size prefix if in 16-bit mode */
+#define Size64 0x8000 /* needs size prefix if in 64-bit mode */
#define IgnoreSize 0x10000 /* instruction ignores operand size prefix */
#define DefaultSize 0x20000 /* default insn size depends on mode */
#define No_bSuf 0x40000 /* b suffix on instruction illegal */
by OR'ing together all of the possible type masks. (e.g.
'operand_types[i] = Reg|Imm' specifies that operand i can be
either a register or an immediate operand. */
- unsigned int operand_types[3];
+ unsigned int operand_types[MAX_OPERANDS];
/* operand_types[i] bits */
/* register */
#define Disp64 0x10000 /* 64 bit displacement */
/* specials */
#define InOutPortReg 0x20000 /* register to hold in/out port addr = dx */
-#define ShiftCount 0x40000 /* register to hold shift cound = cl */
+#define ShiftCount 0x40000 /* register to hold shift count = cl */
#define Control 0x80000 /* Control register */
#define Debug 0x100000 /* Debug register */
#define Test 0x200000 /* Test register */
#define LLongMem AnyMem /* 64 bits (or more) */
#define LongMem AnyMem /* 32 bit memory ref */
#define ShortMem AnyMem /* 16 bit memory ref */
-#define WordMem AnyMem /* 16 or 32 bit memory ref */
+#define WordMem AnyMem /* 16, 32 or 64 bit memory ref */
#define ByteMem AnyMem /* 8 bit memory ref */
}
template;
modrm_byte;
/* x86-64 extension prefix. */
-typedef struct
- {
- unsigned int mode64;
- unsigned int extX; /* Used to extend modrm reg field. */
- unsigned int extY; /* Used to extend SIB index field. */
- unsigned int extZ; /* Used to extend modrm reg/mem, SIB base, modrm base fields. */
- unsigned int empty; /* Used to old-style byte registers to new style. */
- }
-rex_byte;
+typedef int rex_byte;
+#define REX_OPCODE 0x40
+
+/* Indicates 64 bit operand size. */
+#define REX_MODE64 8
+/* High extension to reg field of modrm byte. */
+#define REX_EXTX 4
+/* High extension to SIB index field. */
+#define REX_EXTY 2
+/* High extension to base field of modrm or SIB, or reg field of opcode. */
+#define REX_EXTZ 1
/* 386 opcode byte to code indirect addressing. */
typedef struct
}
sib_byte;
-/* x86 arch names and features */
+enum processor_type
+{
+ PROCESSOR_UNKNOWN,
+ PROCESSOR_I486,
+ PROCESSOR_PENTIUM,
+ PROCESSOR_PENTIUMPRO,
+ PROCESSOR_PENTIUM4,
+ PROCESSOR_NOCONA,
+ PROCESSOR_CORE,
+ PROCESSOR_CORE2,
+ PROCESSOR_K6,
+ PROCESSOR_ATHLON,
+ PROCESSOR_K8,
+ PROCESSOR_GENERIC32,
+ PROCESSOR_GENERIC64,
+ PROCESSOR_AMDFAM10
+};
+
+/* x86 arch names, types and features */
typedef struct
{
- const char *name; /* arch name */
- unsigned int flags; /* cpu feature flags */
+ const char *name; /* arch name */
+ enum processor_type type; /* arch type */
+ unsigned int flags; /* cpu feature flags */
}
arch_entry;
#define GLOBAL_OFFSET_TABLE_NAME "_GLOBAL_OFFSET_TABLE_"
#endif
-#ifdef BFD_ASSEMBLER
-void i386_validate_fix PARAMS ((struct fix *));
-#define TC_VALIDATE_FIX(FIXP,SEGTYPE,SKIP) i386_validate_fix(FIXP)
+#if (defined (OBJ_ELF) || defined (OBJ_MAYBE_ELF)) && !defined (LEX_AT)
+#define TC_PARSE_CONS_EXPRESSION(EXP, NBYTES) x86_cons (EXP, NBYTES)
+extern void x86_cons (expressionS *, int);
#endif
-#endif /* TC_I386 */
+#define TC_CONS_FIX_NEW(FRAG,OFF,LEN,EXP) x86_cons_fix_new(FRAG, OFF, LEN, EXP)
+extern void x86_cons_fix_new
+ (fragS *, unsigned int, unsigned int, expressionS *);
+
+#define DIFF_EXPR_OK /* foo-. gets turned into PC relative relocs */
+
+#define NO_RELOC BFD_RELOC_NONE
+
+void i386_validate_fix (struct fix *);
+#define TC_VALIDATE_FIX(FIX,SEGTYPE,SKIP) i386_validate_fix(FIX)
+
+#define tc_fix_adjustable(X) tc_i386_fix_adjustable(X)
+extern int tc_i386_fix_adjustable (struct fix *);
+
+/* Values passed to md_apply_fix don't include the symbol value. */
+#define MD_APPLY_SYM_VALUE(FIX) 0
-#define md_operand(x)
+/* ELF wants external syms kept, as does PE COFF. */
+#if defined (TE_PE) && defined (STRICT_PE_FORMAT)
+#define EXTERN_FORCE_RELOC \
+ (OUTPUT_FLAVOR == bfd_target_elf_flavour \
+ || OUTPUT_FLAVOR == bfd_target_coff_flavour)
+#else
+#define EXTERN_FORCE_RELOC \
+ (OUTPUT_FLAVOR == bfd_target_elf_flavour)
+#endif
+
+/* This expression evaluates to true if the relocation is for a local
+ object for which we still want to do the relocation at runtime.
+ False if we are willing to perform this relocation while building
+ the .o file. GOTOFF does not need to be checked here because it is
+ not pcrel. I am not sure if some of the others are ever used with
+ pcrel, but it is easier to be safe than sorry. */
+
+#define TC_FORCE_RELOCATION_LOCAL(FIX) \
+ (!(FIX)->fx_pcrel \
+ || (FIX)->fx_r_type == BFD_RELOC_386_PLT32 \
+ || (FIX)->fx_r_type == BFD_RELOC_386_GOT32 \
+ || (FIX)->fx_r_type == BFD_RELOC_386_GOTPC \
+ || TC_FORCE_RELOCATION (FIX))
+
+extern int i386_parse_name (char *, expressionS *, char *);
+#define md_parse_name(s, e, m, c) i386_parse_name (s, e, c)
extern const struct relax_type md_relax_table[];
#define TC_GENERIC_RELAX_TABLE md_relax_table
+extern int optimize_align_code;
+
#define md_do_align(n, fill, len, max, around) \
-if ((n) && !need_pass_2 \
- && (!(fill) || ((char)*(fill) == (char)0x90 && (len) == 1)) \
+if ((n) \
+ && !need_pass_2 \
+ && optimize_align_code \
+ && (!(fill) \
+ || ((char)*(fill) == (char)0x90 && (len) == 1)) \
&& subseg_text_p (now_seg)) \
{ \
frag_align_code ((n), (max)); \
#define MAX_MEM_FOR_RS_ALIGN_CODE 15
-extern void i386_align_code PARAMS ((fragS *, int));
+extern void i386_align_code (fragS *, int);
#define HANDLE_ALIGN(fragP) \
if (fragP->fr_type == rs_align_code) \
- fragP->fr_address \
- fragP->fr_fix));
-/* call md_apply_fix3 with segment instead of md_apply_fix */
-#define MD_APPLY_FIX3
-
-void i386_print_statistics PARAMS ((FILE *));
+void i386_print_statistics (FILE *);
#define tc_print_statistics i386_print_statistics
#define md_number_to_chars number_to_chars_littleendian
#ifdef SCO_ELF
#define tc_init_after_args() sco_id ()
-extern void sco_id PARAMS ((void));
+extern void sco_id (void);
#endif
-#define DIFF_EXPR_OK /* foo-. gets turned into PC relative relocs */
+/* We want .cfi_* pseudo-ops for generating unwind info. */
+#define TARGET_USE_CFIPOP 1
+
+extern unsigned int x86_dwarf2_return_column;
+#define DWARF2_DEFAULT_RETURN_COLUMN x86_dwarf2_return_column
+
+extern int x86_cie_data_alignment;
+#define DWARF2_CIE_DATA_ALIGNMENT x86_cie_data_alignment
+
+#define tc_regname_to_dw2regnum tc_x86_regname_to_dw2regnum
+extern int tc_x86_regname_to_dw2regnum (char *);
+
+#define tc_cfi_frame_initial_instructions tc_x86_frame_initial_instructions
+extern void tc_x86_frame_initial_instructions (void);
+
+#define md_elf_section_type(str,len) i386_elf_section_type (str, len)
+extern int i386_elf_section_type (const char *, size_t);
+
+/* Support for SHF_X86_64_LARGE */
+extern int x86_64_section_word (char *, size_t);
+extern int x86_64_section_letter (int, char **);
+#define md_elf_section_letter(LETTER, PTR_MSG) x86_64_section_letter (LETTER, PTR_MSG)
+#define md_elf_section_word(STR, LEN) x86_64_section_word (STR, LEN)
+
+#ifdef TE_PE
+
+#define O_secrel O_md1
+
+#define TC_DWARF2_EMIT_OFFSET tc_pe_dwarf2_emit_offset
+void tc_pe_dwarf2_emit_offset (symbolS *, unsigned int);
+
+#endif /* TE_PE */
+
+#endif /* TC_I386 */
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