/* tc-m68hc11.c -- Assembler code for the Motorola 68HC11 & 68HC12.
- Copyright 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2009, 2010,
- 2011, 2012
- Free Software Foundation, Inc.
+ Copyright (C) 1999-2020 Free Software Foundation, Inc.
Written by Stephane Carrez (stcarrez@nerim.fr)
XGATE and S12X added by James Murray (jsm@jsm-net.demon.co.uk)
dbcc -> db!cc +3
jmp L
- Setting the flag forbidds this. */
+ Setting the flag forbids this. */
static short flag_fixed_branches = 0;
/* Force to use long jumps (absolute) instead of relative branches. */
{
#define OPTION_FORCE_LONG_BRANCH (OPTION_MD_BASE)
{"force-long-branches", no_argument, NULL, OPTION_FORCE_LONG_BRANCH},
- {"force-long-branchs", no_argument, NULL, OPTION_FORCE_LONG_BRANCH}, /* Misspelt version kept for backwards compatibility. */
+ {"force-long-branchs", no_argument, NULL, OPTION_FORCE_LONG_BRANCH}, /* Misspelled version kept for backwards compatibility. */
#define OPTION_SHORT_BRANCHES (OPTION_MD_BASE + 1)
{"short-branches", no_argument, NULL, OPTION_SHORT_BRANCHES},
- {"short-branchs", no_argument, NULL, OPTION_SHORT_BRANCHES}, /* Misspelt version kept for backwards compatibility. */
+ {"short-branchs", no_argument, NULL, OPTION_SHORT_BRANCHES}, /* Misspelled version kept for backwards compatibility. */
#define OPTION_STRICT_DIRECT_MODE (OPTION_MD_BASE + 2)
{"strict-direct-mode", no_argument, NULL, OPTION_STRICT_DIRECT_MODE},
}
int
-md_parse_option (int c, char *arg)
+md_parse_option (int c, const char *arg)
{
get_default_target ();
switch (c)
current_architecture = cpu6812 | cpu6812s | cpu9s12x;
else if ((strcasecmp (arg, "m9s12xg") == 0)
|| (strcasecmp (arg, "xgate") == 0))
- /* xgate for backwards compatability */
+ /* xgate for backwards compatibility */
current_architecture = cpuxgate;
else
as_bad (_("Option `%s' is not recognized."), arg);
return 0;
}
-char *
+const char *
md_atof (int type, char *litP, int *sizeP)
{
return ieee_md_atof (type, litP, sizeP, TRUE);
valueT
md_section_align (asection *seg, valueT addr)
{
- int align = bfd_get_section_alignment (stdoutput, seg);
- return ((addr + (1 << align) - 1) & (-1 << align));
+ int align = bfd_section_alignment (seg);
+ return ((addr + (1 << align) - 1) & -(1 << align));
}
static int
void
md_begin (void)
{
- char *prev_name = "";
+ const char *prev_name = "";
struct m68hc11_opcode *opcodes;
struct m68hc11_opcode_def *opc = 0;
int i, j;
m68hc11_hash = hash_new ();
/* Get a writable copy of the opcode table and sort it on the names. */
- opcodes = (struct m68hc11_opcode *) xmalloc (m68hc11_num_opcodes *
- sizeof (struct
- m68hc11_opcode));
+ opcodes = XNEWVEC (struct m68hc11_opcode, m68hc11_num_opcodes);
m68hc11_sorted_opcodes = opcodes;
num_opcodes = 0;
for (i = 0; i < m68hc11_num_opcodes; i++)
qsort (opcodes, num_opcodes, sizeof (struct m68hc11_opcode),
(int (*) (const void*, const void*)) cmp_opcode);
- opc = (struct m68hc11_opcode_def *)
- xmalloc (num_opcodes * sizeof (struct m68hc11_opcode_def));
+ opc = XNEWVEC (struct m68hc11_opcode_def, num_opcodes);
m68hc11_opcode_defs = opc--;
/* Insert unique names into hash table. The M6811 instruction set
print_opcode_list (void)
{
int i;
- char *prev_name = "";
+ const char *prev_name = "";
struct m68hc11_opcode *opcodes;
int example = flag_print_opcodes == 2;
if (mode == M6811_OP_JUMP_REL)
{
- fixS *fixp;
-
- fixp = fix_new_exp (frag_now, f - frag_now->fr_literal, 1,
- oper, TRUE, BFD_RELOC_8_PCREL);
- fixp->fx_pcrel_adjust = 1;
+ fix_new_exp (frag_now, f - frag_now->fr_literal, 1,
+ oper, TRUE, BFD_RELOC_8_PCREL);
}
else
{
fixS *fixp;
- int reloc;
+ bfd_reloc_code_real_type reloc;
/* Now create an 8-bit fixup. If there was some %hi, %lo
or %page modifier, generate the reloc accordingly. */
else if (oper->X_op != O_register)
{
fixS *fixp;
- int reloc;
+ bfd_reloc_code_real_type reloc;
if ((opmode & M6811_OP_CALL_ADDR) && (mode & M6811_OP_IMM16))
reloc = BFD_RELOC_M68HC11_LO16;
reloc == BFD_RELOC_16_PCREL,
reloc);
number_to_chars_bigendian (f, 0, 2);
- if (reloc == BFD_RELOC_16_PCREL)
- fixp->fx_pcrel_adjust = 2;
+
if (reloc == BFD_RELOC_M68HC11_LO16)
fixp->fx_no_overflow = 1;
}
}
/* XGATE Put a 1 byte expression described by 'oper'. If this expression
- containts unresolved symbols, generate an 8-bit fixup. */
+ contains unresolved symbols, generate an 8-bit fixup. */
static void
fixup8_xg (expressionS *oper, int mode, int opmode)
{
if (oper->X_op == O_constant)
{
fixS *fixp;
- int reloc;
+ bfd_reloc_code_real_type reloc;
if ((opmode & M6811_OP_HIGH_ADDR) || (opmode & M6811_OP_LOW_ADDR))
{
{
if (mode == M68XG_OP_REL9)
{
- fixS *fixp;
-
/* Future improvement:
This fixup/reloc isn't adding on constants to symbols. */
- fixp = fix_new_exp (frag_now, f - frag_now->fr_literal -1, 2,
- oper, TRUE, BFD_RELOC_M68HC12_9_PCREL);
- fixp->fx_pcrel_adjust = 1;
+ fix_new_exp (frag_now, f - frag_now->fr_literal -1, 2,
+ oper, TRUE, BFD_RELOC_M68HC12_9_PCREL);
}
else if (mode == M68XG_OP_REL10)
{
- fixS *fixp;
-
/* Future improvement:
This fixup/reloc isn't adding on constants to symbols. */
- fixp = fix_new_exp (frag_now, f - frag_now->fr_literal -1, 2,
- oper, TRUE, BFD_RELOC_M68HC12_10_PCREL);
- fixp->fx_pcrel_adjust = 1;
+ fix_new_exp (frag_now, f - frag_now->fr_literal -1, 2,
+ oper, TRUE, BFD_RELOC_M68HC12_10_PCREL);
}
else
{
fixS *fixp;
- int reloc;
+ bfd_reloc_code_real_type reloc;
/* Now create an 8-bit fixup. If there was some %hi, %lo
modifier, generate the reloc accordingly. */
if (!check_range (val, M6812_OP_IDX))
as_bad (_("Offset out of 16-bit range: %ld."), val);
- if (move_insn && !(val >= -16 && val <= 15)
- && ((!(mode & M6812_OP_IDX) && !(mode & M6812_OP_D_IDX_2))
+ if (move_insn && !(val >= -16 && val <= 15)
+ && ((!(mode & M6812_OP_IDX) && !(mode & M6812_OP_D_IDX_2))
|| !(current_architecture & cpu9s12x)))
{
as_bad (_("Offset out of 5-bit range for movw/movb insn: %ld."),
byte <<= 3;
byte |= 0xe2;
number_to_chars_bigendian (f, byte, 1);
+ f = frag_more (2);
fix_new (frag_now, f - frag_now->fr_literal, 2,
sym, off, 0, BFD_RELOC_M68HC12_16B);
- f = frag_more (2);
return 1;
}
else
default:
as_bad (_("Invalid accumulator register."));
+ /* Fall through. */
case REG_D:
byte = 0xE6;
f = m68hc11_new_insn (1);
number_to_chars_bigendian (f, opcode->opcode >> 8, 1); /* High byte. */
fixup8_xg (&operands[0].exp, format, M68XG_OP_REL9);
- }
+ }
else if (format & M68XG_OP_REL10)
{
f = m68hc11_new_insn (1);
}
else
as_bad ("No opcode found\n");
-
+
return;
}
else
{
opcode_local.opcode |= (operands[0].exp.X_add_number);
operands[0].mode = M68XG_OP_IMM3;
-
+
opcode = find (opc, operands, 1);
if (opcode)
{
if (opc->format & (M68XG_OP_REL9 | M68XG_OP_REL10))
{
- opcode_local.format = opc->format;
+ opcode_local.format = opc->format;
input_line_pointer = skip_whites (input_line_pointer);
expression (&operands[0].exp);
if (operands[0].exp.X_op == O_illegal)
if ((*input_line_pointer == '\n') || (*input_line_pointer == '\r')
|| (*input_line_pointer == '\0'))
return; /* nothing left */
-
+
if (*input_line_pointer == '#')
{
as_bad ("No register specified before hash\n");
return;
- }
+ }
/* first operand is expected to be a register */
if ((*input_line_pointer == 'R') || (*input_line_pointer == 'r'))
if (opcode)
opcode_local.opcode = opcode->opcode
| (operands[0].reg1 << 8);
-
+
if (operands[0].exp.X_op != O_constant)
as_bad ("Only constants supported at for IMM4 mode\n");
else
{
- if (check_range
+ if (check_range
(operands[0].exp.X_add_number,M68XG_OP_R_IMM4))
opcode_local.opcode
|= (operands[0].exp.X_add_number << 4);
com RD, RS alias for xnor RD,R0,RS
mov RD, RS alias for or RD, R0, RS
neg RD, RS alias for sub RD, R0, RS */
- opcode_local.opcode = opcode->opcode
+ opcode_local.opcode = opcode->opcode
| (operands[0].reg1 << 8) | (operands[1].reg1 << 2);
}
else if ((strncmp (opc->opcode->name, "cmp",3) == 0)
/* special cases for:
cmp RS1, RS2 alias for sub R0, RS1, RS2
cpc RS1, RS2 alias for sbc R0, RS1, RS2 */
- opcode_local.opcode = opcode->opcode
+ opcode_local.opcode = opcode->opcode
| (operands[0].reg1 << 5) | (operands[1].reg1 << 2);
}
else
opcode = find (opc, operands, 1);
if (opcode)
{
- opcode_local.opcode = opcode->opcode
+ opcode_local.opcode = opcode->opcode
| (operands[0].reg1 << 8) | (operands[1].reg1 << 5)
| (operands[2].reg1 << 2);
opcode_local.format = M68XG_OP_NONE;
}
input_line_pointer = skip_whites (input_line_pointer);
-
+
if (*input_line_pointer != ',')
{
as_bad (_("Missing operand."));
{
input_line_pointer++;
}
-
+
/* Ok so far, can only be one mode. */
opcode_local.format = M68XG_OP_R_R_OFFS5;
operands[0].mode = M68XG_OP_R_R_OFFS5;
do
{
- name = input_line_pointer;
- c = get_symbol_end ();
+ c = get_symbol_name (&name);
symbolP = symbol_find_or_make (name);
- *input_line_pointer = c;
+ (void) restore_line_pointer (c);
SKIP_WHITESPACE ();
{
arelent *reloc;
- reloc = (arelent *) xmalloc (sizeof (arelent));
- reloc->sym_ptr_ptr = (asymbol **) xmalloc (sizeof (asymbol *));
+ reloc = XNEW (arelent);
+ reloc->sym_ptr_ptr = XNEW (asymbol *);
*reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy);
reloc->address = fixp->fx_frag->fr_address + fixp->fx_where;
if (fixp->fx_r_type == 0)
const relax_typeS *table = TC_GENERIC_RELAX_TABLE;
/* We only have to cope with frags as prepared by
- md_estimate_size_before_relax. The STATE_BITS16 case may geet here
+ md_estimate_size_before_relax. The STATE_BITS16 case may get here
because of the different reasons that it's not relaxable. */
switch (fragP->fr_subtype)
{
md_convert_frag (bfd *abfd ATTRIBUTE_UNUSED, asection *sec ATTRIBUTE_UNUSED,
fragS *fragP)
{
- fixS *fixp;
long value;
long disp;
char *buffer_address = fragP->fr_literal;
/* Address in object code of the displacement. */
- register int object_address = fragP->fr_fix + fragP->fr_address;
+ int object_address = fragP->fr_fix + fragP->fr_address;
buffer_address += fragP->fr_fix;
fragP->fr_opcode[1] = fragP->fr_opcode[0];
fragP->fr_opcode[0] = M6811_OPCODE_PAGE2;
- fixp = fix_new (fragP, fragP->fr_fix, 2,
- fragP->fr_symbol, fragP->fr_offset, 1,
+ fix_new (fragP, fragP->fr_fix, 2,
+ fragP->fr_symbol, fragP->fr_offset, 1,
BFD_RELOC_16_PCREL);
- fixp->fx_pcrel_adjust = 2;
fragP->fr_fix += 2;
break;
&& fragP->fr_symbol != 0
&& S_GET_SEGMENT (fragP->fr_symbol) != absolute_section)
{
- fixp = fix_new (fragP, fragP->fr_fix, 2,
- fragP->fr_symbol, fragP->fr_offset,
- 1, BFD_RELOC_16_PCREL);
+ fix_new (fragP, fragP->fr_fix, 2,
+ fragP->fr_symbol, fragP->fr_offset,
+ 1, BFD_RELOC_16_PCREL);
}
else
{
value);
if (value >= 0)
where[0] |= value;
- else
+ else
where[0] |= (0x10 | (16 + value));
break;
/* sign bit already in xb postbyte */
if (value >= 0)
where[1] = value;
- else
+ else
where[1] = (256 + value);
break;
if (value < 0)
value += 65536;
- where[1] = (value >> 8);
- where[2] = (value & 0xff);
+ where[0] = (value >> 8);
+ where[1] = (value & 0xff);
break;
case BFD_RELOC_M68HC11_RL_JUMP:
projects / deliverable / binutils-gdb.git / blobdiff