{ cpu32|m68881, cpu_cpu32, "cpu32", 0},
{ mcfisa_a, cpu_cf5200, "5200", 0},
{ mcfisa_a|mcfhwdiv|mcfmac, cpu_cf5206e, "5206e", 0},
- { mcfisa_a|mcfisa_aa|mcfhwdiv|mcfmac|mcfusp, cpu_cf5208, "5208", 0},
+ { mcfisa_a|mcfisa_aa|mcfhwdiv|mcfemac|mcfusp, cpu_cf5208, "5208", 0},
{ mcfisa_a|mcfisa_aa|mcfhwdiv|mcfmac|mcfusp, cpu_cf5213, "5213", 0},
{ mcfisa_a|mcfisa_aa|mcfhwdiv|mcfemac|mcfusp,cpu_cf521x, "521x", 0},
{ mcfisa_a|mcfhwdiv|mcfemac, cpu_cf5249, "5249", 0},
{ mcfisa_a, cpu_cf5200, "5202", 1},
{ mcfisa_a, cpu_cf5200, "5204", 1},
{ mcfisa_a, cpu_cf5200, "5206", 1},
- { mcfisa_a|mcfisa_aa|mcfhwdiv|mcfmac|mcfusp, cpu_cf5208, "5207", 1},
+ { mcfisa_a|mcfisa_aa|mcfhwdiv|mcfemac|mcfusp, cpu_cf5208, "5207", 1},
{ mcfisa_a|mcfisa_aa|mcfhwdiv|mcfmac|mcfusp, cpu_cf5213, "5211", 1},
{ mcfisa_a|mcfisa_aa|mcfhwdiv|mcfmac|mcfusp, cpu_cf5213, "5212", 1},
{ mcfisa_a|mcfisa_aa|mcfhwdiv|mcfemac|mcfusp, cpu_cf521x, "5214", 1},