[MIPS/GAS] Split Loongson CAM Instructions from loongson3a

[deliverable/binutils-gdb.git] / gas / config / tc-mips.c

diff --git a/gas/config/tc-mips.c b/gas/config/tc-mips.c
index 9bbf59cca6561286b068a78e3f5224ee0d925429..1f58a6dd8ff62972d1f2b7dc90df83b22026bcfd 100644 (file)
--- a/gas/config/tc-mips.c
+++ b/gas/config/tc-mips.c
@@ -1531,6 +1531,8 @@ enum options
     OPTION_NO_GINV,
     OPTION_LOONGSON_MMI,
     OPTION_NO_LOONGSON_MMI,
+    OPTION_LOONGSON_CAM,
+    OPTION_NO_LOONGSON_CAM,
     OPTION_END_OF_ENUM
   };
 
@@ -1593,6 +1595,8 @@ struct option md_longopts[] =
   {"mno-ginv", no_argument, NULL, OPTION_NO_GINV},
   {"mloongson-mmi", no_argument, NULL, OPTION_LOONGSON_MMI},
   {"mno-loongson-mmi", no_argument, NULL, OPTION_NO_LOONGSON_MMI},
+  {"mloongson-cam", no_argument, NULL, OPTION_LOONGSON_CAM},
+  {"mno-loongson-cam", no_argument, NULL, OPTION_NO_LOONGSON_CAM},
 
   /* Old-style architecture options.  Don't add more of these.  */
   {"m4650", no_argument, NULL, OPTION_M4650},
@@ -1795,6 +1799,11 @@ static const struct mips_ase mips_ases[] = {
     OPTION_LOONGSON_MMI, OPTION_NO_LOONGSON_MMI,
     0, 0, -1, -1,
     -1 },
+
+  { "loongson-cam", ASE_LOONGSON_CAM, 0,
+    OPTION_LOONGSON_CAM, OPTION_NO_LOONGSON_CAM,
+    0, 0, -1, -1,
+    -1 },
 };
 
 /* The set of ASEs that require -mfp64.  */
@@ -19028,6 +19037,8 @@ mips_convert_ase_flags (int ase)
     ext_ases |= AFL_ASE_GINV;
   if (ase & ASE_LOONGSON_MMI)
     ext_ases |= AFL_ASE_LOONGSON_MMI;
+  if (ase & ASE_LOONGSON_CAM)
+    ext_ases |= AFL_ASE_LOONGSON_CAM;
 
   return ext_ases;
 }
@@ -19773,9 +19784,10 @@ static const struct mips_cpu_info mips_cpu_info_table[] =
   /* Broadcom SB-1A CPU core */
   { "sb1a",           0, ASE_MIPS3D | ASE_MDMX,        ISA_MIPS64,   CPU_SB1 },
 
-  { "loongson3a",     0, ASE_LOONGSON_MMI,     ISA_MIPS64R2, CPU_LOONGSON_3A },
-
   /* MIPS 64 Release 2 */
+  /* Loongson CPU core */
+  { "loongson3a",     0, ASE_LOONGSON_MMI | ASE_LOONGSON_CAM,  ISA_MIPS64R2,
+     CPU_LOONGSON_3A },
 
   /* Cavium Networks Octeon CPU core */
   { "octeon",        0, 0,                     ISA_MIPS64R2, CPU_OCTEON },
@@ -20051,6 +20063,9 @@ MIPS options:\n\
 -mloongson-mmi         generate Loongson MultiMedia extensions Instructions (MMI) instructions\n\
 -mno-loongson-mmi      do not generate Loongson MultiMedia extensions Instructions\n"));
   fprintf (stream, _("\
+-mloongson-cam         generate Loongson Content Address Memory (CAM) instructions\n\
+-mno-loongson-cam      do not generate Loongson Content Address Memory Instructions\n"));
+  fprintf (stream, _("\
 -minsn32               only generate 32-bit microMIPS instructions\n\
 -mno-insn32            generate all microMIPS instructions\n"));
   fprintf (stream, _("\