i386: Add tests for -malign-branch-boundary and -malign-branch

[deliverable/binutils-gdb.git] / gas / config / tc-pdp11.c

diff --git a/gas/config/tc-pdp11.c b/gas/config/tc-pdp11.c
index 74c21fccf6d7019d8bb50093cccc56e47806dec2..1be07eaf5938ea2b3c6be0336923f1973bee0784 100644 (file)
--- a/gas/config/tc-pdp11.c
+++ b/gas/config/tc-pdp11.c
@@ -1,5 +1,5 @@
 /* tc-pdp11.c - pdp11-specific -
-   Copyright (C) 2001-2017 Free Software Foundation, Inc.
+   Copyright (C) 2001-2019 Free Software Foundation, Inc.
 
    This file is part of GAS, the GNU Assembler.
 
@@ -109,7 +109,7 @@ set_option (const char *arg)
       arg += 3;
     }
 
-  /* Commersial instructions.  */
+  /* Commercial instructions.  */
   if (strcmp (arg, "cis") == 0)
     pdp11_extension[PDP11_CIS] = yes;
   /* Call supervisor mode.  */
@@ -203,7 +203,7 @@ md_number_to_chars (char con[], valueT value, int nbytes)
 {
   /* On a PDP-11, 0x1234 is stored as "\x12\x34", and
      0x12345678 is stored as "\x56\x78\x12\x34". It's
-     anyones guess what 0x123456 would be stored like.  */
+     anyone's guess what 0x123456 would be stored like.  */
 
   switch (nbytes)
     {
@@ -248,6 +248,10 @@ md_apply_fix (fixS *fixP,
 
   switch (fixP->fx_r_type)
     {
+    case BFD_RELOC_8:
+      mask = 0xff;
+      shift = 0;
+      break;
     case BFD_RELOC_16:
     case BFD_RELOC_16_PCREL:
       mask = 0xffff;
@@ -283,7 +287,7 @@ md_chars_to_number (unsigned char *con, int nbytes)
 {
   /* On a PDP-11, 0x1234 is stored as "\x12\x34", and
      0x12345678 is stored as "\x56\x78\x12\x34". It's
-     anyones guess what 0x123456 would be stored like.  */
+     anyone's guess what 0x123456 would be stored like.  */
   switch (nbytes)
     {
     case 0:
@@ -350,10 +354,7 @@ parse_reg (char *str, struct pdp11_code *operand)
       str += 2;
     }
   else
-    {
-      operand->error = _("Bad register name");
-      return str;
-    }
+    operand->error = _("Bad register name");
 
   return str;
 }
@@ -581,9 +582,34 @@ parse_op_noreg (char *str, struct pdp11_code *operand)
 
   if (*str == '@' || *str == '*')
     {
-      str = parse_op_no_deferred (str + 1, operand);
+      /* @(Rn) == @0(Rn): Mode 7, Indexed deferred.
+        Check for auto-increment deferred.  */
+      if (str[1] == '('
+         && str[2] != 0
+         && str[3] != 0
+         && str[4] != 0
+         && str[5] != '+')
+        {
+         /* Change implied to explicit index deferred.  */
+          *str = '0';
+          str = parse_op_no_deferred (str, operand);
+        }
+      else
+        {
+          /* @Rn == (Rn): Register deferred.  */
+          str = parse_reg (str + 1, operand);
+         
+          /* Not @Rn */
+          if (operand->error)
+           {
+             operand->error = NULL;
+             str = parse_op_no_deferred (str, operand);
+           }
+        }
+
       if (operand->error)
        return str;
+
       operand->code |= 010;
     }
   else
@@ -1288,7 +1314,7 @@ md_show_usage (FILE *stream)
 \n\
 PDP-11 instruction set extensions:\n\
 \n\
--m(no-)cis             allow (disallow) commersial instruction set\n\
+-m(no-)cis             allow (disallow) commercial instruction set\n\
 -m(no-)csm             allow (disallow) CSM instruction\n\
 -m(no-)eis             allow (disallow) full extended instruction set\n\
 -m(no-)fis             allow (disallow) KEV11 floating-point instructions\n\
@@ -1302,8 +1328,8 @@ PDP-11 instruction set extensions:\n\
 -m(no-)ucode           allow (disallow) microcode instructions\n\
 -mall-extensions       allow all instruction set extensions\n\
                        (this is the default)\n\
--mno-extentions                disallow all instruction set extensions\n\
--pic                   generate position-indepenent code\n\
+-mno-extensions                disallow all instruction set extensions\n\
+-pic                   generate position-independent code\n\
 \n\
 PDP-11 CPU model options:\n\
 \n\