/* tc-ppc.c -- Assemble for the PowerPC or POWER (RS/6000)
- Copyright (C) 1994, 1995, 1996, 1997, 1998, 1999, 2000
+ Copyright 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001
Free Software Foundation, Inc.
Written by Ian Lance Taylor, Cygnus Support.
You should have received a copy of the GNU General Public License
along with GAS; see the file COPYING. If not, write to the Free
Software Foundation, 59 Temple Place - Suite 330, Boston, MA
- 02111-1307, USA. */
+ 02111-1307, USA. */
#include <stdio.h>
#include <ctype.h>
#ifdef OBJ_ELF
#include "elf/ppc.h"
+#include "dwarf2dbg.h"
#endif
#ifdef TE_PE
{ "rdata", ppc_elf_rdata, 0 },
{ "rodata", ppc_elf_rdata, 0 },
{ "lcomm", ppc_elf_lcomm, 0 },
+ { "file", dwarf2_directive_file, 0 },
+ { "loc", dwarf2_directive_loc, 0 },
#endif
#ifdef TE_PE
- /* Pseudo-ops specific to the Windows NT PowerPC PE (coff) format */
+ /* Pseudo-ops specific to the Windows NT PowerPC PE (coff) format. */
{ "previous", ppc_previous, 0 },
{ "pdata", ppc_pdata, 0 },
{ "ydata", ppc_ydata, 0 },
};
\f
-/* Predefined register names if -mregnames (or default for Windows NT). */
-/* In general, there are lots of them, in an attempt to be compatible */
-/* with a number of other Windows NT assemblers. */
+/* Predefined register names if -mregnames (or default for Windows NT).
+ In general, there are lots of them, in an attempt to be compatible
+ with a number of other Windows NT assemblers. */
/* Structure to hold information about predefined registers. */
struct pd_reg
srr0 has the value 26
srr1 has the value 27
- The table is sorted. Suitable for searching by a binary search. */
+ The table is sorted. Suitable for searching by a binary search. */
static const struct pd_reg pre_defined_registers[] =
{
{ "dsisr", 18 }, /* Data Storage Interrupt Status Register */
{ "f.0", 0 }, /* Floating point registers */
- { "f.1", 1 },
- { "f.10", 10 },
- { "f.11", 11 },
- { "f.12", 12 },
- { "f.13", 13 },
- { "f.14", 14 },
- { "f.15", 15 },
- { "f.16", 16 },
- { "f.17", 17 },
- { "f.18", 18 },
- { "f.19", 19 },
- { "f.2", 2 },
- { "f.20", 20 },
- { "f.21", 21 },
- { "f.22", 22 },
- { "f.23", 23 },
- { "f.24", 24 },
- { "f.25", 25 },
- { "f.26", 26 },
- { "f.27", 27 },
- { "f.28", 28 },
- { "f.29", 29 },
- { "f.3", 3 },
+ { "f.1", 1 },
+ { "f.10", 10 },
+ { "f.11", 11 },
+ { "f.12", 12 },
+ { "f.13", 13 },
+ { "f.14", 14 },
+ { "f.15", 15 },
+ { "f.16", 16 },
+ { "f.17", 17 },
+ { "f.18", 18 },
+ { "f.19", 19 },
+ { "f.2", 2 },
+ { "f.20", 20 },
+ { "f.21", 21 },
+ { "f.22", 22 },
+ { "f.23", 23 },
+ { "f.24", 24 },
+ { "f.25", 25 },
+ { "f.26", 26 },
+ { "f.27", 27 },
+ { "f.28", 28 },
+ { "f.29", 29 },
+ { "f.3", 3 },
{ "f.30", 30 },
{ "f.31", 31 },
- { "f.4", 4 },
- { "f.5", 5 },
- { "f.6", 6 },
- { "f.7", 7 },
- { "f.8", 8 },
- { "f.9", 9 },
-
- { "f0", 0 },
- { "f1", 1 },
- { "f10", 10 },
- { "f11", 11 },
- { "f12", 12 },
- { "f13", 13 },
- { "f14", 14 },
- { "f15", 15 },
- { "f16", 16 },
- { "f17", 17 },
- { "f18", 18 },
- { "f19", 19 },
- { "f2", 2 },
- { "f20", 20 },
- { "f21", 21 },
- { "f22", 22 },
- { "f23", 23 },
- { "f24", 24 },
- { "f25", 25 },
- { "f26", 26 },
- { "f27", 27 },
- { "f28", 28 },
- { "f29", 29 },
- { "f3", 3 },
+ { "f.4", 4 },
+ { "f.5", 5 },
+ { "f.6", 6 },
+ { "f.7", 7 },
+ { "f.8", 8 },
+ { "f.9", 9 },
+
+ { "f0", 0 },
+ { "f1", 1 },
+ { "f10", 10 },
+ { "f11", 11 },
+ { "f12", 12 },
+ { "f13", 13 },
+ { "f14", 14 },
+ { "f15", 15 },
+ { "f16", 16 },
+ { "f17", 17 },
+ { "f18", 18 },
+ { "f19", 19 },
+ { "f2", 2 },
+ { "f20", 20 },
+ { "f21", 21 },
+ { "f22", 22 },
+ { "f23", 23 },
+ { "f24", 24 },
+ { "f25", 25 },
+ { "f26", 26 },
+ { "f27", 27 },
+ { "f28", 28 },
+ { "f29", 29 },
+ { "f3", 3 },
{ "f30", 30 },
{ "f31", 31 },
- { "f4", 4 },
- { "f5", 5 },
- { "f6", 6 },
- { "f7", 7 },
- { "f8", 8 },
- { "f9", 9 },
+ { "f4", 4 },
+ { "f5", 5 },
+ { "f6", 6 },
+ { "f7", 7 },
+ { "f8", 8 },
+ { "f9", 9 },
{ "fpscr", 0 },
{ "srr0", 26 }, /* Machine Status Save/Restore Register 0 */
{ "srr1", 27 }, /* Machine Status Save/Restore Register 1 */
-
+
{ "v.0", 0 }, /* Vector registers */
- { "v.1", 1 },
- { "v.10", 10 },
- { "v.11", 11 },
- { "v.12", 12 },
- { "v.13", 13 },
- { "v.14", 14 },
- { "v.15", 15 },
- { "v.16", 16 },
- { "v.17", 17 },
- { "v.18", 18 },
- { "v.19", 19 },
- { "v.2", 2 },
- { "v.20", 20 },
- { "v.21", 21 },
- { "v.22", 22 },
- { "v.23", 23 },
- { "v.24", 24 },
- { "v.25", 25 },
- { "v.26", 26 },
- { "v.27", 27 },
- { "v.28", 28 },
- { "v.29", 29 },
- { "v.3", 3 },
+ { "v.1", 1 },
+ { "v.10", 10 },
+ { "v.11", 11 },
+ { "v.12", 12 },
+ { "v.13", 13 },
+ { "v.14", 14 },
+ { "v.15", 15 },
+ { "v.16", 16 },
+ { "v.17", 17 },
+ { "v.18", 18 },
+ { "v.19", 19 },
+ { "v.2", 2 },
+ { "v.20", 20 },
+ { "v.21", 21 },
+ { "v.22", 22 },
+ { "v.23", 23 },
+ { "v.24", 24 },
+ { "v.25", 25 },
+ { "v.26", 26 },
+ { "v.27", 27 },
+ { "v.28", 28 },
+ { "v.29", 29 },
+ { "v.3", 3 },
{ "v.30", 30 },
{ "v.31", 31 },
- { "v.4", 4 },
- { "v.5", 5 },
- { "v.6", 6 },
- { "v.7", 7 },
- { "v.8", 8 },
- { "v.9", 9 },
+ { "v.4", 4 },
+ { "v.5", 5 },
+ { "v.6", 6 },
+ { "v.7", 7 },
+ { "v.8", 8 },
+ { "v.9", 9 },
{ "v0", 0 },
- { "v1", 1 },
- { "v10", 10 },
- { "v11", 11 },
- { "v12", 12 },
- { "v13", 13 },
- { "v14", 14 },
- { "v15", 15 },
- { "v16", 16 },
- { "v17", 17 },
- { "v18", 18 },
- { "v19", 19 },
- { "v2", 2 },
- { "v20", 20 },
- { "v21", 21 },
- { "v22", 22 },
- { "v23", 23 },
- { "v24", 24 },
- { "v25", 25 },
- { "v26", 26 },
- { "v27", 27 },
- { "v28", 28 },
- { "v29", 29 },
- { "v3", 3 },
+ { "v1", 1 },
+ { "v10", 10 },
+ { "v11", 11 },
+ { "v12", 12 },
+ { "v13", 13 },
+ { "v14", 14 },
+ { "v15", 15 },
+ { "v16", 16 },
+ { "v17", 17 },
+ { "v18", 18 },
+ { "v19", 19 },
+ { "v2", 2 },
+ { "v20", 20 },
+ { "v21", 21 },
+ { "v22", 22 },
+ { "v23", 23 },
+ { "v24", 24 },
+ { "v25", 25 },
+ { "v26", 26 },
+ { "v27", 27 },
+ { "v28", 28 },
+ { "v29", 29 },
+ { "v3", 3 },
{ "v30", 30 },
{ "v31", 31 },
- { "v4", 4 },
- { "v5", 5 },
- { "v6", 6 },
- { "v7", 7 },
- { "v8", 8 },
+ { "v4", 4 },
+ { "v5", 5 },
+ { "v6", 6 },
+ { "v7", 7 },
+ { "v8", 8 },
{ "v9", 9 },
{ "xer", 1 },
};
-#define REG_NAME_CNT (sizeof(pre_defined_registers) / sizeof(struct pd_reg))
+#define REG_NAME_CNT (sizeof (pre_defined_registers) / sizeof (struct pd_reg))
/* Given NAME, find the register number associated with that name, return
the integer value associated with the given name or -1 on failure. */
}
/*
- * Summary of register_name().
+ * Summary of register_name.
*
* in: Input_line_pointer points to 1st char of operand.
*
char *start;
char c;
- /* Find the spelling of the operand */
+ /* Find the spelling of the operand. */
start = name = input_line_pointer;
if (name[0] == '%' && isalpha (name[1]))
name = ++input_line_pointer;
c = get_symbol_end ();
reg_number = reg_name_search (pre_defined_registers, REG_NAME_CNT, name);
- /* look to see if it's in the register table */
- if (reg_number >= 0)
+ /* Look to see if it's in the register table. */
+ if (reg_number >= 0)
{
expressionP->X_op = O_register;
expressionP->X_add_number = reg_number;
-
- /* make the rest nice */
+
+ /* Make the rest nice. */
expressionP->X_add_symbol = NULL;
expressionP->X_op_symbol = NULL;
- *input_line_pointer = c; /* put back the delimiting char */
+ /* Put back the delimiting char. */
+ *input_line_pointer = c;
return true;
}
else
{
- /* reset the line as if we had not done anything */
- *input_line_pointer = c; /* put back the delimiting char */
- input_line_pointer = start; /* reset input_line pointer */
+ /* Reset the line as if we had not done anything. */
+ *input_line_pointer = c;
+ input_line_pointer = start;
return false;
}
}
PPC_OPCODE_32 or PPC_OPCODE_64. */
static unsigned long ppc_size = PPC_OPCODE_32;
-/* Whether to target xcoff64 */
+/* Whether to target xcoff64. */
static int ppc_xcoff64 = 0;
/* Opcode hash table. */
static struct hash_control *ppc_macro_hash;
#ifdef OBJ_ELF
-/* What type of shared library support to use */
-static enum { SHLIB_NONE, SHLIB_PIC, SHILB_MRELOCATABLE } shlib = SHLIB_NONE;
+/* What type of shared library support to use. */
+static enum { SHLIB_NONE, SHLIB_PIC, SHLIB_MRELOCATABLE } shlib = SHLIB_NONE;
-/* Flags to set in the elf header */
+/* Flags to set in the elf header. */
static flagword ppc_flags = 0;
/* Whether this is Solaris or not. */
static segT rdata_section;
static segT tocdata_section;
-/* The current section and the previous section. See ppc_previous. */
+/* The current section and the previous section. See ppc_previous. */
static segT ppc_previous_section;
static segT ppc_current_section;
struct option md_longopts[] = {
{NULL, no_argument, NULL, 0}
};
-size_t md_longopts_size = sizeof(md_longopts);
+size_t md_longopts_size = sizeof (md_longopts);
int
md_parse_option (c, arg)
#ifdef OBJ_ELF
case 'l':
/* Solaris as takes -le (presumably for little endian). For completeness
- sake, recognize -be also. */
+ sake, recognize -be also. */
if (strcmp (arg, "e") == 0)
{
target_big_endian = 0;
break;
case 'K':
- /* Recognize -K PIC */
+ /* Recognize -K PIC. */
if (strcmp (arg, "PIC") == 0 || strcmp (arg, "pic") == 0)
{
shlib = SHLIB_PIC;
else
return 0;
break;
-
+
case 'm':
/* -mpwrx and -mpwr2 mean to assemble for the IBM POWER/2
- (RIOS2). */
+ (RIOS2). */
if (strcmp (arg, "pwrx") == 0 || strcmp (arg, "pwr2") == 0)
ppc_cpu = PPC_OPCODE_POWER | PPC_OPCODE_POWER2;
/* -mpwr means to assemble for the IBM POWER (RIOS1). */
else if (strcmp (arg, "pwr") == 0)
ppc_cpu = PPC_OPCODE_POWER;
/* -m601 means to assemble for the Motorola PowerPC 601, which includes
- instructions that are holdovers from the Power. */
+ instructions that are holdovers from the Power. */
else if (strcmp (arg, "601") == 0)
ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_601;
/* -mppc, -mppc32, -m603, and -m604 mean to assemble for the
- Motorola PowerPC 603/604. */
+ Motorola PowerPC 603/604. */
else if (strcmp (arg, "ppc") == 0
|| strcmp (arg, "ppc32") == 0
|| strcmp (arg, "403") == 0
|| strcmp (arg, "604") == 0)
ppc_cpu = PPC_OPCODE_PPC;
else if (strcmp (arg, "7400") == 0)
- ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_ALTIVEC;
+ ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_ALTIVEC;
/* -mppc64 and -m620 mean to assemble for the 64-bit PowerPC
- 620. */
+ 620. */
else if (strcmp (arg, "ppc64") == 0 || strcmp (arg, "620") == 0)
{
ppc_cpu = PPC_OPCODE_PPC;
reg_names_p = false;
#ifdef OBJ_ELF
- /* -mrelocatable/-mrelocatable-lib -- warn about initializations that require relocation */
+ /* -mrelocatable/-mrelocatable-lib -- warn about initializations
+ that require relocation. */
else if (strcmp (arg, "relocatable") == 0)
{
- shlib = SHILB_MRELOCATABLE;
+ shlib = SHLIB_MRELOCATABLE;
ppc_flags |= EF_PPC_RELOCATABLE;
}
else if (strcmp (arg, "relocatable-lib") == 0)
{
- shlib = SHILB_MRELOCATABLE;
+ shlib = SHLIB_MRELOCATABLE;
ppc_flags |= EF_PPC_RELOCATABLE_LIB;
}
- /* -memb, set embedded bit */
+ /* -memb, set embedded bit. */
else if (strcmp (arg, "emb") == 0)
ppc_flags |= EF_PPC_EMB;
- /* -mlittle/-mbig set the endianess */
- else if (strcmp (arg, "little") == 0 || strcmp (arg, "little-endian") == 0)
+ /* -mlittle/-mbig set the endianess. */
+ else if (strcmp (arg, "little") == 0
+ || strcmp (arg, "little-endian") == 0)
{
target_big_endian = 0;
set_target_endian = 1;
md_show_usage (stream)
FILE *stream;
{
- fprintf(stream, _("\
+ fprintf (stream, _("\
PowerPC options:\n\
-u ignored\n\
-mpwrx, -mpwr2 generate code for IBM POWER/2 (RIOS2)\n\
-mregnames Allow symbolic names for registers\n\
-mno-regnames Do not allow symbolic names for registers\n"));
#ifdef OBJ_ELF
- fprintf(stream, _("\
+ fprintf (stream, _("\
-mrelocatable support for GCC's -mrelocatble option\n\
-mrelocatable-lib support for GCC's -mrelocatble-lib option\n\
-memb set PPC_EMB bit in ELF flags\n\
|| strcmp (default_cpu, "powerpcle") == 0)
ppc_cpu = PPC_OPCODE_PPC;
else
- as_fatal (_("Unknown default cpu = %s, os = %s"), default_cpu, default_os);
+ as_fatal (_("Unknown default cpu = %s, os = %s"),
+ default_cpu, default_os);
}
}
unsigned long
ppc_mach ()
{
- return (ppc_size == PPC_OPCODE_64) ? 620 : 0;
+ return ppc_size == PPC_OPCODE_64 ? 620 : 0;
}
int
-ppc_subseg_align()
+ppc_subseg_align ()
{
- return (ppc_xcoff64) ? 3 : 2;
+ return ppc_xcoff64 ? 3 : 2;
}
-extern char*
-ppc_target_format()
+extern char*
+ppc_target_format ()
{
#ifdef OBJ_COFF
#ifdef TE_PE
- return (target_big_endian ? "pe-powerpc" : "pe-powerpcle");
+ return target_big_endian ? "pe-powerpc" : "pe-powerpcle";
#elif TE_POWERMAC
#else
- return (ppc_xcoff64 ? "aixcoff64-rs6000" : "aixcoff-rs6000");
+ return ppc_xcoff64 ? "aixcoff64-rs6000" : "aixcoff-rs6000";
#endif
#ifdef TE_POWERMAC
return "xcoff-powermac";
#endif
#endif
#ifdef OBJ_ELF
- return (target_big_endian ? "elf32-powerpc" : "elf32-powerpcle");
+ return target_big_endian ? "elf32-powerpc" : "elf32-powerpcle";
#endif
}
ppc_set_cpu ();
#ifdef OBJ_ELF
- /* Set the ELF flags if desired. */
+ /* Set the ELF flags if desired. */
if (ppc_flags && !msolaris)
bfd_set_private_flags (stdoutput, ppc_flags);
#endif
retval = hash_insert (ppc_hash, op->name, (PTR) op);
if (retval != (const char *) NULL)
{
- /* Ignore Power duplicates for -m601 */
+ /* Ignore Power duplicates for -m601. */
if ((ppc_cpu & PPC_OPCODE_601) != 0
&& (op->flags & PPC_OPCODE_POWER) != 0)
continue;
- as_bad (_("Internal assembler error for instruction %s"), op->name);
+ as_bad (_("Internal assembler error for instruction %s"),
+ op->name);
dup_insn = true;
}
}
if (dup_insn)
abort ();
- /* Tell the main code what the endianness is if it is not overidden by the user. */
+ /* Tell the main code what the endianness is if it is not overidden
+ by the user. */
if (!set_target_endian)
{
set_target_endian = 1;
#ifdef TE_PE
ppc_current_section = text_section;
- ppc_previous_section = 0;
+ ppc_previous_section = 0;
#endif
}
int len;
struct map_bfd *ptr;
-#define MAP(str,reloc) { str, sizeof(str)-1, reloc }
+#define MAP(str,reloc) { str, sizeof (str)-1, reloc }
static struct map_bfd mapping[] = {
MAP ("l", BFD_RELOC_LO16),
MAP ("got@l", BFD_RELOC_LO16_GOTOFF),
MAP ("got@h", BFD_RELOC_HI16_GOTOFF),
MAP ("got@ha", BFD_RELOC_HI16_S_GOTOFF),
- MAP ("fixup", BFD_RELOC_CTOR), /* warnings with -mrelocatable */
+ MAP ("fixup", BFD_RELOC_CTOR), /* warnings with -mrelocatable */
MAP ("plt", BFD_RELOC_24_PLT_PCREL),
MAP ("pltrel24", BFD_RELOC_24_PLT_PCREL),
MAP ("copy", BFD_RELOC_PPC_COPY),
MAP ("relsda", BFD_RELOC_PPC_EMB_RELSDA),
MAP ("xgot", BFD_RELOC_PPC_TOC16),
- { (char *)0, 0, BFD_RELOC_UNUSED }
+ { (char *) 0, 0, BFD_RELOC_UNUSED }
};
if (*str++ != '@')
|| ptr->reloc == BFD_RELOC_HI16_S_GOTOFF))
as_warn (_("identifier+constant@got means identifier@got+constant"));
- /* Now check for identifier@suffix+constant */
+ /* Now check for identifier@suffix+constant. */
if (*str == '-' || *str == '+')
{
char *orig_line = input_line_pointer;
return BFD_RELOC_UNUSED;
}
-/* Like normal .long/.short/.word, except support @got, etc. */
-/* clobbers input_line_pointer, checks */
-/* end-of-line. */
+/* Like normal .long/.short/.word, except support @got, etc.
+ Clobbers input_line_pointer, checks end-of-line. */
static void
ppc_elf_cons (nbytes)
register int nbytes; /* 1=.byte, 2=.word, 4=.long */
expression (&exp);
if (exp.X_op == O_symbol
&& *input_line_pointer == '@'
- && (reloc = ppc_elf_suffix (&input_line_pointer, &exp)) != BFD_RELOC_UNUSED)
+ && (reloc = ppc_elf_suffix (&input_line_pointer,
+ &exp)) != BFD_RELOC_UNUSED)
{
- reloc_howto_type *reloc_howto = bfd_reloc_type_lookup (stdoutput, reloc);
- int size = bfd_get_reloc_size (reloc_howto);
+ reloc_howto_type *reloc_howto;
+ int size;
+
+ reloc_howto = bfd_reloc_type_lookup (stdoutput, reloc);
+ size = bfd_get_reloc_size (reloc_howto);
if (size > nbytes)
- as_bad (_("%s relocations do not fit in %d bytes\n"), reloc_howto->name, nbytes);
+ as_bad (_("%s relocations do not fit in %d bytes\n"),
+ reloc_howto->name, nbytes);
else
{
register char *p = frag_more ((int) nbytes);
int offset = nbytes - size;
- fix_new_exp (frag_now, p - frag_now->fr_literal + offset, size, &exp, 0, reloc);
+ fix_new_exp (frag_now, p - frag_now->fr_literal + offset, size,
+ &exp, 0, reloc);
}
}
else
}
while (*input_line_pointer++ == ',');
- input_line_pointer--; /* Put terminator back into stream. */
+ /* Put terminator back into stream. */
+ input_line_pointer--;
demand_empty_rest_of_line ();
}
char *save_line = input_line_pointer;
static char section[] = ".rodata\n";
- /* Just pretend this is .section .rodata */
+ /* Just pretend this is .section .rodata */
input_line_pointer = section;
obj_elf_section (xxx);
input_line_pointer = save_line;
}
-/* Pseudo op to make file scope bss items */
+/* Pseudo op to make file scope bss items. */
static void
-ppc_elf_lcomm(xxx)
+ppc_elf_lcomm (xxx)
int xxx ATTRIBUTE_UNUSED;
{
register char *name;
name = input_line_pointer;
c = get_symbol_end ();
- /* just after name is now '\0' */
+ /* just after name is now '\0'. */
p = input_line_pointer;
*p = c;
SKIP_WHITESPACE ();
return;
}
- /* allocate_bss: */
+ /* Allocate_bss. */
old_sec = now_seg;
old_subsec = now_subseg;
if (align)
{
- /* convert to a power of 2 alignment */
+ /* Convert to a power of 2 alignment. */
for (align2 = 0; (align & 1) == 0; align >>= 1, ++align2);
if (align != 1)
{
case SHLIB_PIC:
return;
- case SHILB_MRELOCATABLE:
+ case SHLIB_MRELOCATABLE:
if (fixp->fx_r_type <= BFD_RELOC_UNUSED
&& fixp->fx_r_type != BFD_RELOC_16_GOTOFF
&& fixp->fx_r_type != BFD_RELOC_HI16_GOTOFF
#ifdef TE_PE
/*
- * Summary of parse_toc_entry().
+ * Summary of parse_toc_entry.
*
* in: Input_line_pointer points to the '[' in one of:
*
*
* Anything else is an error of one kind or another.
*
- * out:
+ * out:
* return value: success or failure
* toc_kind: kind of toc reference
* input_line_pointer:
*
*/
-enum toc_size_qualifier
-{
+enum toc_size_qualifier
+{
default_toc, /* The toc cell constructed should be the system default size */
data_in_toc, /* This is a direct reference to a toc cell */
must_be_32, /* The toc cell constructed must be 32 bits wide */
};
static int
-parse_toc_entry(toc_kind)
+parse_toc_entry (toc_kind)
enum toc_size_qualifier *toc_kind;
{
char *start;
char c;
enum toc_size_qualifier t;
- /* save the input_line_pointer */
+ /* Save the input_line_pointer. */
start = input_line_pointer;
- /* skip over the '[' , and whitespace */
+ /* Skip over the '[' , and whitespace. */
++input_line_pointer;
SKIP_WHITESPACE ();
-
- /* find the spelling of the operand */
+
+ /* Find the spelling of the operand. */
toc_spec = input_line_pointer;
c = get_symbol_end ();
- if (strcmp(toc_spec, "toc") == 0)
+ if (strcmp (toc_spec, "toc") == 0)
{
t = default_toc;
}
- else if (strcmp(toc_spec, "tocv") == 0)
+ else if (strcmp (toc_spec, "tocv") == 0)
{
t = data_in_toc;
}
- else if (strcmp(toc_spec, "toc32") == 0)
+ else if (strcmp (toc_spec, "toc32") == 0)
{
t = must_be_32;
}
- else if (strcmp(toc_spec, "toc64") == 0)
+ else if (strcmp (toc_spec, "toc64") == 0)
{
t = must_be_64;
}
else
{
as_bad (_("syntax error: invalid toc specifier `%s'"), toc_spec);
- *input_line_pointer = c; /* put back the delimiting char */
- input_line_pointer = start; /* reset input_line pointer */
+ *input_line_pointer = c;
+ input_line_pointer = start;
return 0;
}
- /* now find the ']' */
- *input_line_pointer = c; /* put back the delimiting char */
+ /* Now find the ']'. */
+ *input_line_pointer = c;
- SKIP_WHITESPACE (); /* leading whitespace could be there. */
- c = *input_line_pointer++; /* input_line_pointer->past char in c. */
+ SKIP_WHITESPACE (); /* leading whitespace could be there. */
+ c = *input_line_pointer++; /* input_line_pointer->past char in c. */
if (c != ']')
{
as_bad (_("syntax error: expected `]', found `%c'"), c);
- input_line_pointer = start; /* reset input_line pointer */
+ input_line_pointer = start;
return 0;
}
- *toc_kind = t; /* set return value */
+ *toc_kind = t;
return 1;
}
#endif
input_line_pointer = str;
#ifdef TE_PE
- if (*input_line_pointer == '[')
+ if (*input_line_pointer == '[')
{
/* We are expecting something like the second argument here:
-
- lwz r4,[toc].GS.0.static_int(rtoc)
- ^^^^^^^^^^^^^^^^^^^^^^^^^^^
- The argument following the `]' must be a symbol name, and the
- register must be the toc register: 'rtoc' or '2'
-
- The effect is to 0 as the displacement field
- in the instruction, and issue an IMAGE_REL_PPC_TOCREL16 (or
- the appropriate variation) reloc against it based on the symbol.
- The linker will build the toc, and insert the resolved toc offset.
-
- Note:
- o The size of the toc entry is currently assumed to be
- 32 bits. This should not be assumed to be a hard coded
- number.
- o In an effort to cope with a change from 32 to 64 bits,
- there are also toc entries that are specified to be
- either 32 or 64 bits:
- lwz r4,[toc32].GS.0.static_int(rtoc)
- lwz r4,[toc64].GS.0.static_int(rtoc)
- These demand toc entries of the specified size, and the
- instruction probably requires it.
- */
+ *
+ * lwz r4,[toc].GS.0.static_int(rtoc)
+ * ^^^^^^^^^^^^^^^^^^^^^^^^^^^
+ * The argument following the `]' must be a symbol name, and the
+ * register must be the toc register: 'rtoc' or '2'
+ *
+ * The effect is to 0 as the displacement field
+ * in the instruction, and issue an IMAGE_REL_PPC_TOCREL16 (or
+ * the appropriate variation) reloc against it based on the symbol.
+ * The linker will build the toc, and insert the resolved toc offset.
+ *
+ * Note:
+ * o The size of the toc entry is currently assumed to be
+ * 32 bits. This should not be assumed to be a hard coded
+ * number.
+ * o In an effort to cope with a change from 32 to 64 bits,
+ * there are also toc entries that are specified to be
+ * either 32 or 64 bits:
+ * lwz r4,[toc32].GS.0.static_int(rtoc)
+ * lwz r4,[toc64].GS.0.static_int(rtoc)
+ * These demand toc entries of the specified size, and the
+ * instruction probably requires it.
+ */
int valid_toc;
enum toc_size_qualifier toc_kind;
bfd_reloc_code_real_type toc_reloc;
- /* go parse off the [tocXX] part */
- valid_toc = parse_toc_entry(&toc_kind);
+ /* Go parse off the [tocXX] part. */
+ valid_toc = parse_toc_entry (&toc_kind);
- if (!valid_toc)
+ if (!valid_toc)
{
- /* Note: message has already been issued. */
- /* FIXME: what sort of recovery should we do? */
- /* demand_rest_of_line(); return; ? */
+ /* Note: message has already been issued.
+ FIXME: what sort of recovery should we do?
+ demand_rest_of_line (); return; ? */
}
- /* Now get the symbol following the ']' */
- expression(&ex);
+ /* Now get the symbol following the ']'. */
+ expression (&ex);
switch (toc_kind)
{
case default_toc:
- /* In this case, we may not have seen the symbol yet, since */
- /* it is allowed to appear on a .extern or .globl or just be */
- /* a label in the .data section. */
+ /* In this case, we may not have seen the symbol yet,
+ since it is allowed to appear on a .extern or .globl
+ or just be a label in the .data section. */
toc_reloc = BFD_RELOC_PPC_TOC16;
break;
case data_in_toc:
- /* 1. The symbol must be defined and either in the toc */
- /* section, or a global. */
- /* 2. The reloc generated must have the TOCDEFN flag set in */
- /* upper bit mess of the reloc type. */
- /* FIXME: It's a little confusing what the tocv qualifier can */
- /* be used for. At the very least, I've seen three */
- /* uses, only one of which I'm sure I can explain. */
- if (ex.X_op == O_symbol)
- {
+ /* 1. The symbol must be defined and either in the toc
+ section, or a global.
+ 2. The reloc generated must have the TOCDEFN flag set
+ in upper bit mess of the reloc type.
+ FIXME: It's a little confusing what the tocv
+ qualifier can be used for. At the very least, I've
+ seen three uses, only one of which I'm sure I can
+ explain. */
+ if (ex.X_op == O_symbol)
+ {
assert (ex.X_add_symbol != NULL);
if (symbol_get_bfdsym (ex.X_add_symbol)->section
!= tocdata_section)
{
- as_bad(_("[tocv] symbol is not a toc symbol"));
+ as_bad (_("[tocv] symbol is not a toc symbol"));
}
}
toc_reloc = BFD_RELOC_PPC_TOC16;
break;
case must_be_32:
- /* FIXME: these next two specifically specify 32/64 bit toc */
- /* entries. We don't support them today. Is this the */
- /* right way to say that? */
+ /* FIXME: these next two specifically specify 32/64 bit
+ toc entries. We don't support them today. Is this
+ the right way to say that? */
toc_reloc = BFD_RELOC_UNUSED;
as_bad (_("Unimplemented toc32 expression modifier"));
break;
case must_be_64:
- /* FIXME: see above */
+ /* FIXME: see above. */
toc_reloc = BFD_RELOC_UNUSED;
as_bad (_("Unimplemented toc64 expression modifier"));
break;
default:
- fprintf(stderr,
- _("Unexpected return value [%d] from parse_toc_entry!\n"),
- toc_kind);
- abort();
+ fprintf (stderr,
+ _("Unexpected return value [%d] from parse_toc_entry!\n"),
+ toc_kind);
+ abort ();
break;
}
fixups[fc].opindex = *opindex_ptr;
++fc;
- /* Ok. We've set up the fixup for the instruction. Now make it
- look like the constant 0 was found here */
+ /* Ok. We've set up the fixup for the instruction. Now make it
+ look like the constant 0 was found here. */
ex.X_unsigned = 1;
ex.X_op = O_constant;
ex.X_add_number = 0;
else if (ex.X_op == O_constant)
{
#ifdef OBJ_ELF
- /* Allow @HA, @L, @H on constants. */
+ /* Allow @HA, @L, @H on constants. */
char *orig_str = str;
if ((reloc = ppc_elf_suffix (&str, &ex)) != BFD_RELOC_UNUSED)
#ifdef OBJ_ELF
else if ((reloc = ppc_elf_suffix (&str, &ex)) != BFD_RELOC_UNUSED)
{
- /* For the absoulte forms of branchs, convert the PC relative form back into
- the absolute. */
+ /* For the absolute forms of branches, convert the PC
+ relative form back into the absolute. */
if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0)
{
switch (reloc)
f = frag_more (4);
md_number_to_chars (f, insn, 4);
+#ifdef OBJ_ELF
+ dwarf2_emit_insn (4);
+#endif
+
/* Create any fixups. At this point we do not use a
bfd_reloc_code_real_type, but instead just use the
BFD_RELOC_UNUSED plus the operand index. This lets us easily
operand = &powerpc_operands[fixups[i].opindex];
if (fixups[i].reloc != BFD_RELOC_UNUSED)
{
- reloc_howto_type *reloc_howto = bfd_reloc_type_lookup (stdoutput, fixups[i].reloc);
+ reloc_howto_type *reloc_howto;
int size;
int offset;
fixS *fixP;
+ reloc_howto = bfd_reloc_type_lookup (stdoutput, fixups[i].reloc);
if (!reloc_howto)
abort ();
offset = target_big_endian ? (4 - size) : 0;
if (size < 1 || size > 4)
- abort();
+ abort ();
- fixP = fix_new_exp (frag_now, f - frag_now->fr_literal + offset, size,
- &fixups[i].exp, reloc_howto->pc_relative,
+ fixP = fix_new_exp (frag_now,
+ f - frag_now->fr_literal + offset,
+ size,
+ &fixups[i].exp,
+ reloc_howto->pc_relative,
fixups[i].reloc);
/* Turn off complaints that the addend is too large for things like
}
}
else
- fix_new_exp (frag_now, f - frag_now->fr_literal, 4,
+ fix_new_exp (frag_now,
+ f - frag_now->fr_literal,
+ 4,
&fixups[i].exp,
(operand->flags & PPC_OPERAND_RELATIVE) != 0,
((bfd_reloc_code_real_type)
- (fixups[i].opindex + (int) BFD_RELOC_UNUSED)));
+ (fixups[i].opindex + (int) BFD_RELOC_UNUSED)));
}
}
if (s == (char *) NULL)
break;
*s++ = '\0';
- }
+ }
if (count != macro->operands)
{
/* Assemble the constructed instruction. */
md_assemble (complete);
-}
+}
\f
#ifdef OBJ_ELF
-/* For ELF, add support for SHF_EXCLUDE and SHT_ORDERED */
+/* For ELF, add support for SHF_EXCLUDE and SHT_ORDERED. */
int
ppc_section_letter (letter, ptr_msg)
/* The .comm and .lcomm pseudo-ops for XCOFF. XCOFF puts common
symbols in the .bss segment as though they were local common
- symbols, and uses a different smclas. */
+ symbols, and uses a different smclas. The native Aix 4.3.3 assember
+ aligns .comm and .lcomm to 4 bytes. */
static void
ppc_comm (lcomm)
{
/* The third argument to .comm is the alignment. */
if (*input_line_pointer != ',')
- align = 3;
+ align = 2;
else
{
++input_line_pointer;
if (align <= 0)
{
as_warn (_("ignoring bad alignment"));
- align = 3;
+ align = 2;
}
}
}
char *lcomm_name;
char lcomm_endc;
- if (size <= 1)
- align = 0;
- else if (size <= 2)
- align = 1;
- else if (size <= 4)
+ if (size <= 4)
align = 2;
else
align = 3;
lcomm_name = input_line_pointer;
lcomm_endc = get_symbol_end ();
-
+
lcomm_sym = symbol_find_or_make (lcomm_name);
*input_line_pointer = lcomm_endc;
ignore_rest_of_line ();
return;
}
-
+
record_alignment (bss_section, align);
-
+
if (! lcomm
|| ! S_IS_DEFINED (lcomm_sym))
{
subseg_set (bss_section, 1);
frag_align (align, 0, 0);
-
+
symbol_set_frag (def_sym, frag_now);
pfrag = frag_var (rs_org, 1, 1, (relax_substateT) 0, def_sym,
def_size, (char *) NULL);
name = input_line_pointer;
endc = get_symbol_end ();
-
+
sym = symbol_find_or_make (name);
*input_line_pointer = endc;
}
/* We set the obstack chunk size to a small value before
- changing subsegments, so that we don't use a lot of memory
- space for what may be a small section. */
+ changing subsegments, so that we don't use a lot of memory
+ space for what may be a small section. */
hold_chunksize = chunksize;
chunksize = 64;
symbol_get_tc (sym)->align = (ppc_xcoff64) ? 3 : 2;
symbol_get_tc (sym)->output = 1;
symbol_get_tc (sym)->within = sym;
-
+
for (list = *list_ptr;
symbol_get_tc (list)->next != (symbolS *) NULL;
list = symbol_get_tc (list)->next)
;
symbol_get_tc (list)->next = sym;
-
+
symbol_remove (sym, &symbol_rootP, &symbol_lastP);
symbol_append (sym, symbol_get_tc (list)->within, &symbol_rootP,
&symbol_lastP);
default:
/* The value is some complex expression. This will probably
- fail at some later point, but this is probably the right
- thing to do here. */
+ fail at some later point, but this is probably the right
+ thing to do here. */
symbol_set_value_expression (sym, &exp);
break;
}
symbol_get_tc (sym)->output = 1;
- if (S_GET_STORAGE_CLASS (sym) == C_STSYM)
+ if (S_GET_STORAGE_CLASS (sym) == C_STSYM) {
+
symbol_get_tc (sym)->within = ppc_current_block;
+ /* In this case :
+
+ .bs name
+ .stabx "z",arrays_,133,0
+ .es
+
+ .comm arrays_,13768,3
+
+ resolve_symbol_value will copy the exp's "within" into sym's when the
+ offset is 0. Since this seems to be corner case problem,
+ only do the correction for storage class C_STSYM. A better solution
+ would be to have the tc field updated in ppc_symbol_new_hook. */
+
+ if (exp.X_op == O_symbol)
+ {
+ symbol_get_tc (exp.X_add_symbol)->within = ppc_current_block;
+ }
+ }
+
if (exp.X_op != O_symbol
|| ! S_IS_EXTERNAL (exp.X_add_symbol)
|| S_GET_SEGMENT (exp.X_add_symbol) != bss_section)
S_SET_STORAGE_CLASS (sym, ei ? C_EINCL : C_BINCL);
symbol_get_tc (sym)->output = 1;
-
+
for (look = last_biei ? last_biei : symbol_rootP;
(look != (symbolS *) NULL
&& (S_GET_STORAGE_CLASS (look) == C_FILE
subsegT subseg;
symbolS *sym;
symbolS *list;
-
+
subseg = ppc_data_subsegment;
++ppc_data_subsegment;
symbol_get_tc (sym)->within = sym;
ppc_toc_csect = sym;
-
+
for (list = ppc_data_csects;
symbol_get_tc (list)->next != (symbolS *) NULL;
list = symbol_get_tc (list)->next)
}
static void
-ppc_machine(dummy)
+ppc_machine(dummy)
int dummy ATTRIBUTE_UNUSED;
{
discard_rest_of_line();
\f
#ifdef TE_PE
-/* Pseudo-ops specific to the Windows NT PowerPC PE (coff) format */
+/* Pseudo-ops specific to the Windows NT PowerPC PE (coff) format. */
/* Set the current section. */
static void
/* pseudo-op: .previous
behaviour: toggles the current section with the previous section.
errors: None
- warnings: "No previous section"
-*/
+ warnings: "No previous section" */
+
static void
-ppc_previous(ignore)
+ppc_previous (ignore)
int ignore ATTRIBUTE_UNUSED;
{
symbolS *tmp;
- if (ppc_previous_section == NULL)
+ if (ppc_previous_section == NULL)
{
- as_warn(_("No previous section to return to. Directive ignored."));
+ as_warn (_("No previous section to return to. Directive ignored."));
return;
}
- subseg_set(ppc_previous_section, 0);
+ subseg_set (ppc_previous_section, 0);
- ppc_set_current_section(ppc_previous_section);
+ ppc_set_current_section (ppc_previous_section);
}
/* pseudo-op: .pdata
commentary:
Tag index tables (also known as the function table) for exception
- handling, debugging, etc.
+ handling, debugging, etc. */
-*/
static void
-ppc_pdata(ignore)
+ppc_pdata (ignore)
int ignore ATTRIBUTE_UNUSED;
{
- if (pdata_section == 0)
+ if (pdata_section == 0)
{
pdata_section = subseg_new (".pdata", 0);
-
+
bfd_set_section_flags (stdoutput, pdata_section,
(SEC_ALLOC | SEC_LOAD | SEC_RELOC
| SEC_READONLY | SEC_DATA ));
-
+
bfd_set_section_alignment (stdoutput, pdata_section, 2);
}
else
{
- pdata_section = subseg_new(".pdata", 0);
+ pdata_section = subseg_new (".pdata", 0);
}
- ppc_set_current_section(pdata_section);
+ ppc_set_current_section (pdata_section);
}
/* pseudo-op: .ydata
3 - double word aligned (that would be 4 byte boundary)
commentary:
Tag tables (also known as the scope table) for exception handling,
- debugging, etc.
-*/
+ debugging, etc. */
+
static void
-ppc_ydata(ignore)
+ppc_ydata (ignore)
int ignore ATTRIBUTE_UNUSED;
{
- if (ydata_section == 0)
+ if (ydata_section == 0)
{
ydata_section = subseg_new (".ydata", 0);
bfd_set_section_flags (stdoutput, ydata_section,
- (SEC_ALLOC | SEC_LOAD | SEC_RELOC
- | SEC_READONLY | SEC_DATA ));
+ (SEC_ALLOC | SEC_LOAD | SEC_RELOC
+ | SEC_READONLY | SEC_DATA ));
bfd_set_section_alignment (stdoutput, ydata_section, 3);
}
{
ydata_section = subseg_new (".ydata", 0);
}
- ppc_set_current_section(ydata_section);
+ ppc_set_current_section (ydata_section);
}
/* pseudo-op: .reldata
commentary:
Like .data, but intended to hold data subject to relocation, such as
- function descriptors, etc.
-*/
+ function descriptors, etc. */
+
static void
-ppc_reldata(ignore)
+ppc_reldata (ignore)
int ignore ATTRIBUTE_UNUSED;
{
if (reldata_section == 0)
reldata_section = subseg_new (".reldata", 0);
bfd_set_section_flags (stdoutput, reldata_section,
- ( SEC_ALLOC | SEC_LOAD | SEC_RELOC
- | SEC_DATA ));
+ (SEC_ALLOC | SEC_LOAD | SEC_RELOC
+ | SEC_DATA));
bfd_set_section_alignment (stdoutput, reldata_section, 2);
}
{
reldata_section = subseg_new (".reldata", 0);
}
- ppc_set_current_section(reldata_section);
+ ppc_set_current_section (reldata_section);
}
/* pseudo-op: .rdata
initial: .section .rdata "dr3"
d - initialized data
r - readable
- 3 - double word aligned (that would be 4 byte boundary)
-*/
+ 3 - double word aligned (that would be 4 byte boundary) */
+
static void
-ppc_rdata(ignore)
+ppc_rdata (ignore)
int ignore ATTRIBUTE_UNUSED;
{
if (rdata_section == 0)
{
rdata_section = subseg_new (".rdata", 0);
}
- ppc_set_current_section(rdata_section);
+ ppc_set_current_section (rdata_section);
}
/* pseudo-op: .ualong
- behaviour: much like .int, with the exception that no alignment is
+ behaviour: much like .int, with the exception that no alignment is
performed.
FIXME: test the alignment statement
errors: None
- warnings: None
-*/
+ warnings: None */
+
static void
-ppc_ualong(ignore)
+ppc_ualong (ignore)
int ignore ATTRIBUTE_UNUSED;
{
- /* try for long */
- cons ( 4 );
+ /* Try for long. */
+ cons (4);
}
/* pseudo-op: .znop <symbol name>
Issue a IMAGE_REL_PPC_IFGLUE relocation against it, using
the supplied symbol name.
errors: None
- warnings: Missing symbol name
-*/
+ warnings: Missing symbol name */
+
static void
-ppc_znop(ignore)
+ppc_znop (ignore)
int ignore ATTRIBUTE_UNUSED;
{
unsigned long insn;
const struct powerpc_opcode *opcode;
expressionS ex;
char *f;
-
symbolS *sym;
-
- /* Strip out the symbol name */
char *symbol_name;
char c;
char *name;
flagword flags;
asection *sec;
+ /* Strip out the symbol name. */
symbol_name = input_line_pointer;
c = get_symbol_end ();
/* Look up the opcode in the hash table. */
opcode = (const struct powerpc_opcode *) hash_find (ppc_hash, "nop");
- /* stick in the nop */
+ /* Stick in the nop. */
insn = opcode->opcode;
/* Write out the instruction. */
}
-/* pseudo-op:
- behaviour:
- errors:
- warnings:
-*/
+/* pseudo-op:
+ behaviour:
+ errors:
+ warnings: */
+
static void
-ppc_pe_comm(lcomm)
+ppc_pe_comm (lcomm)
int lcomm;
{
register char *name;
name = input_line_pointer;
c = get_symbol_end ();
- /* just after name is now '\0' */
+ /* just after name is now '\0'. */
p = input_line_pointer;
*p = c;
SKIP_WHITESPACE ();
* additions/changes for the moto-pas assembler support. There are three
* categories:
*
- * FIXME: I just noticed this. This doesn't work at all really. It it
+ * FIXME: I just noticed this. This doesn't work at all really. It it
* setting bits that bfd probably neither understands or uses. The
* correct approach (?) will have to incorporate extra fields attached
* to the section to hold the system specific stuff. (krk)
ppc_pe_section (ignore)
int ignore ATTRIBUTE_UNUSED;
{
- /* Strip out the section name */
+ /* Strip out the section name. */
char *section_name;
char c;
char *name;
align = 1;
}
else
- align = 4; /* default alignment to 16 byte boundary */
+ /* Default alignment to 16 byte boundary. */
+ align = 4;
if (*input_line_pointer == ',')
{
as_bad (_("Unsupported section attribute -- 'a'"));
break;
case 'c': /* code section */
- flags |= SEC_CODE;
+ flags |= SEC_CODE;
break;
case 'd': /* section has initialized data */
flags |= SEC_DATA;
flags |= SEC_HAS_CONTENTS;
break;
case 'n': /* section can be discarded */
- flags &=~ SEC_LOAD;
+ flags &=~ SEC_LOAD;
break;
case 'R': /* Remove section at link time */
flags |= SEC_NEVER_LOAD;
break;
default:
- as_bad(_("unknown section attribute '%c'"),
- *input_line_pointer);
+ as_bad (_("unknown section attribute '%c'"),
+ *input_line_pointer);
break;
}
++input_line_pointer;
sec = subseg_new (name, (subsegT) exp);
- ppc_set_current_section(sec);
+ ppc_set_current_section (sec);
if (flags != SEC_NO_FLAGS)
{
bfd_errmsg (bfd_get_error ()));
}
- bfd_set_section_alignment(stdoutput, sec, align);
+ bfd_set_section_alignment (stdoutput, sec, align);
}
if (tocdata_section == 0)
{
tocdata_section = subseg_new (".tocd", 0);
- /* FIXME: section flags won't work */
+ /* FIXME: section flags won't work. */
bfd_set_section_flags (stdoutput, tocdata_section,
(SEC_ALLOC | SEC_LOAD | SEC_RELOC
- | SEC_READONLY | SEC_DATA ));
+ | SEC_READONLY | SEC_DATA));
bfd_set_section_alignment (stdoutput, tocdata_section, 2);
}
rdata_section = subseg_new (".tocd", 0);
}
- ppc_set_current_section(tocdata_section);
+ ppc_set_current_section (tocdata_section);
demand_empty_rest_of_line ();
}
ppc_last_function = sym;
if (symbol_get_tc (sym)->size != (symbolS *) NULL)
{
- resolve_symbol_value (symbol_get_tc (sym)->size, 1);
+ resolve_symbol_value (symbol_get_tc (sym)->size);
SA_SET_SYM_FSIZE (sym,
(long) S_GET_VALUE (symbol_get_tc (sym)->size));
}
- S_GET_VALUE (sym));
else
{
- resolve_symbol_value (symbol_get_tc (sym)->next, 1);
+ resolve_symbol_value (symbol_get_tc (sym)->next);
a->x_csect.x_scnlen.l = (S_GET_VALUE (symbol_get_tc (sym)->next)
- S_GET_VALUE (sym));
}
else if (S_GET_SEGMENT (sym) == absolute_section)
{
/* This is an absolute symbol. The csect will be created by
- ppc_adjust_symtab. */
+ ppc_adjust_symtab. */
ppc_saw_abs = true;
a->x_csect.x_smtyp = XTY_LD;
if (symbol_get_tc (sym)->class == -1)
}
else
{
- resolve_symbol_value (next, 1);
+ resolve_symbol_value (next);
a->x_csect.x_scnlen.l = (S_GET_VALUE (next)
- S_GET_VALUE (sym));
}
{
while (symbol_get_tc (csect)->next != (symbolS *) NULL)
{
- resolve_symbol_value (symbol_get_tc (csect)->next, 1);
+ resolve_symbol_value (symbol_get_tc (csect)->next);
if (S_GET_VALUE (symbol_get_tc (csect)->next)
> S_GET_VALUE (sym))
break;
}
a->x_csect.x_smtyp = XTY_LD;
}
-
+
a->x_csect.x_parmhash = 0;
a->x_csect.x_snhash = 0;
if (symbol_get_tc (sym)->class == -1)
/* The value is the offset from the enclosing csect. */
block = symbol_get_tc (sym)->within;
csect = symbol_get_tc (block)->within;
- resolve_symbol_value (csect, 1);
+ resolve_symbol_value (csect);
S_SET_VALUE (sym, S_GET_VALUE (sym) - S_GET_VALUE (csect));
}
else if (S_GET_STORAGE_CLASS (sym) == C_BINCL
|| S_GET_STORAGE_CLASS (sym) == C_EINCL)
{
/* We want the value to be a file offset into the line numbers.
- BFD will do that for us if we set the right flags. We have
- already set the value correctly. */
+ BFD will do that for us if we set the right flags. We have
+ already set the value correctly. */
coffsymbol (symbol_get_bfdsym (sym))->native->fix_line = 1;
}
litp += 2;
}
}
-
+
return NULL;
}
/* We have no need to default values of symbols. */
-/*ARGSUSED*/
symbolS *
md_undefined_symbol (name)
char *name ATTRIBUTE_UNUSED;
{
valueT val;
- resolve_symbol_value (fix->fx_addsy, 1);
+ resolve_symbol_value (fix->fx_addsy);
val = S_GET_VALUE (fix->fx_addsy);
if (ppc_toc_csect != (symbolS *) NULL
&& fix->fx_addsy != (symbolS *) NULL
continue;
if (symbol_get_tc (sy)->class != XMC_TC)
break;
- resolve_symbol_value (sy, 1);
+ resolve_symbol_value (sy);
if (val == S_GET_VALUE (sy))
{
fix->fx_addsy = sy;
<= val))
{
/* If the csect address equals the symbol value, then we
- have to look through the full symbol table to see
- whether this is the csect we want. Note that we will
- only get here if the csect has zero length. */
+ have to look through the full symbol table to see
+ whether this is the csect we want. Note that we will
+ only get here if the csect has zero length. */
if ((symbol_get_frag (csect)->fr_address == val)
&& S_GET_VALUE (csect) == S_GET_VALUE (fix->fx_addsy))
{
}
/* If we found the symbol before the next csect
- symbol, then this is the csect we want. */
+ symbol, then this is the csect we want. */
if (scan == fix->fx_addsy)
break;
}
&& S_GET_SEGMENT (fix->fx_addsy) == bss_section
&& ! S_IS_EXTERNAL (fix->fx_addsy))
{
- resolve_symbol_value (symbol_get_frag (fix->fx_addsy)->fr_symbol, 1);
+ resolve_symbol_value (symbol_get_frag (fix->fx_addsy)->fr_symbol);
fix->fx_offset +=
(S_GET_VALUE (fix->fx_addsy)
- S_GET_VALUE (symbol_get_frag (fix->fx_addsy)->fr_symbol));
case BFD_RELOC_CTOR:
if (fixp->fx_pcrel)
fixp->fx_r_type = BFD_RELOC_32_PCREL;
- /* fall through */
+ /* fall through */
case BFD_RELOC_RVA:
case BFD_RELOC_32_PCREL:
case BFD_RELOC_64:
if (fixp->fx_pcrel)
fixp->fx_r_type = BFD_RELOC_64_PCREL;
- /* fall through */
+ /* fall through */
case BFD_RELOC_64_PCREL:
md_number_to_chars (fixp->fx_frag->fr_literal + fixp->fx_where,
value, 8);
- break;
+ break;
case BFD_RELOC_LO16:
case BFD_RELOC_16:
case BFD_RELOC_GPREL16:
break;
/* Because SDA21 modifies the register field, the size is set to 4
- bytes, rather than 2, so offset it here appropriately */
+ bytes, rather than 2, so offset it here appropriately. */
case BFD_RELOC_PPC_EMB_SDA21:
if (fixp->fx_pcrel)
abort ();
abort ();
if (fixp->fx_done)
- {
- char *where;
- unsigned long insn;
-
- /* Fetch the instruction, insert the fully resolved operand
- value, and stuff the instruction back again. */
- where = fixp->fx_frag->fr_literal + fixp->fx_where;
- if (target_big_endian)
- insn = bfd_getb32 ((unsigned char *) where);
- else
- insn = bfd_getl32 ((unsigned char *) where);
- if ((value & 3) != 0)
- as_bad_where (fixp->fx_file, fixp->fx_line,
- _("must branch to an address a multiple of 4"));
- if ((offsetT) value < -0x40000000
- || (offsetT) value >= 0x40000000)
- as_bad_where (fixp->fx_file, fixp->fx_line,
- _("@local or @plt branch destination is too far away, %ld bytes"),
- value);
- insn = insn | (value & 0x03fffffc);
- if (target_big_endian)
- bfd_putb32 ((bfd_vma) insn, (unsigned char *) where);
- else
- bfd_putl32 ((bfd_vma) insn, (unsigned char *) where);
- }
+ {
+ char *where;
+ unsigned long insn;
+
+ /* Fetch the instruction, insert the fully resolved operand
+ value, and stuff the instruction back again. */
+ where = fixp->fx_frag->fr_literal + fixp->fx_where;
+ if (target_big_endian)
+ insn = bfd_getb32 ((unsigned char *) where);
+ else
+ insn = bfd_getl32 ((unsigned char *) where);
+ if ((value & 3) != 0)
+ as_bad_where (fixp->fx_file, fixp->fx_line,
+ _("must branch to an address a multiple of 4"));
+ if ((offsetT) value < -0x40000000
+ || (offsetT) value >= 0x40000000)
+ as_bad_where (fixp->fx_file, fixp->fx_line,
+ _("@local or @plt branch destination is too far away, %ld bytes"),
+ (long) value);
+ insn = insn | (value & 0x03fffffc);
+ if (target_big_endian)
+ bfd_putb32 ((bfd_vma) insn, (unsigned char *) where);
+ else
+ bfd_putl32 ((bfd_vma) insn, (unsigned char *) where);
+ }
break;
case BFD_RELOC_VTABLE_INHERIT:
break;
default:
- fprintf(stderr,
- _("Gas failure, reloc value %d\n"), fixp->fx_r_type);
- fflush(stderr);
+ fprintf (stderr,
+ _("Gas failure, reloc value %d\n"), fixp->fx_r_type);
+ fflush (stderr);
abort ();
}
}
if (reloc->howto == (reloc_howto_type *) NULL)
{
as_bad_where (fixp->fx_file, fixp->fx_line,
- _("reloc %d not supported by object file format"), (int)fixp->fx_r_type);
+ _("reloc %d not supported by object file format"),
+ (int) fixp->fx_r_type);
return NULL;
}
reloc->addend = fixp->fx_addnumber;
projects / deliverable / binutils-gdb.git / blobdiff