[ARC] Improve parsing instruction operands.

[deliverable/binutils-gdb.git] / gas / config / tc-pru.c

diff --git a/gas/config/tc-pru.c b/gas/config/tc-pru.c
index 5121b1f8a4c4703e7bea95ee8f756d10bbea9ca5..9094b0a3f657a19edd1e74705b74cb5d821d4a36 100644 (file)
--- a/gas/config/tc-pru.c
+++ b/gas/config/tc-pru.c
@@ -1,5 +1,5 @@
 /* TI PRU assembler.
-   Copyright (C) 2014-2018 Free Software Foundation, Inc.
+   Copyright (C) 2014-2020 Free Software Foundation, Inc.
    Contributed by Dimitar Dimitrov <dimitar@dinux.eu>
    Based on tc-nios2.c
 
@@ -642,7 +642,6 @@ md_apply_fix (fixS *fixP, valueT *valP, segT seg ATTRIBUTE_UNUSED)
 {
   unsigned char *where;
   valueT value = *valP;
-  long n;
 
   /* Assert that the fixup is one we can handle.  */
   gas_assert (fixP != NULL && valP != NULL
@@ -801,11 +800,13 @@ md_apply_fix (fixS *fixP, valueT *valP, segT seg ATTRIBUTE_UNUSED)
            pru_diagnose_overflow (fixup, howto, fixP, insn);
 
          /* Apply the right shift.  */
-         fixup = ((offsetT)fixup) >> howto->rightshift;
+         fixup = (offsetT) fixup >> howto->rightshift;
 
          /* Truncate the fixup to right size.  */
-         n = sizeof (fixup) * 8 - howto->bitsize;
-         fixup = (fixup << n) >> n;
+         if (howto->bitsize == 0)
+           fixup = 0;
+         else
+           fixup &= ((valueT) 2 << (howto->bitsize - 1)) - 1;
 
          /* Fix up the instruction.  Non-contiguous bitfields need
             special handling.  */
@@ -1745,7 +1746,7 @@ md_assemble (char *op_str)
 valueT
 md_section_align (asection *seg, valueT addr)
 {
-  int align = bfd_get_section_alignment (stdoutput, seg);
+  int align = bfd_section_alignment (seg);
   return ((addr + (1 << align) - 1) & (-((valueT) 1 << align)));
 }
 
@@ -1920,14 +1921,28 @@ pru_cons_fix_new (fragS *frag, int where, unsigned int nbytes,
 }
 
 /* Implement tc_regname_to_dw2regnum, to convert REGNAME to a DWARF-2
-   register number.  */
+   register number.  Return the starting HW byte-register number.  */
+
 int
 pru_regname_to_dw2regnum (char *regname)
 {
+  static const unsigned int regstart[RSEL_NUM_ITEMS] =
+    {
+     [RSEL_7_0]          = 0,
+     [RSEL_15_8]  = 1,
+     [RSEL_23_16] = 2,
+     [RSEL_31_24] = 3,
+     [RSEL_15_0]  = 0,
+     [RSEL_23_8]  = 1,
+     [RSEL_31_16] = 2,
+     [RSEL_31_0]  = 0,
+    };
+
   struct pru_reg *r = pru_reg_lookup (regname);
-  if (r == NULL)
+
+  if (r == NULL || r->regsel >= RSEL_NUM_ITEMS)
     return -1;
-  return r->index;
+  return r->index * 4 + regstart[r->regsel];
 }
 
 /* Implement tc_cfi_frame_initial_instructions, to initialize the DWARF-2
@@ -1935,7 +1950,7 @@ pru_regname_to_dw2regnum (char *regname)
 void
 pru_frame_initial_instructions (void)
 {
-  const unsigned fp_regno = 4;
+  const unsigned fp_regno = 4 * 4;
   cfi_add_CFA_def_cfa (fp_regno, 0);
 }