/* tc-sparc.c -- Assemble for the SPARC
- Copyright (C) 1989, 90, 91, 92, 93, 94, 95, 96, 97, 98, 99, 2000
+ Copyright 1989, 1990, 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
+ 1999, 2000, 2001, 2002, 2003, 2004, 2005
Free Software Foundation, Inc.
This file is part of GAS, the GNU Assembler.
You should have received a copy of the GNU General Public
License along with GAS; see the file COPYING. If not, write
- to the Free Software Foundation, 59 Temple Place - Suite 330,
- Boston, MA 02111-1307, USA. */
+ to the Free Software Foundation, 51 Franklin Street - Fifth Floor,
+ Boston, MA 02110-1301, USA. */
#include <stdio.h>
-#include <ctype.h>
#include "as.h"
+#include "safe-ctype.h"
#include "subsegs.h"
#include "opcode/sparc.h"
+#include "dw2gencfi.h"
#ifdef OBJ_ELF
#include "elf/sparc.h"
+#include "dwarf2dbg.h"
#endif
+/* Some ancient Sun C compilers would not take such hex constants as
+ unsigned, and would end up sign-extending them to form an offsetT,
+ so use these constants instead. */
+#define U0xffffffff ((((unsigned long) 1 << 16) << 16) - 1)
+#define U0x80000000 ((((unsigned long) 1 << 16) << 15))
+
static struct sparc_arch *lookup_arch PARAMS ((char *));
static void init_default_arch PARAMS ((void));
static int sparc_ip PARAMS ((char *, const struct sparc_opcode **));
/* Symbols for global registers on v9. */
static symbolS *globals[8];
+/* The dwarf2 data alignment, adjusted for 32 or 64 bit. */
+int sparc_cie_data_alignment;
+
/* V9 and 86x have big and little endian data, but instructions are always big
endian. The sparclet has bi-endian support but both data and insns have
the same endianness. Global `target_big_endian' is used for data.
/* Handle of the OPCODE hash table. */
static struct hash_control *op_hash;
-static int log2 PARAMS ((int));
+static int mylog2 PARAMS ((int));
static void s_data1 PARAMS ((void));
static void s_seg PARAMS ((int));
static void s_proc PARAMS ((int));
static void s_empty PARAMS ((int));
static void s_uacons PARAMS ((int));
static void s_ncons PARAMS ((int));
+#ifdef OBJ_ELF
static void s_register PARAMS ((int));
+#endif
const pseudo_typeS md_pseudo_table[] =
{
changed in read.c. Ideally it shouldn't have to know about it at all,
but nothing is ideal around here. */
-#define isoctal(c) ((unsigned)((c) - '0') < '8')
+#define isoctal(c) ((unsigned) ((c) - '0') < '8')
struct sparc_it
{
and file formats. */
enum sparc_arch_types {v6, v7, v8, sparclet, sparclite, sparc86x, v8plus,
- v8plusa, v9, v9a, v9_64};
+ v8plusa, v9, v9a, v9b, v9_64};
static struct sparc_arch {
char *name;
{ "sparc86x", "sparclite", sparc86x, 32, 1 },
{ "v8plus", "v9", v9, 0, 1 },
{ "v8plusa", "v9a", v9, 0, 1 },
+ { "v8plusb", "v9b", v9, 0, 1 },
{ "v9", "v9", v9, 0, 1 },
{ "v9a", "v9a", v9, 0, 1 },
+ { "v9b", "v9b", v9, 0, 1 },
/* This exists to allow configure.in/Makefile.in to pass one
value to specify both the default machine and default word size. */
{ "v9-64", "v9", v9, 64, 0 },
return "a.out-sunos-big";
else if (default_arch_type == sparc86x && target_little_endian_data)
return "a.out-sunos-big";
- else return "a.out-sparc-little";
+ else
+ return "a.out-sparc-little";
#else
return "a.out-sunos-big";
#endif
*
* -Av6, -Av7, -Av8, -Asparclite, -Asparclet
* Standard 32 bit architectures.
- * -Av8plus, -Av8plusa
- * Sparc64 in a 32 bit world.
- * -Av9, -Av9a
+ * -Av9, -Av9a, -Av9b
* Sparc64 in either a 32 or 64 bit world (-32/-64 says which).
* This used to only mean 64 bits, but properly specifying it
* complicated gcc's ASM_SPECs, so now opcode selection is
* specified orthogonally to word size (except when specifying
* the default, but that is an internal implementation detail).
- * -xarch=v8plus, -xarch=v8plusa
- * Same as -Av8plus{,a}, for compatibility with Sun's assembler.
+ * -Av8plus, -Av8plusa, -Av8plusb
+ * Same as -Av9{,a,b}.
+ * -xarch=v8plus, -xarch=v8plusa, -xarch=v8plusb
+ * Same as -Av8plus{,a,b} -32, for compatibility with Sun's
+ * assembler.
+ * -xarch=v9, -xarch=v9a, -xarch=v9b
+ * Same as -Av9{,a,b} -64, for compatibility with Sun's
+ * assembler.
*
* Select the architecture and possibly the file format.
* Instructions or features not supported by the selected
* The default is to start at v6, and bump the architecture up
* whenever an instruction is seen at a higher level. In 32 bit
* environments, v9 is not bumped up to, the user must pass
- * -Av8plus{,a}.
+ * -Av8plus{,a,b}.
*
* If -bump is specified, a warning is printing when bumping to
* higher levels.
*/
#ifdef OBJ_ELF
-CONST char *md_shortopts = "A:K:VQ:sq";
+const char *md_shortopts = "A:K:VQ:sq";
#else
#ifdef OBJ_AOUT
-CONST char *md_shortopts = "A:k";
+const char *md_shortopts = "A:k";
#else
-CONST char *md_shortopts = "A:";
+const char *md_shortopts = "A:";
#endif
#endif
struct option md_longopts[] = {
break;
case OPTION_XARCH:
- /* This is for compatibility with Sun's assembler. */
- if (strcmp (arg, "v8plus") != 0
- && strcmp (arg, "v8plusa") != 0)
- {
- as_bad (_("invalid architecture -xarch=%s"), arg);
- return 0;
- }
+#ifdef OBJ_ELF
+ if (strncmp (arg, "v9", 2) != 0)
+ md_parse_option (OPTION_32, NULL);
+ else
+ md_parse_option (OPTION_64, NULL);
+#endif
/* Fall through. */
case 'A':
if (sa == NULL
|| ! sa->user_option_p)
{
- as_bad (_("invalid architecture -A%s"), arg);
+ if (c == OPTION_XARCH)
+ as_bad (_("invalid architecture -xarch=%s"), arg);
+ else
+ as_bad (_("invalid architecture -A%s"), arg);
return 0;
}
FILE *stream;
{
const struct sparc_arch *arch;
+ int column;
/* We don't get a chance to initialize anything before we're called,
so handle that now. */
init_default_arch ();
fprintf (stream, _("SPARC options:\n"));
+ column = 0;
for (arch = &sparc_arch_table[0]; arch->name; arch++)
{
+ if (!arch->user_option_p)
+ continue;
if (arch != &sparc_arch_table[0])
fprintf (stream, " | ");
- if (arch->user_option_p)
- fprintf (stream, "-A%s", arch->name);
+ if (column + strlen (arch->name) > 70)
+ {
+ column = 0;
+ fputc ('\n', stream);
+ }
+ column += 5 + 2 + strlen (arch->name);
+ fprintf (stream, "-A%s", arch->name);
}
- fprintf (stream, _("\n-xarch=v8plus | -xarch=v8plusa\n"));
- fprintf (stream, _("\
+ for (arch = &sparc_arch_table[0]; arch->name; arch++)
+ {
+ if (!arch->user_option_p)
+ continue;
+ fprintf (stream, " | ");
+ if (column + strlen (arch->name) > 65)
+ {
+ column = 0;
+ fputc ('\n', stream);
+ }
+ column += 5 + 7 + strlen (arch->name);
+ fprintf (stream, "-xarch=%s", arch->name);
+ }
+ fprintf (stream, _("\n\
specify variant of SPARC architecture\n\
-bump warn when assembler switches architectures\n\
-sparc ignored\n\
{NULL, NULL, NULL},
};
\f
-/* sparc64 priviledged registers. */
+/* sparc64 privileged registers. */
struct priv_reg_entry
- {
- char *name;
- int regnum;
- };
+{
+ char *name;
+ int regnum;
+};
struct priv_reg_entry priv_reg_table[] =
{
struct priv_reg_entry v9a_asr_table[] =
{
{"tick_cmpr", 23},
+ {"sys_tick_cmpr", 25},
+ {"sys_tick", 24},
{"softint", 22},
{"set_softint", 20},
{"pic", 17},
if (! default_init_p)
init_default_arch ();
+ sparc_cie_data_alignment = sparc_arch_size == 64 ? -8 : -4;
op_hash = hash_new ();
while (i < (unsigned int) sparc_num_opcodes)
for (i = 0; native_op_table[i].name; i++)
{
const struct sparc_opcode *insn;
- char *name = sparc_arch_size == 32 ? native_op_table[i].name32 :
- native_op_table[i].name64;
+ char *name = ((sparc_arch_size == 32)
+ ? native_op_table[i].name32
+ : native_op_table[i].name64);
insn = (struct sparc_opcode *) hash_find (op_hash, name);
if (insn == NULL)
{
void
sparc_md_end ()
{
+ unsigned long mach = bfd_mach_sparc;
+
if (sparc_arch_size == 64)
- {
- if (current_architecture == SPARC_OPCODE_ARCH_V9A)
- bfd_set_arch_mach (stdoutput, bfd_arch_sparc, bfd_mach_sparc_v9a);
- else
- bfd_set_arch_mach (stdoutput, bfd_arch_sparc, bfd_mach_sparc_v9);
- }
+ switch (current_architecture)
+ {
+ case SPARC_OPCODE_ARCH_V9A: mach = bfd_mach_sparc_v9a; break;
+ case SPARC_OPCODE_ARCH_V9B: mach = bfd_mach_sparc_v9b; break;
+ default: mach = bfd_mach_sparc_v9; break;
+ }
else
- {
- if (current_architecture == SPARC_OPCODE_ARCH_V9)
- bfd_set_arch_mach (stdoutput, bfd_arch_sparc, bfd_mach_sparc_v8plus);
- else if (current_architecture == SPARC_OPCODE_ARCH_V9A)
- bfd_set_arch_mach (stdoutput, bfd_arch_sparc, bfd_mach_sparc_v8plusa);
- else if (current_architecture == SPARC_OPCODE_ARCH_SPARCLET)
- bfd_set_arch_mach (stdoutput, bfd_arch_sparc, bfd_mach_sparc_sparclet);
- else if (default_arch_type == sparc86x && target_little_endian_data)
- bfd_set_arch_mach (stdoutput, bfd_arch_sparc, bfd_mach_sparc_sparclite_le);
- else
- {
- /* The sparclite is treated like a normal sparc. Perhaps it
- shouldn't be but for now it is (since that's the way it's
- always been treated). */
- bfd_set_arch_mach (stdoutput, bfd_arch_sparc, bfd_mach_sparc);
- }
- }
+ switch (current_architecture)
+ {
+ case SPARC_OPCODE_ARCH_SPARCLET: mach = bfd_mach_sparc_sparclet; break;
+ case SPARC_OPCODE_ARCH_V9: mach = bfd_mach_sparc_v8plus; break;
+ case SPARC_OPCODE_ARCH_V9A: mach = bfd_mach_sparc_v8plusa; break;
+ case SPARC_OPCODE_ARCH_V9B: mach = bfd_mach_sparc_v8plusb; break;
+ /* The sparclite is treated like a normal sparc. Perhaps it shouldn't
+ be but for now it is (since that's the way it's always been
+ treated). */
+ default: break;
+ }
+ bfd_set_arch_mach (stdoutput, bfd_arch_sparc, mach);
}
\f
/* Return non-zero if VAL is in the range -(MAX+1) to MAX. */
if (sparc_arch_size == 32)
{
bfd_signed_vma sign = (bfd_signed_vma) 1 << 31;
- val = ((val & 0xffffffff) ^ sign) - sign;
+ val = ((val & U0xffffffff) ^ sign) - sign;
}
if (val > max)
return 0;
{
if (sizeof (offsetT) > 4
&& (the_insn.exp.X_add_number < 0
- || the_insn.exp.X_add_number > (offsetT) 0xffffffff))
+ || the_insn.exp.X_add_number > (offsetT) U0xffffffff))
as_warn (_("set: number not in 0..4294967295 range"));
}
else
{
if (sizeof (offsetT) > 4
- && (the_insn.exp.X_add_number < -(offsetT) 0x80000000
- || the_insn.exp.X_add_number > (offsetT) 0xffffffff))
+ && (the_insn.exp.X_add_number < -(offsetT) U0x80000000
+ || the_insn.exp.X_add_number > (offsetT) U0xffffffff))
as_warn (_("set: number not in -2147483648..4294967295 range"));
the_insn.exp.X_add_number = (int) the_insn.exp.X_add_number;
}
{
the_insn.opcode = (SETHI_INSN | RD (rd)
| ((the_insn.exp.X_add_number >> 10)
- & (the_insn.exp.X_op == O_constant ? 0x3fffff : 0)));
+ & (the_insn.exp.X_op == O_constant
+ ? 0x3fffff : 0)));
the_insn.reloc = (the_insn.exp.X_op != O_constant
- ? BFD_RELOC_HI22
- : BFD_RELOC_NONE);
+ ? BFD_RELOC_HI22 : BFD_RELOC_NONE);
output_insn (insn, &the_insn);
need_hi22_p = 1;
}
the_insn.opcode = (OR_INSN | (need_hi22_p ? RS1 (rd) : 0)
| RD (rd) | IMMED
| (the_insn.exp.X_add_number
- & (the_insn.exp.X_op != O_constant ? 0 :
- need_hi22_p ? 0x3ff : 0x1fff)));
+ & (the_insn.exp.X_op != O_constant
+ ? 0 : need_hi22_p ? 0x3ff : 0x1fff)));
the_insn.reloc = (the_insn.exp.X_op != O_constant
- ? BFD_RELOC_LO10
- : BFD_RELOC_NONE);
+ ? BFD_RELOC_LO10 : BFD_RELOC_NONE);
output_insn (insn, &the_insn);
}
}
}
if (sizeof (offsetT) > 4
- && (the_insn.exp.X_add_number < -(offsetT) 0x80000000
- || the_insn.exp.X_add_number > (offsetT) 0xffffffff))
+ && (the_insn.exp.X_add_number < -(offsetT) U0x80000000
+ || the_insn.exp.X_add_number > (offsetT) U0xffffffff))
as_warn (_("setsw: number not in -2147483648..4294967295 range"));
low32 = the_insn.exp.X_add_number;
int need_hh22_p = 0, need_hm10_p = 0, need_hi22_p = 0, need_lo10_p = 0;
int need_xor10_p = 0;
-#define SIGNEXT32(x) ((((x) & 0xffffffff) ^ 0x80000000) - 0x80000000)
+#define SIGNEXT32(x) ((((x) & U0xffffffff) ^ U0x80000000) - U0x80000000)
lower32 = SIGNEXT32 (the_insn.exp.X_add_number);
upper32 = SIGNEXT32 (BSR (the_insn.exp.X_add_number, 32));
#undef SIGNEXT32
return;
}
need_hh22_p = need_hm10_p = need_hi22_p = need_lo10_p = 1;
- lower32 = 0; upper32 = 0;
+ lower32 = 0;
+ upper32 = 0;
}
else
{
{
the_insn.opcode = (SETHI_INSN | RD (dstreg)
| (((need_xor10_p ? ~lower32 : lower32)
- >> 10) & 0x3fffff));
+ >> 10) & 0x3fffff));
the_insn.reloc = (the_insn.exp.X_op != O_constant
? BFD_RELOC_SPARC_LM22 : BFD_RELOC_NONE);
output_insn (insn, &the_insn);
know (str);
special_case = sparc_ip (str, &insn);
+ if (insn == NULL)
+ return;
/* We warn about attempts to put a floating point branch in a delay slot,
unless the delay slot has been annulled. */
- if (insn != NULL
- && last_insn != NULL
+ if (last_insn != NULL
&& (insn->flags & F_FBR) != 0
&& (last_insn->flags & F_DELAYED) != 0
/* ??? This test isn't completely accurate. We assume anything with
point instruction and a floating point branch. We insert one
automatically, with a warning. */
if (max_architecture < SPARC_OPCODE_ARCH_V9
- && insn != NULL
&& last_insn != NULL
&& (insn->flags & F_FBR) != 0
&& (last_insn->flags & F_FLOAT) != 0)
int special_case = SPECIAL_CASE_NONE;
s = str;
- if (islower ((unsigned char) *s))
+ if (ISLOWER (*s))
{
do
++s;
- while (islower ((unsigned char) *s) || isdigit ((unsigned char) *s));
+ while (ISLOWER (*s) || ISDIGIT (*s));
}
switch (*s)
break;
default:
- as_fatal (_("Unknown opcode: `%s'"), str);
+ as_bad (_("Unknown opcode: `%s'"), str);
+ *pinsn = NULL;
+ return special_case;
}
insn = (struct sparc_opcode *) hash_find (op_hash, str);
*pinsn = insn;
goto error;
}
kmask |= mask;
- while (*s == ' ') { ++s; continue; }
+ while (*s == ' ')
+ ++s;
if (*s == '|' || *s == '+')
++s;
- while (*s == ' ') { ++s; continue; }
+ while (*s == ' ')
+ ++s;
}
}
else
continue;
}
+ case '3':
+ {
+ int smask = 0;
+
+ if (! parse_const_expr_arg (&s, &smask))
+ {
+ error_message = _(": invalid siam mode expression");
+ goto error;
+ }
+ if (smask < 0 || smask > 7)
+ {
+ error_message = _(": invalid siam mode number");
+ goto error;
+ }
+ opcode |= smask;
+ continue;
+ }
+
case '*':
{
int fcn = 0;
case '_':
case '/':
- /* Parse a v9a ancillary state register. */
+ /* Parse a v9a/v9b ancillary state register. */
if (*s == '%')
{
struct priv_reg_entry *p = v9a_asr_table;
}
if (p->name[0] != s[0])
{
- error_message = _(": unrecognizable v9a ancillary state register");
+ error_message = _(": unrecognizable v9a or v9b ancillary state register");
goto error;
}
if (*args == '/' && (p->regnum == 20 || p->regnum == 21))
error_message = _(": rd on write only ancillary state register");
goto error;
}
+ if (p->regnum >= 24
+ && (insn->architecture
+ & SPARC_OPCODE_ARCH_MASK (SPARC_OPCODE_ARCH_V9A)))
+ {
+ /* %sys_tick and %sys_tick_cmpr are v9bnotv9a */
+ error_message = _(": unrecognizable v9a ancillary state register");
+ goto error;
+ }
if (*args == '/')
opcode |= (p->regnum << 14);
else
}
else
{
- error_message = _(": unrecognizable v9a ancillary state register");
+ error_message = _(": unrecognizable v9a or v9b ancillary state register");
goto error;
}
{
s += 4;
- if (isdigit ((unsigned char) *s))
+ if (ISDIGIT (*s))
{
long num = 0;
- while (isdigit ((unsigned char) *s))
+ while (ISDIGIT (*s))
{
num = num * 10 + *s - '0';
++s;
break;
case '\0': /* End of args. */
- if (*s == '\0')
+ if (s[0] == ',' && s[1] == '%')
{
- match = 1;
+ static const struct tls_ops {
+ /* The name as it appears in assembler. */
+ char *name;
+ /* strlen (name), precomputed for speed */
+ int len;
+ /* The reloc this pseudo-op translates to. */
+ int reloc;
+ /* 1 if call. */
+ int call;
+ } tls_ops[] = {
+ { "tgd_add", 7, BFD_RELOC_SPARC_TLS_GD_ADD, 0 },
+ { "tgd_call", 8, BFD_RELOC_SPARC_TLS_GD_CALL, 1 },
+ { "tldm_add", 8, BFD_RELOC_SPARC_TLS_LDM_ADD, 0 },
+ { "tldm_call", 9, BFD_RELOC_SPARC_TLS_LDM_CALL, 1 },
+ { "tldo_add", 8, BFD_RELOC_SPARC_TLS_LDO_ADD, 0 },
+ { "tie_ldx", 7, BFD_RELOC_SPARC_TLS_IE_LDX, 0 },
+ { "tie_ld", 6, BFD_RELOC_SPARC_TLS_IE_LD, 0 },
+ { "tie_add", 7, BFD_RELOC_SPARC_TLS_IE_ADD, 0 }
+ };
+ const struct tls_ops *o;
+ char *s1;
+ int npar = 0;
+
+ for (o = tls_ops; o->name; o++)
+ if (strncmp (s + 2, o->name, o->len) == 0)
+ break;
+ if (o->name == NULL)
+ break;
+
+ if (s[o->len + 2] != '(')
+ {
+ as_bad (_("Illegal operands: %%%s requires arguments in ()"), o->name);
+ return special_case;
+ }
+
+ if (! o->call && the_insn.reloc != BFD_RELOC_NONE)
+ {
+ as_bad (_("Illegal operands: %%%s cannot be used together with other relocs in the insn ()"),
+ o->name);
+ return special_case;
+ }
+
+ if (o->call
+ && (the_insn.reloc != BFD_RELOC_32_PCREL_S2
+ || the_insn.exp.X_add_number != 0
+ || the_insn.exp.X_add_symbol
+ != symbol_find_or_make ("__tls_get_addr")))
+ {
+ as_bad (_("Illegal operands: %%%s can be only used with call __tls_get_addr"),
+ o->name);
+ return special_case;
+ }
+
+ the_insn.reloc = o->reloc;
+ memset (&the_insn.exp, 0, sizeof (the_insn.exp));
+ s += o->len + 3;
+
+ for (s1 = s; *s1 && *s1 != ',' && *s1 != ']'; s1++)
+ if (*s1 == '(')
+ npar++;
+ else if (*s1 == ')')
+ {
+ if (!npar)
+ break;
+ npar--;
+ }
+
+ if (*s1 != ')')
+ {
+ as_bad (_("Illegal operands: %%%s requires arguments in ()"), o->name);
+ return special_case;
+ }
+
+ *s1 = '\0';
+ (void) get_expression (s);
+ *s1 = ')';
+ s = s1 + 1;
}
+ if (*s == '\0')
+ match = 1;
break;
case '+':
break;
case '#': /* Must be at least one digit. */
- if (isdigit ((unsigned char) *s++))
+ if (ISDIGIT (*s++))
{
- while (isdigit ((unsigned char) *s))
+ while (ISDIGIT (*s))
{
++s;
}
case 'b': /* Next operand is a coprocessor register. */
case 'c':
case 'D':
- if (*s++ == '%' && *s++ == 'c' && isdigit ((unsigned char) *s))
+ if (*s++ == '%' && *s++ == 'c' && ISDIGIT (*s))
{
mask = *s++;
- if (isdigit ((unsigned char) *s))
+ if (ISDIGIT (*s))
{
mask = 10 * (mask - '0') + (*s++ - '0');
if (mask >= 32)
goto error;
case 'r': /* any register */
- if (!isdigit ((unsigned char) (c = *s++)))
+ if (!ISDIGIT ((c = *s++)))
{
goto error;
}
case '7':
case '8':
case '9':
- if (isdigit ((unsigned char) *s))
+ if (ISDIGIT (*s))
{
if ((c = 10 * (c - '0') + (*s++ - '0')) >= 32)
{
if (*s++ == '%'
&& ((format = *s) == 'f')
- && isdigit ((unsigned char) *++s))
+ && ISDIGIT (*++s))
{
- for (mask = 0; isdigit ((unsigned char) *s); ++s)
+ for (mask = 0; ISDIGIT (*s); ++s)
{
mask = 10 * mask + (*s - '0');
} /* read the number */
{
if (SPARC_OPCODE_ARCH_V9_P (max_architecture))
{
+ if (*args == 'e' || *args == 'f' || *args == 'g')
+ {
+ error_message
+ = _(": There are only 32 single precision f registers; [0-31]");
+ goto error;
+ }
v9_arg_p = 1;
mask -= 31; /* wrap high bit */
}
else
{
break;
- } /* if not an 'f' register. */
+ } /* if not an 'f' register. */
switch (*args)
{
case 'J':
opcode |= RD (mask);
continue;
- } /* pack it in. */
+ } /* Pack it in. */
know (0);
break;
- } /* float arg */
+ } /* float arg */
case 'F':
if (strncmp (s, "%fsr", 4) == 0)
}
break;
- case '0': /* 64 bit immediate (set, setsw, setx insn) */
- the_insn.reloc = BFD_RELOC_NONE; /* reloc handled elsewhere */
+ case '0': /* 64 bit immediate (set, setsw, setx insn) */
+ the_insn.reloc = BFD_RELOC_NONE; /* reloc handled elsewhere */
goto immediate;
- case 'l': /* 22 bit PC relative immediate */
+ case 'l': /* 22 bit PC relative immediate */
the_insn.reloc = BFD_RELOC_SPARC_WDISP22;
the_insn.pcrel = 1;
goto immediate;
- case 'L': /* 30 bit immediate */
+ case 'L': /* 30 bit immediate */
the_insn.reloc = BFD_RELOC_32_PCREL_S2;
the_insn.pcrel = 1;
goto immediate;
case 'h':
- case 'n': /* 22 bit immediate */
+ case 'n': /* 22 bit immediate */
the_insn.reloc = BFD_RELOC_SPARC22;
goto immediate;
- case 'i': /* 13 bit immediate */
+ case 'i': /* 13 bit immediate */
the_insn.reloc = BFD_RELOC_SPARC13;
/* fallthrough */
{
char *s1;
char *op_arg = NULL;
- expressionS op_exp;
+ static expressionS op_exp;
bfd_reloc_code_real_type old_reloc = the_insn.reloc;
/* Check for %hi, etc. */
{ "l44", 3, BFD_RELOC_SPARC_L44, 1, 0 },
{ "uhi", 3, BFD_RELOC_SPARC_HH22, 1, 0 },
{ "ulo", 3, BFD_RELOC_SPARC_HM10, 1, 0 },
- { NULL }
+ { "tgd_hi22", 8, BFD_RELOC_SPARC_TLS_GD_HI22, 0, 0 },
+ { "tgd_lo10", 8, BFD_RELOC_SPARC_TLS_GD_LO10, 0, 0 },
+ { "tldm_hi22", 9, BFD_RELOC_SPARC_TLS_LDM_HI22, 0, 0 },
+ { "tldm_lo10", 9, BFD_RELOC_SPARC_TLS_LDM_LO10, 0, 0 },
+ { "tldo_hix22", 10, BFD_RELOC_SPARC_TLS_LDO_HIX22, 0,
+ 0 },
+ { "tldo_lox10", 10, BFD_RELOC_SPARC_TLS_LDO_LOX10, 0,
+ 0 },
+ { "tie_hi22", 8, BFD_RELOC_SPARC_TLS_IE_HI22, 0, 0 },
+ { "tie_lo10", 8, BFD_RELOC_SPARC_TLS_IE_LO10, 0, 0 },
+ { "tle_hix22", 9, BFD_RELOC_SPARC_TLS_LE_HIX22, 0, 0 },
+ { "tle_lox10", 9, BFD_RELOC_SPARC_TLS_LE_LOX10, 0, 0 },
+ { NULL, 0, 0, 0, 0 }
};
const struct ops *o;
for (s1 = s; *s1 && *s1 != ',' && *s1 != ']'; s1++)
;
- if (s1 != s && isdigit ((unsigned char) s1[-1]))
+ if (s1 != s && ISDIGIT (s1[-1]))
{
if (s1[-2] == '%' && s1[-3] == '+')
s1 -= 3;
break;
case BFD_RELOC_SPARC_HIX22:
- val = ~ val;
+ val = ~val;
val = (val >> 10) & 0x3fffff;
break;
goto error;
}
- /* Constants that won't fit are checked in md_apply_fix3
+ if (the_insn.reloc >= BFD_RELOC_SPARC_TLS_GD_HI22
+ && the_insn.reloc <= BFD_RELOC_SPARC_TLS_TPOFF64)
+ {
+ error_message = _(": TLS operand can't be a constant");
+ goto error;
+ }
+
+ /* Constants that won't fit are checked in md_apply_fix
and bfd_install_relocation.
??? It would be preferable to install the constants
into the insn here and save having to create a fixS
for each one. There already exists code to handle
- all the various cases (e.g. in md_apply_fix3 and
+ all the various cases (e.g. in md_apply_fix and
bfd_install_relocation) so duplicating all that code
here isn't right. */
}
if (v9_arg_p)
{
- needed_arch_mask &= ~ ((1 << SPARC_OPCODE_ARCH_V9)
- | (1 << SPARC_OPCODE_ARCH_V9A));
- needed_arch_mask |= (1 << SPARC_OPCODE_ARCH_V9);
+ needed_arch_mask &=
+ ~(SPARC_OPCODE_ARCH_MASK (SPARC_OPCODE_ARCH_V9) - 1);
+ if (! needed_arch_mask)
+ needed_arch_mask =
+ SPARC_OPCODE_ARCH_MASK (SPARC_OPCODE_ARCH_V9);
}
if (needed_arch_mask
p = *input_pointerP;
for (q = p + (*p == '#' || *p == '%');
- isalnum ((unsigned char) *q) || *q == '_';
+ ISALNUM (*q) || *q == '_';
++q)
continue;
c = *q;
the_insn->pcrel,
the_insn->reloc);
/* Turn off overflow checking in fixup_segment. We'll do our
- own overflow checking in md_apply_fix3. This is necessary because
+ own overflow checking in md_apply_fix. This is necessary because
the insn size is 4 and fixup_segment will signal an overflow for
large 8 byte quantities. */
fixP->fx_no_overflow = 1;
last_insn = insn;
last_opcode = the_insn->opcode;
+
+#ifdef OBJ_ELF
+ dwarf2_emit_insn (4);
+#endif
}
\f
/* This is identical to the md_atof in m68k.c. I think this is right,
{
for (i = 0; i < prec; i++)
{
- md_number_to_chars (litP, (valueT) words[i], sizeof (LITTLENUM_TYPE));
+ md_number_to_chars (litP, (valueT) words[i],
+ sizeof (LITTLENUM_TYPE));
litP += sizeof (LITTLENUM_TYPE);
}
}
{
for (i = prec - 1; i >= 0; i--)
{
- md_number_to_chars (litP, (valueT) words[i], sizeof (LITTLENUM_TYPE));
+ md_number_to_chars (litP, (valueT) words[i],
+ sizeof (LITTLENUM_TYPE));
litP += sizeof (LITTLENUM_TYPE);
}
}
}
\f
/* Apply a fixS to the frags, now that we know the value it ought to
- hold. */
+ hold. */
-int
-md_apply_fix3 (fixP, value, segment)
+void
+md_apply_fix (fixP, valP, segment)
fixS *fixP;
- valueT *value;
- segT segment;
+ valueT *valP;
+ segT segment ATTRIBUTE_UNUSED;
{
char *buf = fixP->fx_where + fixP->fx_frag->fr_literal;
- offsetT val;
+ offsetT val = * (offsetT *) valP;
long insn;
- val = *value;
-
assert (fixP->fx_r_type < BFD_RELOC_UNUSED);
fixP->fx_addnumber = val; /* Remember value for emit_reloc. */
#ifdef OBJ_ELF
- /* FIXME: SPARC ELF relocations don't use an addend in the data
- field itself. This whole approach should be somehow combined
- with the calls to bfd_install_relocation. Also, the value passed
- in by fixup_segment includes the value of a defined symbol. We
- don't want to include the value of an externally visible symbol. */
+ /* SPARC ELF relocations don't use an addend in the data field. */
if (fixP->fx_addsy != NULL)
{
- if (symbol_used_in_reloc_p (fixP->fx_addsy)
- && (S_IS_EXTERNAL (fixP->fx_addsy)
- || S_IS_WEAK (fixP->fx_addsy)
- || (sparc_pic_code && ! fixP->fx_pcrel)
- || (S_GET_SEGMENT (fixP->fx_addsy) != segment
- && ((bfd_get_section_flags (stdoutput,
- S_GET_SEGMENT (fixP->fx_addsy))
- & SEC_LINK_ONCE) != 0
- || strncmp (segment_name (S_GET_SEGMENT (fixP->fx_addsy)),
- ".gnu.linkonce",
- sizeof ".gnu.linkonce" - 1) == 0)))
- && S_GET_SEGMENT (fixP->fx_addsy) != absolute_section
- && S_GET_SEGMENT (fixP->fx_addsy) != undefined_section
- && ! bfd_is_com_section (S_GET_SEGMENT (fixP->fx_addsy)))
- fixP->fx_addnumber -= S_GET_VALUE (fixP->fx_addsy);
- return 1;
+ switch (fixP->fx_r_type)
+ {
+ case BFD_RELOC_SPARC_TLS_GD_HI22:
+ case BFD_RELOC_SPARC_TLS_GD_LO10:
+ case BFD_RELOC_SPARC_TLS_GD_ADD:
+ case BFD_RELOC_SPARC_TLS_GD_CALL:
+ case BFD_RELOC_SPARC_TLS_LDM_HI22:
+ case BFD_RELOC_SPARC_TLS_LDM_LO10:
+ case BFD_RELOC_SPARC_TLS_LDM_ADD:
+ case BFD_RELOC_SPARC_TLS_LDM_CALL:
+ case BFD_RELOC_SPARC_TLS_LDO_HIX22:
+ case BFD_RELOC_SPARC_TLS_LDO_LOX10:
+ case BFD_RELOC_SPARC_TLS_LDO_ADD:
+ case BFD_RELOC_SPARC_TLS_IE_HI22:
+ case BFD_RELOC_SPARC_TLS_IE_LO10:
+ case BFD_RELOC_SPARC_TLS_IE_LD:
+ case BFD_RELOC_SPARC_TLS_IE_LDX:
+ case BFD_RELOC_SPARC_TLS_IE_ADD:
+ case BFD_RELOC_SPARC_TLS_LE_HIX22:
+ case BFD_RELOC_SPARC_TLS_LE_LOX10:
+ case BFD_RELOC_SPARC_TLS_DTPMOD32:
+ case BFD_RELOC_SPARC_TLS_DTPMOD64:
+ case BFD_RELOC_SPARC_TLS_DTPOFF32:
+ case BFD_RELOC_SPARC_TLS_DTPOFF64:
+ case BFD_RELOC_SPARC_TLS_TPOFF32:
+ case BFD_RELOC_SPARC_TLS_TPOFF64:
+ S_SET_THREAD_LOCAL (fixP->fx_addsy);
+
+ default:
+ break;
+ }
+
+ return;
}
#endif
/* If this is a data relocation, just output VAL. */
- if (fixP->fx_r_type == BFD_RELOC_16)
+ if (fixP->fx_r_type == BFD_RELOC_16
+ || fixP->fx_r_type == BFD_RELOC_SPARC_UA16)
{
md_number_to_chars (buf, val, 2);
}
else if (fixP->fx_r_type == BFD_RELOC_32
+ || fixP->fx_r_type == BFD_RELOC_SPARC_UA32
|| fixP->fx_r_type == BFD_RELOC_SPARC_REV32)
{
md_number_to_chars (buf, val, 4);
}
- else if (fixP->fx_r_type == BFD_RELOC_64)
+ else if (fixP->fx_r_type == BFD_RELOC_64
+ || fixP->fx_r_type == BFD_RELOC_SPARC_UA64)
{
md_number_to_chars (buf, val, 8);
}
|| fixP->fx_r_type == BFD_RELOC_VTABLE_ENTRY)
{
fixP->fx_done = 0;
- return 1;
+ return;
}
else
{
else
setter = bfd_getl32 ((unsigned char *) buf - 4);
if ((setter & (0xffffffff ^ RD (~0)))
- != (INSN_OR | RS1 (O7) | RS2 (G0)))
+ != (INSN_OR | RS1 (O7) | RS2 (G0)))
break;
/* The sequence was
or %o7, %g0, %rN
case BFD_RELOC_SPARC_LM22:
case BFD_RELOC_HI22:
if (!fixP->fx_addsy)
- {
- insn |= (val >> 10) & 0x3fffff;
- }
+ insn |= (val >> 10) & 0x3fffff;
else
- {
- /* FIXME: Need comment explaining why we do this. */
- insn &= ~0xffff;
- }
+ /* FIXME: Need comment explaining why we do this. */
+ insn &= ~0xffff;
break;
case BFD_RELOC_SPARC22:
case BFD_RELOC_LO10:
if (!fixP->fx_addsy)
- {
- insn |= val & 0x3ff;
- }
+ insn |= val & 0x3ff;
else
- {
- /* FIXME: Need comment explaining why we do this. */
- insn &= ~0xff;
- }
+ /* FIXME: Need comment explaining why we do this. */
+ insn &= ~0xff;
break;
case BFD_RELOC_SPARC_OLO10:
case BFD_RELOC_SPARC_HIX22:
if (!fixP->fx_addsy)
{
- val ^= ~ (offsetT) 0;
+ val ^= ~(offsetT) 0;
insn |= (val >> 10) & 0x3fffff;
}
break;
/* Are we finished with this relocation now? */
if (fixP->fx_addsy == 0 && !fixP->fx_pcrel)
fixP->fx_done = 1;
-
- return 1;
}
/* Translate internal representation of relocation info to BFD target
arelent **
tc_gen_reloc (section, fixp)
- asection *section;
+ asection *section ATTRIBUTE_UNUSED;
fixS *fixp;
{
static arelent *relocs[3];
case BFD_RELOC_SPARC_LOX10:
case BFD_RELOC_SPARC_REV32:
case BFD_RELOC_SPARC_OLO10:
+ case BFD_RELOC_SPARC_UA16:
+ case BFD_RELOC_SPARC_UA32:
+ case BFD_RELOC_SPARC_UA64:
+ case BFD_RELOC_8_PCREL:
+ case BFD_RELOC_16_PCREL:
+ case BFD_RELOC_32_PCREL:
+ case BFD_RELOC_64_PCREL:
+ case BFD_RELOC_SPARC_PLT32:
+ case BFD_RELOC_SPARC_PLT64:
case BFD_RELOC_VTABLE_ENTRY:
case BFD_RELOC_VTABLE_INHERIT:
+ case BFD_RELOC_SPARC_TLS_GD_HI22:
+ case BFD_RELOC_SPARC_TLS_GD_LO10:
+ case BFD_RELOC_SPARC_TLS_GD_ADD:
+ case BFD_RELOC_SPARC_TLS_GD_CALL:
+ case BFD_RELOC_SPARC_TLS_LDM_HI22:
+ case BFD_RELOC_SPARC_TLS_LDM_LO10:
+ case BFD_RELOC_SPARC_TLS_LDM_ADD:
+ case BFD_RELOC_SPARC_TLS_LDM_CALL:
+ case BFD_RELOC_SPARC_TLS_LDO_HIX22:
+ case BFD_RELOC_SPARC_TLS_LDO_LOX10:
+ case BFD_RELOC_SPARC_TLS_LDO_ADD:
+ case BFD_RELOC_SPARC_TLS_IE_HI22:
+ case BFD_RELOC_SPARC_TLS_IE_LO10:
+ case BFD_RELOC_SPARC_TLS_IE_LD:
+ case BFD_RELOC_SPARC_TLS_IE_LDX:
+ case BFD_RELOC_SPARC_TLS_IE_ADD:
+ case BFD_RELOC_SPARC_TLS_LE_HIX22:
+ case BFD_RELOC_SPARC_TLS_LE_LOX10:
+ case BFD_RELOC_SPARC_TLS_DTPOFF32:
+ case BFD_RELOC_SPARC_TLS_DTPOFF64:
code = fixp->fx_r_type;
break;
default:
switch (code)
{
case BFD_RELOC_32_PCREL_S2:
- if (! S_IS_DEFINED (fixp->fx_addsy)
- || S_IS_COMMON (fixp->fx_addsy)
- || S_IS_EXTERNAL (fixp->fx_addsy)
- || S_IS_WEAK (fixp->fx_addsy))
+ if (generic_force_reloc (fixp))
code = BFD_RELOC_SPARC_WPLT30;
break;
case BFD_RELOC_HI22:
#else /* elf or coff */
- if (reloc->howto->pc_relative == 0
- || code == BFD_RELOC_SPARC_PC10
- || code == BFD_RELOC_SPARC_PC22)
+ if (code != BFD_RELOC_32_PCREL_S2
+ && code != BFD_RELOC_SPARC_WDISP22
+ && code != BFD_RELOC_SPARC_WDISP16
+ && code != BFD_RELOC_SPARC_WDISP19
+ && code != BFD_RELOC_SPARC_WPLT30
+ && code != BFD_RELOC_SPARC_TLS_GD_CALL
+ && code != BFD_RELOC_SPARC_TLS_LDM_CALL)
reloc->addend = fixp->fx_addnumber;
else if (symbol_section_p (fixp->fx_addsy))
reloc->addend = (section->vma
relocs[2] = NULL;
reloc->sym_ptr_ptr = (asymbol **) xmalloc (sizeof (asymbol *));
- *reloc->sym_ptr_ptr = symbol_get_bfdsym (section_symbol (absolute_section));
+ *reloc->sym_ptr_ptr
+ = symbol_get_bfdsym (section_symbol (absolute_section));
reloc->address = fixp->fx_frag->fr_address + fixp->fx_where;
reloc->howto = bfd_reloc_type_lookup (stdoutput, BFD_RELOC_SPARC13);
reloc->addend = fixp->tc_fix_data;
symbolS *
md_undefined_symbol (name)
- char *name;
+ char *name ATTRIBUTE_UNUSED;
{
return 0;
}
valueT
md_section_align (segment, size)
- segT segment;
+ segT segment ATTRIBUTE_UNUSED;
valueT size;
{
#ifndef OBJ_ELF
of two. */
static int
-log2 (value)
+mylog2 (value)
int value;
{
int shift;
static void
s_reserve (ignore)
- int ignore;
+ int ignore ATTRIBUTE_UNUSED;
{
char *name;
char *p;
if (align != 0)
{
- temp = log2 (align);
+ temp = mylog2 (align);
if (temp < 0)
{
as_bad (_("alignment not a power of 2"));
frag_align (align, 0, 0);
/* Detach from old frag. */
- if (S_GET_SEGMENT(symbolP) == bss_section)
+ if (S_GET_SEGMENT (symbolP) == bss_section)
symbol_get_frag (symbolP)->fr_symbol = NULL;
symbol_set_frag (symbolP, frag_now);
}
else
{
- as_warn("Ignoring attempt to re-define symbol %s",
- S_GET_NAME (symbolP));
+ as_warn ("Ignoring attempt to re-define symbol %s",
+ S_GET_NAME (symbolP));
} /* if not redefining. */
demand_empty_rest_of_line ();
static void
s_common (ignore)
- int ignore;
+ int ignore ATTRIBUTE_UNUSED;
{
char *name;
char c;
char *p;
- int temp, size;
+ offsetT temp, size;
symbolS *symbolP;
name = input_line_pointer;
if ((temp = get_absolute_expression ()) < 0)
{
- as_bad (_(".COMMon length (%d.) <0! Ignored."), temp);
+ as_bad (_(".COMMon length (%lu) out of range ignored"),
+ (unsigned long) temp);
ignore_rest_of_line ();
return;
}
{
if (S_GET_VALUE (symbolP) != (valueT) size)
{
- as_warn (_("Length of .comm \"%s\" is already %ld. Not changed to %d."),
- S_GET_NAME (symbolP), (long) S_GET_VALUE (symbolP), size);
+ as_warn (_("Length of .comm \"%s\" is already %ld. Not changed to %ld."),
+ S_GET_NAME (symbolP), (long) S_GET_VALUE (symbolP), (long) size);
}
}
else
if (temp > max_alignment)
{
temp = max_alignment;
- as_warn (_("alignment too large; assuming %d"), temp);
+ as_warn (_("alignment too large; assuming %ld"), (long) temp);
}
#endif
if (temp == 0)
align = 0;
else
- align = log2 (temp);
+ align = mylog2 (temp);
if (align < 0)
{
}
}
-/* Handle the .empty pseudo-op. This supresses the warnings about
+/* Handle the .empty pseudo-op. This suppresses the warnings about
invalid delay slot usage. */
static void
s_empty (ignore)
- int ignore;
+ int ignore ATTRIBUTE_UNUSED;
{
/* The easy way to implement is to just forget about the last
instruction. */
static void
s_seg (ignore)
- int ignore;
+ int ignore ATTRIBUTE_UNUSED;
{
if (strncmp (input_line_pointer, "\"text\"", 6) == 0)
static void
s_proc (ignore)
- int ignore;
+ int ignore ATTRIBUTE_UNUSED;
{
while (!is_end_of_line[(unsigned char) *input_line_pointer])
{
}
/* This static variable is set by s_uacons to tell sparc_cons_align
- that the expession does not need to be aligned. */
+ that the expression does not need to be aligned. */
static int sparc_no_align_cons = 0;
+/* This static variable is set by sparc_cons to emit requested types
+ of relocations in cons_fix_new_sparc. */
+
+static const char *sparc_cons_special_reloc;
+
/* This handles the unaligned space allocation pseudo-ops, such as
.uaword. .uaword is just like .word, but the value does not need
to be aligned. */
/* Tell sparc_cons_align not to align this value. */
sparc_no_align_cons = 1;
cons (bytes);
+ sparc_no_align_cons = 0;
}
/* This handles the native word allocation pseudo-op .nword.
static void
s_ncons (bytes)
- int bytes;
+ int bytes ATTRIBUTE_UNUSED;
{
cons (sparc_arch_size == 32 ? 4 : 8);
}
static void
s_register (ignore)
- int ignore;
+ int ignore ATTRIBUTE_UNUSED;
{
char c;
int reg;
c = get_symbol_end ();
if (strcmp (regname, "scratch") && strcmp (regname, "ignore"))
as_bad (_("register syntax is .register %%g[2367],{#scratch|symbolname|#ignore}"));
- if (regname [0] == 'i')
+ if (regname[0] == 'i')
regname = NULL;
else
regname = "";
if (! enforce_aligned_data)
return;
+ /* Don't align if this is an unaligned pseudo-op. */
if (sparc_no_align_cons)
- {
- /* This is an unaligned pseudo-op. */
- sparc_no_align_cons = 0;
- return;
- }
+ return;
- nalign = log2 (nbytes);
+ nalign = mylog2 (nbytes);
if (nalign == 0)
return;
return;
}
- p = frag_var (rs_align_code, 1, 1, (relax_substateT) 0,
+ p = frag_var (rs_align_test, 1, 1, (relax_substateT) 0,
(symbolS *) NULL, (offsetT) nalign, (char *) NULL);
record_alignment (now_seg, nalign);
}
-/* This is where we do the unexpected alignment check.
- This is called from HANDLE_ALIGN in tc-sparc.h. */
+/* This is called from HANDLE_ALIGN in tc-sparc.h. */
void
sparc_handle_align (fragp)
fragS *fragp;
{
- if (fragp->fr_type == rs_align_code && !fragp->fr_subtype
- && fragp->fr_next->fr_address - fragp->fr_address - fragp->fr_fix != 0)
- as_bad_where (fragp->fr_file, fragp->fr_line, _("misaligned data"));
- if (fragp->fr_type == rs_align_code && fragp->fr_subtype == 1024)
+ int count, fix;
+ char *p;
+
+ count = fragp->fr_next->fr_address - fragp->fr_address - fragp->fr_fix;
+
+ switch (fragp->fr_type)
{
- int count = fragp->fr_next->fr_address - fragp->fr_address - fragp->fr_fix;
+ case rs_align_test:
+ if (count != 0)
+ as_bad_where (fragp->fr_file, fragp->fr_line, _("misaligned data"));
+ break;
- if (count >= 4
- && !(count & 3)
- && count <= 1024
- && !((long) (fragp->fr_literal + fragp->fr_fix) & 3))
- {
- unsigned *p = (unsigned *) (fragp->fr_literal + fragp->fr_fix);
- int i;
+ case rs_align_code:
+ p = fragp->fr_literal + fragp->fr_fix;
+ fix = 0;
- for (i = 0; i < count; i += 4, p++)
- if (INSN_BIG_ENDIAN)
- /* Emit nops. */
- number_to_chars_bigendian ((char *) p, 0x01000000, 4);
- else
- number_to_chars_littleendian ((char *) p, 0x10000000, 4);
+ if (count & 3)
+ {
+ fix = count & 3;
+ memset (p, 0, fix);
+ p += fix;
+ count -= fix;
+ }
- if (SPARC_OPCODE_ARCH_V9_P (max_architecture) && count > 8)
- {
- char *waddr = &fragp->fr_literal[fragp->fr_fix];
- unsigned wval = (0x30680000 | count >> 2); /* ba,a,pt %xcc, 1f */
- if (INSN_BIG_ENDIAN)
- number_to_chars_bigendian (waddr, wval, 4);
- else
- number_to_chars_littleendian (waddr, wval, 4);
- }
- fragp->fr_var = count;
+ if (SPARC_OPCODE_ARCH_V9_P (max_architecture) && count > 8)
+ {
+ unsigned wval = (0x30680000 | count >> 2); /* ba,a,pt %xcc, 1f */
+ if (INSN_BIG_ENDIAN)
+ number_to_chars_bigendian (p, wval, 4);
+ else
+ number_to_chars_littleendian (p, wval, 4);
+ p += 4;
+ count -= 4;
+ fix += 4;
}
+
+ if (INSN_BIG_ENDIAN)
+ number_to_chars_bigendian (p, 0x01000000, 4);
+ else
+ number_to_chars_littleendian (p, 0x01000000, 4);
+
+ fragp->fr_fix += fix;
+ fragp->fr_var = 4;
+ break;
+
+ default:
+ break;
}
}
elf_elfheader (stdoutput)->e_flags |= EF_SPARC_32PLUS;
if (current_architecture == SPARC_OPCODE_ARCH_V9A)
elf_elfheader (stdoutput)->e_flags |= EF_SPARC_SUN_US1;
+ else if (current_architecture == SPARC_OPCODE_ARCH_V9B)
+ elf_elfheader (stdoutput)->e_flags |= EF_SPARC_SUN_US1|EF_SPARC_SUN_US3;
+}
+
+void
+sparc_cons (exp, size)
+ expressionS *exp;
+ int size;
+{
+ char *save;
+
+ SKIP_WHITESPACE ();
+ sparc_cons_special_reloc = NULL;
+ save = input_line_pointer;
+ if (input_line_pointer[0] == '%'
+ && input_line_pointer[1] == 'r'
+ && input_line_pointer[2] == '_')
+ {
+ if (strncmp (input_line_pointer + 3, "disp", 4) == 0)
+ {
+ input_line_pointer += 7;
+ sparc_cons_special_reloc = "disp";
+ }
+ else if (strncmp (input_line_pointer + 3, "plt", 3) == 0)
+ {
+ if (size != 4 && size != 8)
+ as_bad (_("Illegal operands: %%r_plt in %d-byte data field"), size);
+ else
+ {
+ input_line_pointer += 6;
+ sparc_cons_special_reloc = "plt";
+ }
+ }
+ else if (strncmp (input_line_pointer + 3, "tls_dtpoff", 10) == 0)
+ {
+ if (size != 4 && size != 8)
+ as_bad (_("Illegal operands: %%r_tls_dtpoff in %d-byte data field"), size);
+ else
+ {
+ input_line_pointer += 13;
+ sparc_cons_special_reloc = "tls_dtpoff";
+ }
+ }
+ if (sparc_cons_special_reloc)
+ {
+ int bad = 0;
+
+ switch (size)
+ {
+ case 1:
+ if (*input_line_pointer != '8')
+ bad = 1;
+ input_line_pointer--;
+ break;
+ case 2:
+ if (input_line_pointer[0] != '1' || input_line_pointer[1] != '6')
+ bad = 1;
+ break;
+ case 4:
+ if (input_line_pointer[0] != '3' || input_line_pointer[1] != '2')
+ bad = 1;
+ break;
+ case 8:
+ if (input_line_pointer[0] != '6' || input_line_pointer[1] != '4')
+ bad = 1;
+ break;
+ default:
+ bad = 1;
+ break;
+ }
+
+ if (bad)
+ {
+ as_bad (_("Illegal operands: Only %%r_%s%d allowed in %d-byte data fields"),
+ sparc_cons_special_reloc, size * 8, size);
+ }
+ else
+ {
+ input_line_pointer += 2;
+ if (*input_line_pointer != '(')
+ {
+ as_bad (_("Illegal operands: %%r_%s%d requires arguments in ()"),
+ sparc_cons_special_reloc, size * 8);
+ bad = 1;
+ }
+ }
+
+ if (bad)
+ {
+ input_line_pointer = save;
+ sparc_cons_special_reloc = NULL;
+ }
+ else
+ {
+ int c;
+ char *end = ++input_line_pointer;
+ int npar = 0;
+
+ while (! is_end_of_line[(c = *end)])
+ {
+ if (c == '(')
+ npar++;
+ else if (c == ')')
+ {
+ if (!npar)
+ break;
+ npar--;
+ }
+ end++;
+ }
+
+ if (c != ')')
+ as_bad (_("Illegal operands: %%r_%s%d requires arguments in ()"),
+ sparc_cons_special_reloc, size * 8);
+ else
+ {
+ *end = '\0';
+ expression (exp);
+ *end = c;
+ if (input_line_pointer != end)
+ {
+ as_bad (_("Illegal operands: %%r_%s%d requires arguments in ()"),
+ sparc_cons_special_reloc, size * 8);
+ }
+ else
+ {
+ input_line_pointer++;
+ SKIP_WHITESPACE ();
+ c = *input_line_pointer;
+ if (! is_end_of_line[c] && c != ',')
+ as_bad (_("Illegal operands: garbage after %%r_%s%d()"),
+ sparc_cons_special_reloc, size * 8);
+ }
+ }
+ }
+ }
+ }
+ if (sparc_cons_special_reloc == NULL)
+ expression (exp);
}
+
#endif
/* This is called by emit_expr via TC_CONS_FIX_NEW when creating a
(nbytes == 2 ? BFD_RELOC_16 :
(nbytes == 4 ? BFD_RELOC_32 : BFD_RELOC_64)));
- if (target_little_endian_data && nbytes == 4
+ if (target_little_endian_data
+ && nbytes == 4
&& now_seg->flags & SEC_ALLOC)
r = BFD_RELOC_SPARC_REV32;
+
+ if (sparc_cons_special_reloc)
+ {
+ if (*sparc_cons_special_reloc == 'd')
+ switch (nbytes)
+ {
+ case 1: r = BFD_RELOC_8_PCREL; break;
+ case 2: r = BFD_RELOC_16_PCREL; break;
+ case 4: r = BFD_RELOC_32_PCREL; break;
+ case 8: r = BFD_RELOC_64_PCREL; break;
+ default: abort ();
+ }
+ else if (*sparc_cons_special_reloc == 'p')
+ switch (nbytes)
+ {
+ case 4: r = BFD_RELOC_SPARC_PLT32; break;
+ case 8: r = BFD_RELOC_SPARC_PLT64; break;
+ }
+ else
+ switch (nbytes)
+ {
+ case 4: r = BFD_RELOC_SPARC_TLS_DTPOFF32; break;
+ case 8: r = BFD_RELOC_SPARC_TLS_DTPOFF64; break;
+ }
+ }
+ else if (sparc_no_align_cons)
+ {
+ switch (nbytes)
+ {
+ case 2: r = BFD_RELOC_SPARC_UA16; break;
+ case 4: r = BFD_RELOC_SPARC_UA32; break;
+ case 8: r = BFD_RELOC_SPARC_UA64; break;
+ default: abort ();
+ }
+ }
+
fix_new_exp (frag, where, (int) nbytes, exp, 0, r);
+ sparc_cons_special_reloc = NULL;
+}
+
+void
+sparc_cfi_frame_initial_instructions ()
+{
+ cfi_add_CFA_def_cfa (14, sparc_arch_size == 64 ? 0x7ff : 0);
}
-#ifdef OBJ_ELF
int
-elf32_sparc_force_relocation (fixp)
- struct fix *fixp;
+sparc_regname_to_dw2regnum (const char *regname)
{
- if (fixp->fx_r_type == BFD_RELOC_VTABLE_INHERIT
- || fixp->fx_r_type == BFD_RELOC_VTABLE_ENTRY)
- return 1;
+ char *p, *q;
- return 0;
+ if (!regname[0])
+ return -1;
+
+ q = "goli";
+ p = strchr (q, regname[0]);
+ if (p)
+ {
+ if (regname[1] < '0' || regname[1] > '8' || regname[2])
+ return -1;
+ return (p - q) * 8 + regname[1] - '0';
+ }
+ if (regname[0] == 's' && regname[1] == 'p' && !regname[2])
+ return 14;
+ if (regname[0] == 'f' && regname[1] == 'p' && !regname[2])
+ return 30;
+ if (regname[0] == 'f' || regname[0] == 'r')
+ {
+ unsigned int regnum;
+
+ regnum = strtoul (regname + 1, &q, 10);
+ if (p == q || *q)
+ return -1;
+ if (regnum >= ((regname[0] == 'f'
+ && SPARC_OPCODE_ARCH_V9_P (max_architecture))
+ ? 64 : 32))
+ return -1;
+ if (regname[0] == 'f')
+ {
+ regnum += 32;
+ if (regnum >= 64 && (regnum & 1))
+ return -1;
+ }
+ return regnum;
+ }
+ return -1;
+}
+
+void
+sparc_cfi_emit_pcrel_expr (expressionS *exp, unsigned int nbytes)
+{
+ sparc_cons_special_reloc = "disp";
+ sparc_no_align_cons = 1;
+ emit_expr (exp, nbytes);
+ sparc_no_align_cons = 0;
+ sparc_cons_special_reloc = NULL;
}
-#endif
projects / deliverable / binutils-gdb.git / blobdiff