x86/Intel: fold "xmmword" with "oword"

[deliverable/binutils-gdb.git] / gas / config / tc-z80.c

diff --git a/gas/config/tc-z80.c b/gas/config/tc-z80.c
index 7b1e72ab4698733913ad68d005c2516fddbe697a..a2e5e08f43271b62a241a8f7ec92f496e7297a13 100644 (file)
--- a/gas/config/tc-z80.c
+++ b/gas/config/tc-z80.c
@@ -1,5 +1,5 @@
 /* tc-z80.c -- Assemble code for the Zilog Z80 and ASCII R800
-   Copyright (C) 2005-2016 Free Software Foundation, Inc.
+   Copyright (C) 2005-2019 Free Software Foundation, Inc.
    Contributed by Arnold Metselaar <arnold_m@operamail.com>
 
    This file is part of GAS, the GNU Assembler.
@@ -156,7 +156,7 @@ CPU model/instruction set options:\n\
   -Fup\n\
 \ttreat undocumented z80-instructions that do not work on R800 as errors\n\
   -r800\t  assemble for R800\n\n\
-Default: -z80 -ignore-undocument-instructions -warn-unportable-instructions.\n");
+Default: -z80 -ignore-undocumented-instructions -warn-unportable-instructions.\n");
 }
 
 static symbolS * zero;
@@ -317,6 +317,7 @@ z80_start_line_hook (void)
              *p++ = buf[2];
              break;
            }
+         /* Fall through.  */
        case '"':
          for (quote = *p++; quote != *p && '\n' != *p; ++p)
            /* No escapes.  */ ;
@@ -539,7 +540,7 @@ contains_register(symbolS *sym)
     return 0;
 }
 
-/* Parse general expression, not loooking for indexed adressing.  */
+/* Parse general expression, not looking for indexed addressing.  */
 static const char *
 parse_exp_not_indexed (const char *s, expressionS *op)
 {
@@ -848,8 +849,9 @@ emit_m (char prefix, char opcode, const char *args)
 /* The operand m may be as above or one of the undocumented
    combinations (ix+d),r and (iy+d),r (if unportable instructions
    are allowed).  */
+
 static const char *
-emit_mr (char prefix, char opcode, const char *args)
+emit_mr (char prefix, char opcode, const char *args, bfd_boolean unportable)
 {
   expressionS arg_m, arg_r;
   const char *p;
@@ -866,15 +868,19 @@ emit_mr (char prefix, char opcode, const char *args)
          if ((arg_r.X_md == 0)
              && (arg_r.X_op == O_register)
              && (arg_r.X_add_number < 8))
-           opcode += arg_r.X_add_number-6; /* Emit_mx () will add 6.  */
+           opcode += arg_r.X_add_number - 6; /* Emit_mx () will add 6.  */
          else
            {
              ill_op ();
              break;
            }
          check_mach (INS_UNPORT);
+          unportable = TRUE;
        }
+      /* Fall through.  */
     case O_register:
+      if (unportable)
+       check_mach (INS_UNPORT);
       emit_mx (prefix, opcode, 0, & arg_m);
       break;
     default:
@@ -883,6 +889,18 @@ emit_mr (char prefix, char opcode, const char *args)
   return p;
 }
 
+static const char *
+emit_mr_z80 (char prefix, char opcode, const char *args)
+{
+  return emit_mr (prefix, opcode, args, FALSE);
+}
+
+static const char *
+emit_mr_unport (char prefix, char opcode, const char *args)
+{
+  return emit_mr (prefix, opcode, args, TRUE);
+}
+
 static void
 emit_sx (char prefix, char opcode, expressionS * arg_p)
 {
@@ -1201,7 +1219,7 @@ emit_bit (char prefix, char opcode, const char * args)
        p = emit_m (prefix, opcode + (bn << 3), p);
       else
        /* Set, res : resulting byte can be copied to register.  */
-       p = emit_mr (prefix, opcode + (bn << 3), p);
+        p = emit_mr (prefix, opcode + (bn << 3), p, FALSE);
     }
   else
     ill_op ();
@@ -1776,6 +1794,7 @@ emit_mulub (char prefix ATTRIBUTE_UNUSED, char opcode, const char * args)
              *q = opcode + ((reg - 'b') << 3);
              break;
            }
+         /* Fall through.  */
        default:
          ill_op ();
        }
@@ -1885,31 +1904,31 @@ static table_t instab[] =
   { "ret",  0xC9, 0xC0, emit_retcc },
   { "reti", 0xED, 0x4D, emit_insn },
   { "retn", 0xED, 0x45, emit_insn },
-  { "rl",   0xCB, 0x10, emit_mr },
+  { "rl",   0xCB, 0x10, emit_mr_z80 },
   { "rla",  0x00, 0x17, emit_insn },
-  { "rlc",  0xCB, 0x00, emit_mr },
+  { "rlc",  0xCB, 0x00, emit_mr_z80 },
   { "rlca", 0x00, 0x07, emit_insn },
   { "rld",  0xED, 0x6F, emit_insn },
-  { "rr",   0xCB, 0x18, emit_mr },
+  { "rr",   0xCB, 0x18, emit_mr_z80 },
   { "rra",  0x00, 0x1F, emit_insn },
-  { "rrc",  0xCB, 0x08, emit_mr },
+  { "rrc",  0xCB, 0x08, emit_mr_z80 },
   { "rrca", 0x00, 0x0F, emit_insn },
   { "rrd",  0xED, 0x67, emit_insn },
   { "rst",  0x00, 0xC7, emit_rst},
   { "sbc",  0x98, 0x42, emit_adc },
   { "scf",  0x00, 0x37, emit_insn },
   { "set",  0xCB, 0xC0, emit_bit },
-  { "sla",  0xCB, 0x20, emit_mr },
-  { "sli",  0xCB, 0x30, emit_mr },
-  { "sll",  0xCB, 0x30, emit_mr },
-  { "sra",  0xCB, 0x28, emit_mr },
-  { "srl",  0xCB, 0x38, emit_mr },
+  { "sla",  0xCB, 0x20, emit_mr_z80 },
+  { "sli",  0xCB, 0x30, emit_mr_unport },
+  { "sll",  0xCB, 0x30, emit_mr_unport },
+  { "sra",  0xCB, 0x28, emit_mr_z80 },
+  { "srl",  0xCB, 0x38, emit_mr_z80 },
   { "sub",  0x00, 0x90, emit_s },
   { "xor",  0x00, 0xA8, emit_s },
 } ;
 
 void
-md_assemble (char* str)
+md_assemble (char *str)
 {
   const char *p;
   char * old_ptr;
@@ -1988,7 +2007,7 @@ md_apply_fix (fixS * fixP, valueT* valP, segT seg ATTRIBUTE_UNUSED)
          fixP->fx_no_overflow = (-128 <= val && val < 128);
          if (!fixP->fx_no_overflow)
             as_bad_where (fixP->fx_file, fixP->fx_line,
-                         _("index offset  out of range"));
+                         _("index offset out of range"));
          *p_lit++ = val;
           fixP->fx_done = 1;
         }
@@ -2058,8 +2077,8 @@ tc_gen_reloc (asection *seg ATTRIBUTE_UNUSED , fixS *fixp)
       return NULL;
     }
 
-  reloc               = xmalloc (sizeof (arelent));
-  reloc->sym_ptr_ptr  = xmalloc (sizeof (asymbol *));
+  reloc               = XNEW (arelent);
+  reloc->sym_ptr_ptr  = XNEW (asymbol *);
   *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy);
   reloc->address      = fixp->fx_frag->fr_address + fixp->fx_where;
   reloc->howto        = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type);