[@b{-K}] [@b{-L}] [@b{--listing-lhs-width}=@var{NUM}]
[@b{--listing-lhs-width2}=@var{NUM}] [@b{--listing-rhs-width}=@var{NUM}]
[@b{--listing-cont-lines}=@var{NUM}] [@b{--keep-locals}]
+ [@b{--no-pad-sections}]
[@b{-o} @var{objfile}] [@b{-R}]
[@b{--hash-size}=@var{NUM}] [@b{--reduce-memory-overheads}]
[@b{--statistics}]
[@b{-mint-register=@var{number}}]
[@b{-mgcc-abi}|@b{-mrx-abi}]
@end ifset
+@ifset RISCV
+
+@emph{Target RISC-V options:}
+ [@b{-m32}|@b{-m64}]
+ [@b{-mrvc}]
+ [@b{-mhard-float}|@b{-msoft-float}]
+@end ifset
@ifset S390
@emph{Target s390 options:}
@emph{Target SPARC options:}
@c The order here is important. See c-sparc.texi.
- [@b{-Av6}|@b{-Av7}|@b{-Av8}|@b{-Asparclet}|@b{-Asparclite}
- @b{-Av8plus}|@b{-Av8plusa}|@b{-Av9}|@b{-Av9a}]
- [@b{-xarch=v8plus}|@b{-xarch=v8plusa}] [@b{-bump}]
+ [@b{-Av6}|@b{-Av7}|@b{-Av8}|@b{-Aleon}|@b{-Asparclet}|@b{-Asparclite}
+ @b{-Av8plus}|@b{-Av8plusa}|@b{-Av8plusb}|@b{-Av8plusc}|@b{-Av8plusd}
+ @b{-Av8plusv}|@b{-Av8plusm}|@b{-Av9}|@b{-Av9a}|@b{-Av9b}|@b{-Av9c}
+ @b{-Av9d}|@b{-Av9e}|@b{-Av9v}|@b{-Av9m}|@b{-Asparc}|@b{-Asparcvis}
+ @b{-Asparcvis2}|@b{-Asparcfmaf}|@b{-Asparcima}|@b{-Asparcvis3}
+ @b{-Asparcvisr}|@b{-Asparc5}]
+ [@b{-xarch=v8plus}|@b{-xarch=v8plusa}]|@b{-xarch=v8plusb}|@b{-xarch=v8plusc}
+ @b{-xarch=v8plusd}|@b{-xarch=v8plusv}|@b{-xarch=v8plusm}|@b{-xarch=v9}
+ @b{-xarch=v9a}|@b{-xarch=v9b}|@b{-xarch=v9c}|@b{-xarch=v9d}|@b{-xarch=v9e}
+ @b{-xarch=v9v}|@b{-xarch=v9m}|@b{-xarch=sparc}|@b{-xarch=sparcvis}
+ @b{-xarch=sparcvis2}|@b{-xarch=sparcfmaf}|@b{-xarch=sparcima}
+ @b{-xarch=sparcvis3}|@b{-xarch=sparcvisr}|@b{-xarch=sparc5}
+ @b{-bump}]
[@b{-32}|@b{-64}]
+ [@b{--enforce-aligned-data}][@b{--dcti-couples-detect}]
@end ifset
@ifset TIC54X
Set the maximum number of lines printed in a listing for a single line of input
to @var{number} + 1.
+@item --no-pad-sections
+Stop the assembler for padding the ends of output sections to the alignment
+of that section. The default is to pad the sections, but this can waste space
+which might be needed on targets which have tight memory constraints.
+
@item -o @var{objfile}
Name the object-file output from @command{@value{AS}} @var{objfile}.
@end ifset
+@ifset RISCV
+
+@ifclear man
+@xref{RISC-V-Opts}, for the options available when @value{AS} is configured
+for a RISC-V processor.
+@end ifclear
+
+@ifset man
+@c man begin OPTIONS
+The following options are available when @value{AS} is configured for a
+RISC-V processor.
+@c man end
+@c man begin INCLUDE
+@include c-riscv.texi
+@c ended inside the included file
+@end ifset
+
+@end ifset
+
@c man begin OPTIONS
@ifset RX
See the info pages for documentation of the RX-specific options.
Select the architecture mode, either the Enterprise System
Architecture (esa) or the z/Architecture mode (zarch).
@item -march=@var{processor}
-Specify which s390 processor variant is the target, @samp{g6}, @samp{g6},
-@samp{z900}, @samp{z990}, @samp{z9-109}, @samp{z9-ec}, @samp{z10},
-@samp{z196}, @samp{zEC12}, or @samp{z13}.
+Specify which s390 processor variant is the target, @samp{g5} (or
+@samp{arch3}), @samp{g6}, @samp{z900} (or @samp{arch5}), @samp{z990} (or
+@samp{arch6}), @samp{z9-109}, @samp{z9-ec} (or @samp{arch7}), @samp{z10} (or
+@samp{arch8}), @samp{z196} (or @samp{arch9}), @samp{zEC12} (or @samp{arch10}),
+or @samp{z13} (or @samp{arch11}).
@item -mregnames
@itemx -mno-regnames
Allow or disallow symbolic names for registers.
* listing:: --listing-XXX to configure listing output
* M:: -M or --mri to assemble in MRI compatibility mode
* MD:: --MD for dependency tracking
+* no-pad-sections:: --no-pad-sections to stop section padding
* o:: -o to name the object file
* R:: -R to join data and text sections
* statistics:: --statistics to see statistics about assembly
This feature is used in the automatic updating of makefiles.
+@node no-pad-sections
+@section Output Section Padding
+@kindex --no-pad-sections
+@cindex output section padding
+Normally the assembler will pad the end of each output section up to its
+alignment boundary. But this can waste space, which can be significant on
+memory constrained targets. So the @option{--no-pad-sections} option will
+disable this behaviour.
+
@node o
@section Name the Object File: @option{-o}
(@pxref{Include,,@code{.include}}). You can use the @sc{gnu} C compiler driver
to get other ``CPP'' style preprocessing by giving the input file a
@samp{.S} suffix. @xref{Overall Options, ,Options Controlling the Kind of
-Output, gcc.info, Using GNU CC}.
+Output, gcc info, Using GNU CC}.
Excess whitespace, comments, and character constants
cannot be used in the portions of the input text that are not
Previous value of @var{register} is saved at offset @var{offset} from
CFA.
+@subsection @code{.cfi_val_offset @var{register}, @var{offset}}
+Previous value of @var{register} is CFA + @var{offset}.
+
@subsection @code{.cfi_rel_offset @var{register}, @var{offset}}
Previous value of @var{register} is saved at offset @var{offset} from
the current CFA register. This is transformed to @code{.cfi_offset}
@ifset RL78
* RL78-Dependent:: RL78 Dependent Features
@end ifset
+@ifset RISCV
+* RISC-V-Dependent:: RISC-V Dependent Features
+@end ifset
@ifset RX
* RX-Dependent:: RX Dependent Features
@end ifset
@include c-rl78.texi
@end ifset
+@ifset RISCV
+@include c-riscv.texi
+@end ifset
+
@ifset RX
@include c-rx.texi
@end ifset
projects / deliverable / binutils-gdb.git / blobdiff