[AArch64] Add support for Cortex-A35

[deliverable/binutils-gdb.git] / gas / doc / c-aarch64.texi

diff --git a/gas/doc/c-aarch64.texi b/gas/doc/c-aarch64.texi
index 43c1a3631e5ff515568850ab15f5f929cdc99d9f..e7e6ba449bddab2d7f507101dbf96d40fc9abe47 100644 (file)
--- a/gas/doc/c-aarch64.texi
+++ b/gas/doc/c-aarch64.texi
@@ -55,10 +55,12 @@ file in ELF32 and ELF64 format respectively.  The default is @code{lp64}.
 This option specifies the target processor.  The assembler will issue an error
 message if an attempt is made to assemble an instruction which will not execute
 on the target processor.  The following processor names are recognized:
+@code{cortex-a35},
 @code{cortex-a53},
 @code{cortex-a57},
 @code{cortex-a72},
 @code{exynos-m1},
+@code{qdf24xx},
 @code{thunderx},
 @code{xgene1}
 and
@@ -81,7 +83,8 @@ extensions.
 This option specifies the target architecture.  The assembler will
 issue an error message if an attempt is made to assemble an
 instruction which will not execute on the target architecture.  The
-only value for @var{architecture} is @code{armv8-a}.
+following architecture names are recognized: @code{armv8-a} and
+@code{armv8.1-a}.
 
 If both @option{-mcpu} and @option{-march} are specified, the
 assembler will use the setting for @option{-mcpu}.  If neither are
@@ -339,6 +342,10 @@ should only be done if it is really necessary.
 @c YYYYYYYYYYYYYYYYYYYYYYYYYY
 @c ZZZZZZZZZZZZZZZZZZZZZZZZZZ
 
+@cindex @code{.xword} directive, AArch64
+@item .xword
+The @code{.xword} directive produces 64 bit values.
+
 @end table
 
 @node AArch64 Opcodes