-@c Copyright (C) 2000-2016 Free Software Foundation, Inc.
+@c Copyright (C) 2000-2019 Free Software Foundation, Inc.
@c This is part of the GAS manual.
@c For copying conditions, see the file as.texinfo.
@table @code
@item -mcpu=@var{cpu}
-@cindex @code{-mcpu=@var{cpu}} command line option, ARC
+@cindex @code{-mcpu=@var{cpu}} command-line option, ARC
Set architecture type and register usage for @var{cpu}. There are
also shortcut alias options available for backward compatibility and
convenience. Supported values for @var{cpu} are
@table @code
-@cindex @code{mA6} command line option, ARC
-@cindex @code{marc600} command line option, ARC
+@cindex @code{mA6} command-line option, ARC
+@cindex @code{marc600} command-line option, ARC
@item arc600
Assemble for ARC 600. Aliases: @code{-mA6}, @code{-mARC600}.
+@item arc600_norm
+Assemble for ARC 600 with norm instructions.
+
+@item arc600_mul64
+Assemble for ARC 600 with mul64 instructions.
+
+@item arc600_mul32x16
+Assemble for ARC 600 with mul32x16 instructions.
+
@item arc601
-@cindex @code{mARC601} command line option, ARC
+@cindex @code{mARC601} command-line option, ARC
Assemble for ARC 601. Alias: @code{-mARC601}.
+@item arc601_norm
+Assemble for ARC 601 with norm instructions.
+
+@item arc601_mul64
+Assemble for ARC 601 with mul64 instructions.
+
+@item arc601_mul32x16
+Assemble for ARC 601 with mul32x16 instructions.
+
@item arc700
-@cindex @code{mA7} command line option, ARC
-@cindex @code{mARC700} command line option, ARC
+@cindex @code{mA7} command-line option, ARC
+@cindex @code{mARC700} command-line option, ARC
Assemble for ARC 700. Aliases: @code{-mA7}, @code{-mARC700}.
@item arcem
-@cindex @code{mEM} command line option, ARC
+@cindex @code{mEM} command-line option, ARC
Assemble for ARC EM. Aliases: @code{-mEM}
+@item em
+Assemble for ARC EM, identical as arcem variant.
+
+@item em4
+Assemble for ARC EM with code-density instructions.
+
+@item em4_dmips
+Assemble for ARC EM with code-density instructions.
+
+@item em4_fpus
+Assemble for ARC EM with code-density instructions.
+
+@item em4_fpuda
+Assemble for ARC EM with code-density, and double-precision assist
+instructions.
+
+@item quarkse_em
+Assemble for QuarkSE-EM cpu.
+
@item archs
-@cindex @code{mHS} command line option, ARC
+@cindex @code{mHS} command-line option, ARC
Assemble for ARC HS. Aliases: @code{-mHS}, @code{-mav2hs}.
+@item hs
+Assemble for ARC HS.
+
+@item hs34
+Assemble for ARC HS34.
+
+@item hs38
+Assemble for ARC HS38.
+
+@item hs38_linux
+Assemble for ARC HS38 with floating point support on.
+
+@item nps400
+@cindex @code{mnps400} command-line option, ARC
+Assemble for ARC 700 with NPS-400 extended instructions.
+
@end table
-Note: the @code{.cpu} directive can to be used to select a core
-variant from within assembly code.
+Note: the @code{.cpu} directive (@pxref{ARC Directives}) can
+to be used to select a core variant from within assembly code.
-@cindex @code{-EB} command line option, ARC
+@cindex @code{-EB} command-line option, ARC
@item -EB
This option specifies that the output generated by the assembler should
be marked as being encoded for a big-endian processor.
-@cindex @code{-EL} command line option, ARC
+@cindex @code{-EL} command-line option, ARC
@item -EL
This option specifies that the output generated by the assembler should
be marked as being encoded for a little-endian processor - this is the
default.
-@cindex @code{-mcode-density} command line option, ARC
+@cindex @code{-mcode-density} command-line option, ARC
@item -mcode-density
This option turns on Code Density instructions. Only valid for ARC EM
processors.
-@cindex @code{-mrelax} command line option, ARC
+@cindex @code{-mrelax} command-line option, ARC
@item -mrelax
Enable support for assembly-time relaxation. The assembler will
replace a longer version of an instruction with a shorter one,
whenever it is possible.
+@cindex @code{-mnps400} command-line option, ARC
+@item -mnps400
+Enable support for NPS-400 extended instructions.
+
+@cindex @code{-mspfp} command-line option, ARC
+@item -mspfp
+Enable support for single-precision floating point instructions.
+
+@cindex @code{-mdpfp} command-line option, ARC
+@item -mdpfp
+Enable support for double-precision floating point instructions.
+
+@cindex @code{-mfpuda} command-line option, ARC
+@item -mfpuda
+Enable support for double-precision assist floating point instructions.
+Only valid for ARC EM processors.
+
@end table
@node ARC Syntax
@item ARC600
Assemble for the ARC600 instruction set.
+@item arc600_norm
+Assemble for ARC 600 with norm instructions.
+
+@item arc600_mul64
+Assemble for ARC 600 with mul64 instructions.
+
+@item arc600_mul32x16
+Assemble for ARC 600 with mul32x16 instructions.
+
+@item arc601
+Assemble for ARC 601 instruction set.
+
+@item arc601_norm
+Assemble for ARC 601 with norm instructions.
+
+@item arc601_mul64
+Assemble for ARC 601 with mul64 instructions.
+
+@item arc601_mul32x16
+Assemble for ARC 601 with mul32x16 instructions.
+
@item ARC700
Assemble for the ARC700 instruction set.
+@item NPS400
+Assemble for the NPS400 instruction set.
+
@item EM
Assemble for the ARC EM instruction set.
+@item arcem
+Assemble for ARC EM instruction set
+
+@item em4
+Assemble for ARC EM with code-density instructions.
+
+@item em4_dmips
+Assemble for ARC EM with code-density instructions.
+
+@item em4_fpus
+Assemble for ARC EM with code-density instructions.
+
+@item em4_fpuda
+Assemble for ARC EM with code-density, and double-precision assist
+instructions.
+
+@item quarkse_em
+Assemble for QuarkSE-EM instruction set.
+
@item HS
Assemble for the ARC HS instruction set.
+@item archs
+Assemble for ARC HS instruction set.
+
+@item hs
+Assemble for ARC HS instruction set.
+
+@item hs34
+Assemble for ARC HS34 instruction set.
+
+@item hs38
+Assemble for ARC HS38 instruction set.
+
+@item hs38_linux
+Assemble for ARC HS38 with floating point support on.
+
@end table
-Note: the @code{.cpu} directive overrides the command line option
+Note: the @code{.cpu} directive overrides the command-line option
@code{-mcpu=@var{cpu}}; a warning is emitted when the version is not
consistent between the two.
@item SYNTAX_3OP
Three Operand Instruction.
+
+@item SYNTAX_1OP
+One Operand Instruction.
+
+@item SYNTAX_NOP
+No Operand Instruction.
@end table
The syntax class may be followed by @samp{|} and one of the following
which describes a two operand instruction with an implicit first
immediate operand. The result of this operation would be discarded.
+@cindex @code{.arc_attribute} directive, ARC
+@item .arc_attribute @var{tag}, @var{value}
+Set the ARC object attribute @var{tag} to @var{value}.
+
+The @var{tag} is either an attribute number, or one of the following:
+@code{Tag_ARC_PCS_config}, @code{Tag_ARC_CPU_base},
+@code{Tag_ARC_CPU_variation}, @code{Tag_ARC_CPU_name},
+@code{Tag_ARC_ABI_rf16}, @code{Tag_ARC_ABI_osver}, @code{Tag_ARC_ABI_sda},
+@code{Tag_ARC_ABI_pic}, @code{Tag_ARC_ABI_tls}, @code{Tag_ARC_ABI_enumsize},
+@code{Tag_ARC_ABI_exceptions}, @code{Tag_ARC_ABI_double_size},
+@code{Tag_ARC_ISA_config}, @code{Tag_ARC_ISA_apex},
+@code{Tag_ARC_ISA_mpy_option}
+
+The @var{value} is either a @code{number}, @code{"string"}, or
+@code{number, "string"} depending on the tag.
+
@end table
@node ARC Modifiers
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