-@c Copyright 2006
-@c Free Software Foundation, Inc.
+@c Copyright (C) 2006-2020 Free Software Foundation, Inc.
@c This is part of the GAS manual.
@c For copying conditions, see the file as.texinfo.
* AVR Options:: Options
* AVR Syntax:: Syntax
* AVR Opcodes:: Opcodes
+* AVR Pseudo Instructions:: Pseudo Instructions
@end menu
@node AVR Options
@table @code
-@cindex @code{-mmcu=} command line option, AVR
+@cindex @code{-mmcu=} command-line option, AVR
@item -mmcu=@var{mcu}
Specify ATMEL AVR instruction set or MCU type.
Instruction set avr1 is for the minimal AVR core, not supported by the C
-compiler, only for assembler programs (MCU types: at90s1200, attiny10,
+compiler, only for assembler programs (MCU types: at90s1200,
attiny11, attiny12, attiny15, attiny28).
Instruction set avr2 (default) is for the classic AVR core with up to
-8K program memory space (MCU types: at90s2313, at90s2323, attiny22,
-attiny26, at90s2333, at90s2343, at90s4414, at90s4433, at90s4434,
-at90s8515, at90c8534, at90s8535, at86rf401, attiny13, attiny2313,
-attiny261, attiny461, attiny861, attiny24, attiny44, attiny84, attiny25,
-attiny45, attiny85).
+8K program memory space (MCU types: at90s2313, at90s2323, at90s2333, at90s2343,
+attiny22, attiny26, at90s4414, at90s4433, at90s4434, at90s8515, at90c8534,
+at90s8535).
+
+Instruction set avr25 is for the classic AVR core with up to 8K program memory
+space plus the MOVW instruction (MCU types: attiny13, attiny13a, attiny2313,
+attiny2313a, attiny24, attiny24a, attiny4313, attiny44, attiny44a, attiny84,
+attiny84a, attiny25, attiny45, attiny85, attiny261, attiny261a, attiny461,
+attiny461a, attiny861, attiny861a, attiny87, attiny43u, attiny48, attiny88,
+attiny828, at86rf401, ata6289, ata5272).
Instruction set avr3 is for the classic AVR core with up to 128K program
-memory space (MCU types: atmega103, atmega603, at43usb320, at43usb355,
-at76c711).
+memory space (MCU types: at43usb355, at76c711).
+
+Instruction set avr31 is for the classic AVR core with exactly 128K program
+memory space (MCU types: atmega103, at43usb320).
+
+Instruction set avr35 is for classic AVR core plus MOVW, CALL, and JMP
+instructions (MCU types: attiny167, attiny1634, at90usb82, at90usb162,
+atmega8u2, atmega16u2, atmega32u2, ata5505).
Instruction set avr4 is for the enhanced AVR core with up to 8K program
-memory space (MCU types: atmega48, atmega8, atmega83, atmega85, atmega88,
-atmega8515, atmega8535, at90pwm2, at90pwm3).
+memory space (MCU types: atmega48, atmega48a, atmega48pa, atmega48p, atmega8,
+atmega8a, atmega88, atmega88a, atmega88p, atmega88pa, atmega8515, atmega8535,
+atmega8hva, at90pwm1, at90pwm2, at90pwm2b, at90pwm3, at90pwm3b, at90pwm81,
+ata6285, ata6286).
Instruction set avr5 is for the enhanced AVR core with up to 128K program
-memory space (MCU types: atmega16, atmega161, atmega162, atmega163,
-atmega164p, atmega165, atmega165p, atmega168, atmega169, atmega169p,
-atmega32, atmega323, atmega324p, atmega325, atmega329, atmega3250,
-atmega3290, atmega406, atmega64, atmega640, atmega644, atmega644p,
-atmega128, atmega1280, atmega1281, atmega645, atmega649, atmega6450,
-atmega6490, at90can32, at90can64, at90can128, at90usb646, at90usb647,
-at90usb1286, at90usb1287, at94k).
-
-Instruction set avr6 is for the enhanced AVR core with 256K program
-memory space (MCU types: atmega2560, atmega2561).
-
-@cindex @code{-mall-opcodes} command line option, AVR
+memory space (MCU types: at90pwm161, atmega16, atmega16a, atmega161, atmega162,
+atmega163, atmega164a, atmega164p, atmega164pa, atmega165, atmega165a,
+atmega165p, atmega165pa, atmega168, atmega168a, atmega168p, atmega168pa,
+atmega169, atmega169a, atmega169p, atmega169pa, atmega32, atmega323, atmega324a,
+atmega324p, atmega324pa, atmega325, atmega325a, atmega32, atmega32a, atmega323,
+atmega324a, atmega324p, atmega324pa, atmega325, atmega325a, atmega325p,
+atmega325p, atmega325pa, atmega3250, atmega3250a, atmega3250p, atmega3250pa,
+atmega328, atmega328p, atmega329, atmega329a, atmega329p, atmega329pa,
+atmega3290a, atmega3290p, atmega3290pa, atmega406, atmega64, atmega64a,
+atmega64rfr2, atmega644rfr2, atmega640, atmega644, atmega644a, atmega644p,
+atmega644pa, atmega645, atmega645a, atmega645p, atmega6450, atmega6450a,
+atmega6450p, atmega649, atmega649a, atmega649p, atmega6490, atmega6490a,
+atmega6490p, atmega16hva, atmega16hva2, atmega16hvb, atmega16hvbrevb,
+atmega32hvb, atmega32hvbrevb, atmega64hve, at90can32, at90can64, at90pwm161,
+at90pwm216, at90pwm316, atmega32c1, atmega64c1, atmega16m1, atmega32m1,
+atmega64m1, atmega16u4, atmega32u4, atmega32u6, at90usb646, at90usb647, at94k,
+at90scr100, ata5790, ata5795).
+
+Instruction set avr51 is for the enhanced AVR core with exactly 128K
+program memory space (MCU types: atmega128, atmega128a, atmega1280,
+atmega1281, atmega1284, atmega1284p, atmega128rfa1, atmega128rfr2,
+atmega1284rfr2, at90can128, at90usb1286, at90usb1287, m3000).
+
+Instruction set avr6 is for the enhanced AVR core with a 3-byte PC
+(MCU types: atmega2560, atmega2561, atmega256rfr2, atmega2564rfr2).
+
+Instruction set avrxmega2 is for the XMEGA AVR core with 8K to 64K
+program memory space and less than 64K data space (MCU types:
+atxmega16a4, atxmega16a4u, atxmega16c4, atxmega16d4, atxmega16x1,
+atxmega32a4, atxmega32a4u, atxmega32c4, atxmega32d4, atxmega16e5,
+atxmega8e5, atxmega32e5, atxmega32x1).
+
+Instruction set avrxmega3 is for the XMEGA AVR core with up to 64K
+of combined program memory and RAM, and with program memory
+visible in the RAM address space (MCU types:
+attiny212, attiny214, attiny412, attiny414, attiny416, attiny417,
+attiny814, attiny816, attiny817, attiny1614, attiny1616, attiny1617,
+attiny3214, attiny3216, attiny3217).
+
+Instruction set avrxmega4 is for the XMEGA AVR core with up to 64K
+program memory space and less than 64K data space (MCU types:
+atxmega64a3, atxmega64a3u, atxmega64a4u, atxmega64b1, atxmega64b3,
+atxmega64c3, atxmega64d3, atxmega64d4).
+
+Instruction set avrxmega5 is for the XMEGA AVR core with up to 64K
+program memory space and greater than 64K data space (MCU types:
+atxmega64a1, atxmega64a1u).
+
+Instruction set avrxmega6 is for the XMEGA AVR core with larger than
+64K program memory space and less than 64K data space (MCU types:
+atxmega128a3, atxmega128a3u, atxmega128c3, atxmega128d3, atxmega128d4,
+atxmega192a3, atxmega192a3u, atxmega128b1, atxmega128b3, atxmega192c3,
+atxmega192d3, atxmega256a3, atxmega256a3u, atxmega256a3b,
+atxmega256a3bu, atxmega256c3, atxmega256d3, atxmega384c3,
+atxmega256d3).
+
+Instruction set avrxmega7 is for the XMEGA AVR core with larger than
+64K program memory space and greater than 64K data space (MCU types:
+atxmega128a1, atxmega128a1u, atxmega128a4u).
+
+Instruction set avrtiny is for the ATtiny4/5/9/10/20/40
+microcontrollers.
+
+@cindex @code{-mall-opcodes} command-line option, AVR
@item -mall-opcodes
Accept all AVR opcodes, even if not supported by @code{-mmcu}.
-@cindex @code{-mno-skip-bug} command line option, AVR
+@cindex @code{-mno-skip-bug} command-line option, AVR
@item -mno-skip-bug
This option disable warnings for skipping two-word instructions.
-@cindex @code{-mno-wrap} command line option, AVR
+@cindex @code{-mno-wrap} command-line option, AVR
@item -mno-wrap
This option reject @code{rjmp/rcall} instructions with 8K wrap-around.
+@cindex @code{-mrmw} command-line option, AVR
+@item -mrmw
+Accept Read-Modify-Write (@code{XCH,LAC,LAS,LAT}) instructions.
+
+@cindex @code{-mlink-relax} command-line option, AVR
+@item -mlink-relax
+Enable support for link-time relaxation. This is now on by default
+and this flag no longer has any effect.
+
+@cindex @code{-mno-link-relax} command-line option, AVR
+@item -mno-link-relax
+Disable support for link-time relaxation. The assembler will resolve
+relocations when it can, and may be able to better compress some debug
+information.
+
+@cindex @code{-mgcc-isr} command-line option, AVR
+@item -mgcc-isr
+Enable the @code{__gcc_isr} pseudo instruction.
+
@end table
@cindex line comment character, AVR
@cindex AVR line comment character
-The presence of a @samp{;} on a line indicates the start of a comment
-that extends to the end of the current line. If a @samp{#} appears as
-the first character of a line, the whole line is treated as a comment.
+The presence of a @samp{;} anywhere on a line indicates the start of a
+comment that extends to the end of that line.
+
+If a @samp{#} appears as the first character of a line, the whole line
+is treated as a comment, but in this case the line can also be a
+logical line number directive (@pxref{Comments}) or a preprocessor
+control command (@pxref{Preprocessing}).
@cindex line separator, AVR
@cindex statement separator, AVR
@cindex AVR register names
@cindex register names, AVR
-The AVR has 32 x 8-bit general purpouse working registers @samp{r0},
+The AVR has 32 x 8-bit general purpose working registers @samp{r0},
@samp{r1}, ... @samp{r31}.
Six of the 32 registers can be used as three 16-bit indirect address
register pointers for Data Space addressing. One of the these address
S @r{immediate value from 0 to 7 (S = s << 4)}
? @r{use this opcode entry if no parameters, else use next opcode entry}
-1001010010001000 clc
-1001010011011000 clh
-1001010011111000 cli
-1001010010101000 cln
-1001010011001000 cls
-1001010011101000 clt
-1001010010111000 clv
-1001010010011000 clz
-1001010000001000 sec
-1001010001011000 seh
-1001010001111000 sei
-1001010000101000 sen
-1001010001001000 ses
-1001010001101000 set
-1001010000111000 sev
-1001010000011000 sez
+1001010010001000 clc
+1001010011011000 clh
+1001010011111000 cli
+1001010010101000 cln
+1001010011001000 cls
+1001010011101000 clt
+1001010010111000 clv
+1001010010011000 clz
+1001010000001000 sec
+1001010001011000 seh
+1001010001111000 sei
+1001010000101000 sen
+1001010001001000 ses
+1001010001101000 set
+1001010000111000 sev
+1001010000011000 sez
100101001SSS1000 bclr S
100101000SSS1000 bset S
1001010100001001 icall
-1001010000001001 ijmp
+1001010000001001 ijmp
1001010111001000 lpm ?
1001000ddddd010+ lpm r,z
1001010111011000 elpm ?
1001000ddddd011+ elpm r,z
-0000000000000000 nop
-1001010100001000 ret
-1001010100011000 reti
+0000000000000000 nop
+1001010100001000 ret
+1001010100011000 reti
1001010110001000 sleep
1001010110011000 break
-1001010110101000 wdr
-1001010111101000 spm
+1001010110101000 wdr
+1001010111101000 spm
000111rdddddrrrr adc r,r
000011rdddddrrrr add r,r
001000rdddddrrrr and r,r
100!000dddddee-+ ld r,e
10o0oo1rrrrrbooo std b,r
100!001rrrrree-+ st e,r
-1001010100011001 eicall
-1001010000011001 eijmp
+1001010100011001 eicall
+1001010000011001 eijmp
@end smallexample
+
+@node AVR Pseudo Instructions
+@section Pseudo Instructions
+
+The only available pseudo-instruction @code{__gcc_isr} can be activated by
+option @option{-mgcc-isr}.
+
+@table @code
+
+@item __gcc_isr 1
+Emit code chunk to be used in avr-gcc ISR prologue.
+It will expand to at most six 1-word instructions, all optional:
+push of @code{tmp_reg}, push of @code{SREG},
+push and clear of @code{zero_reg}, push of @var{Reg}.
+
+@item __gcc_isr 2
+Emit code chunk to be used in an avr-gcc ISR epilogue.
+It will expand to at most five 1-word instructions, all optional:
+pop of @var{Reg}, pop of @code{zero_reg},
+pop of @code{SREG}, pop of @code{tmp_reg}.
+
+@item __gcc_isr 0, @var{Reg}
+Finish avr-gcc ISR function. Scan code since the last prologue
+for usage of: @code{SREG}, @code{tmp_reg}, @code{zero_reg}.
+Prologue chunk and epilogue chunks will be replaced by appropriate code
+to save / restore @code{SREG}, @code{tmp_reg}, @code{zero_reg} and @var{Reg}.
+
+@end table
+
+Example input:
+
+@example
+__vector1:
+ __gcc_isr 1
+ lds r24, var
+ inc r24
+ sts var, r24
+ __gcc_isr 2
+ reti
+ __gcc_isr 0, r24
+@end example
+
+Example output:
+
+@example
+00000000 <__vector1>:
+ 0: 8f 93 push r24
+ 2: 8f b7 in r24, 0x3f
+ 4: 8f 93 push r24
+ 6: 80 91 60 00 lds r24, 0x0060 ; 0x800060 <var>
+ a: 83 95 inc r24
+ c: 80 93 60 00 sts 0x0060, r24 ; 0x800060 <var>
+ 10: 8f 91 pop r24
+ 12: 8f bf out 0x3f, r24
+ 14: 8f 91 pop r24
+ 16: 18 95 reti
+@end example
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