RISC-V: Add RV32E support.

[deliverable/binutils-gdb.git] / gas / doc / c-riscv.texi

diff --git a/gas/doc/c-riscv.texi b/gas/doc/c-riscv.texi
index 79bc4e37b6d720e1ef714752b80a93a8984d4efe..045c33a3aa7b1c4fe7821c1e12835a8f9877987b 100644 (file)
--- a/gas/doc/c-riscv.texi
+++ b/gas/doc/c-riscv.texi
@@ -46,7 +46,8 @@ Select the base isa, as specified by ISA.  For example -march=rv32ima.
 Selects the ABI, which is either "ilp32" or "lp64", optionally followed
 by "f", "d", or "q" to indicate single-precision, double-precision, or
 quad-precision floating-point calling convention, or none to indicate
-the soft-float calling convention.
+the soft-float calling convention.  Also, "ilp32" can optionally be followed
+by "e" to indicate the RVE ABI, which is always soft-float.
 
 @cindex @samp{-mrelax} option, RISC-V
 @item -mrelax