-@c Copyright 1991, 1992, 1993, 1994, 1995, 1997, 1999, 2002, 2008,
-@c 2011
-@c Free Software Foundation, Inc.
+@c Copyright (C) 1991-2020 Free Software Foundation, Inc.
@c This is part of the GAS manual.
@c For copying conditions, see the file as.texinfo.
@ifset GENERIC
@table @code
@kindex -Av6
-@kindex Av7
+@kindex -Av7
@kindex -Av8
+@kindex -Aleon
@kindex -Asparclet
@kindex -Asparclite
@kindex -Av9
@kindex -Av9a
-@item -Av6 | -Av7 | -Av8 | -Asparclet | -Asparclite
-@itemx -Av8plus | -Av8plusa | -Av9 | -Av9a
+@kindex -Av9b
+@kindex -Av9c
+@kindex -Av9d
+@kindex -Av9e
+@kindex -Av9v
+@kindex -Av9m
+@kindex -Asparc
+@kindex -Asparcvis
+@kindex -Asparcvis2
+@kindex -Asparcfmaf
+@kindex -Asparcima
+@kindex -Asparcvis3
+@kindex -Asparcvis3r
+@item -Av6 | -Av7 | -Av8 | -Aleon | -Asparclet | -Asparclite
+@itemx -Av8plus | -Av8plusa | -Av8plusb | -Av8plusc | -Av8plusd |
+@itemx -Av8plusv | -Av8plusm | -Av8plusm8
+@itemx -Av9 | -Av9a | -Av9b | -Av9c | -Av9d | -Av9e | -Av9v | -Av9m | -Av9m8
+@itemx -Asparc | -Asparcvis | -Asparcvis2 | -Asparcfmaf | -Asparcima
+@itemx -Asparcvis3 | -Asparcvis3r | -Asparc5 | -Asparc6
Use one of the @samp{-A} options to select one of the SPARC
architectures explicitly. If you select an architecture explicitly,
@code{@value{AS}} reports a fatal error if it encounters an instruction
or feature requiring an incompatible or higher level.
-@samp{-Av8plus} and @samp{-Av8plusa} select a 32 bit environment.
+@samp{-Av8plus}, @samp{-Av8plusa}, @samp{-Av8plusb}, @samp{-Av8plusc},
+@samp{-Av8plusd}, and @samp{-Av8plusv} select a 32 bit environment.
-@samp{-Av9} and @samp{-Av9a} select a 64 bit environment and are not
-available unless GAS is explicitly configured with 64 bit environment
-support.
+@samp{-Av9}, @samp{-Av9a}, @samp{-Av9b}, @samp{-Av9c}, @samp{-Av9d},
+@samp{-Av9e}, @samp{-Av9v} and @samp{-Av9m} select a 64 bit
+environment and are not available unless GAS is explicitly configured
+with 64 bit environment support.
@samp{-Av8plusa} and @samp{-Av9a} enable the SPARC V9 instruction set with
-UltraSPARC extensions.
+UltraSPARC VIS 1.0 extensions.
-@item -xarch=v8plus | -xarch=v8plusa
+@samp{-Av8plusb} and @samp{-Av9b} enable the UltraSPARC VIS 2.0 instructions,
+as well as the instructions enabled by @samp{-Av8plusa} and @samp{-Av9a}.
+
+@samp{-Av8plusc} and @samp{-Av9c} enable the UltraSPARC Niagara instructions,
+as well as the instructions enabled by @samp{-Av8plusb} and @samp{-Av9b}.
+
+@samp{-Av8plusd} and @samp{-Av9d} enable the floating point fused
+multiply-add, VIS 3.0, and HPC extension instructions, as well as the
+instructions enabled by @samp{-Av8plusc} and @samp{-Av9c}.
+
+@samp{-Av8pluse} and @samp{-Av9e} enable the cryptographic
+instructions, as well as the instructions enabled by @samp{-Av8plusd}
+and @samp{-Av9d}.
+
+@samp{-Av8plusv} and @samp{-Av9v} enable floating point unfused
+multiply-add, and integer multiply-add, as well as the instructions
+enabled by @samp{-Av8pluse} and @samp{-Av9e}.
+
+@samp{-Av8plusm} and @samp{-Av9m} enable the VIS 4.0, subtract extended,
+xmpmul, xmontmul and xmontsqr instructions, as well as the instructions
+enabled by @samp{-Av8plusv} and @samp{-Av9v}.
+
+@samp{-Av8plusm8} and @samp{-Av9m8} enable the instructions introduced
+in the Oracle SPARC Architecture 2017 and the M8 processor, as
+well as the instructions enabled by @samp{-Av8plusm} and @samp{-Av9m}.
+
+@samp{-Asparc} specifies a v9 environment. It is equivalent to
+@samp{-Av9} if the word size is 64-bit, and @samp{-Av8plus} otherwise.
+
+@samp{-Asparcvis} specifies a v9a environment. It is equivalent to
+@samp{-Av9a} if the word size is 64-bit, and @samp{-Av8plusa} otherwise.
+
+@samp{-Asparcvis2} specifies a v9b environment. It is equivalent to
+@samp{-Av9b} if the word size is 64-bit, and @samp{-Av8plusb} otherwise.
+
+@samp{-Asparcfmaf} specifies a v9b environment with the floating point
+fused multiply-add instructions enabled.
+
+@samp{-Asparcima} specifies a v9b environment with the integer
+multiply-add instructions enabled.
+
+@samp{-Asparcvis3} specifies a v9b environment with the VIS 3.0,
+HPC , and floating point fused multiply-add instructions enabled.
+
+@samp{-Asparcvis3r} specifies a v9b environment with the VIS 3.0, HPC,
+and floating point unfused multiply-add instructions enabled.
+
+@samp{-Asparc5} is equivalent to @samp{-Av9m}.
+
+@samp{-Asparc6} is equivalent to @samp{-Av9m8}.
+
+@item -xarch=v8plus | -xarch=v8plusa | -xarch=v8plusb | -xarch=v8plusc
+@itemx -xarch=v8plusd | -xarch=v8plusv | -xarch=v8plusm |
+@itemx -xarch=v8plusm8 | -xarch=v9 | -xarch=v9a | -xarch=v9b
+@itemx -xarch=v9c | -xarch=v9d | -xarch=v9e | -xarch=v9v
+@itemx -xarch=v9m | -xarch=v9m8
+@itemx -xarch=sparc | -xarch=sparcvis | -xarch=sparcvis2
+@itemx -xarch=sparcfmaf | -xarch=sparcima | -xarch=sparcvis3
+@itemx -xarch=sparcvis3r | -xarch=sparc5 | -xarch=sparc6
For compatibility with the SunOS v9 assembler. These options are
-equivalent to -Av8plus and -Av8plusa, respectively.
+equivalent to -Av8plus, -Av8plusa, -Av8plusb, -Av8plusc, -Av8plusd,
+-Av8plusv, -Av8plusm, -Av8plusm8, -Av9, -Av9a, -Av9b, -Av9c, -Av9d,
+-Av9e, -Av9v, -Av9m, -Av9m8, -Asparc, -Asparcvis, -Asparcvis2,
+-Asparcfmaf, -Asparcima, -Asparcvis3, -Asparcvis3r, -Asparc5 and
+-Asparc6 respectively.
@item -bump
Warn whenever it is necessary to switch to another level.
Select the word size, either 32 bits or 64 bits.
These options are only available with the ELF object file format,
and require that the necessary BFD support has been included.
+
+@item --dcti-couples-detect
+Warn if a DCTI (delayed control transfer instruction) couple is found
+when generating code for a variant of the SPARC architecture in which
+the execution of the couple is unpredictable, or very slow. This is
+disabled by default.
@end table
@node Sparc-Aligned-Data
or quad numbered accesses are allowed. For example, @samp{%f34}
is a legal floating point register, but @samp{%f35} is not.
+Floating point registers accessed as double can also be referred using
+the @samp{%d@var{n}} notation, where @var{n} is even. Similarly,
+floating point registers accessed as quad can be referred using the
+@samp{%q@var{n}} notation, where @var{n} is a multiple of 4. For
+example, @samp{%f4} can be denoted as both @samp{%d4} and @samp{%q4}.
+On the other hand, @samp{%f2} can be denoted as @samp{%d2} but not as
+@samp{%q2}.
+
Certain V9 instructions allow access to ancillary state registers.
Most simply they can be referred to as @samp{%asr@var{n}} where
@var{n} can be from 16 to 31. However, there are some aliases
specification of which set of integer condition codes to
test. These are referred to as @samp{%xcc} and @samp{%icc}.
+Additionally, GAS supports the so-called ``natural'' condition codes;
+these are referred to as @samp{%ncc} and reference to @samp{%icc} if
+the word size is 32, @samp{%xcc} if the word size is 64.
+
In V9, there are 4 sets of floating point condition codes
which are referred to as @samp{%fcc@var{n}}.
The hyperprivileged implementation version register is referred
to as @samp{%hver}.
+@item
+The hyperprivileged system tick offset register is referred to as
+@samp{%hstick_offset}. Note that there is no @samp{%hstick} register,
+the normal @samp{%stick} is used.
+
+@item
+The hyperprivileged system tick enable register is referred to as
+@samp{%hstick_enable}.
+
@item
The hyperprivileged system tick compare register is referred
-to as @samp{%hstick_cmpr}. Note that there is no @samp{%hstick}
-register, the normal @samp{%stick} is used.
+to as @samp{%hstick_cmpr}.
@end itemize
@node Sparc-Constants
@item
@code{R_SPARC_M44} is requested using @samp{%m44}.
@item
-@code{R_SPARC_L44} is requested using @samp{%l44}.
+@code{R_SPARC_L44} is requested using @samp{%l44} or @samp{%l34}.
+@item
+@code{R_SPARC_H34} is requested using @samp{%h34}.
@end itemize
+The @samp{%l34} generates a @code{R_SPARC_L44} relocation because it
+calculates the necessary value, and therefore no explicit
+@code{R_SPARC_L34} relocation needed to be created for this purpose.
+
+The @samp{%h34} and @samp{%l34} relocations are used for the abs34 code
+model. Here is an example abs34 address generation sequence:
+
+@example
+sethi %h34(symbol), %g1
+sllx %g1, 2, %g1
+or %g1, %l34(symbol), %g1
+@end example
+
The PC relative relocation @code{R_SPARC_PC22} can be obtained by
enclosing an operand inside of @samp{%pc22}. Likewise, the
@code{R_SPARC_PC10} relocation can be obtained using @samp{%pc10}.
projects / deliverable / binutils-gdb.git / blobdiff