-@c Copyright 1997, 2002, 2003, 2006, 2011, 2012 Free Software Foundation, Inc.
+@c Copyright (C) 1997-2020 Free Software Foundation, Inc.
@c This is part of the GAS manual.
@c For copying conditions, see the file as.texinfo.
@code{@value{AS}} supports the following additional command-line options
for the V850 processor family:
-@cindex command line options, V850
-@cindex V850 command line options
+@cindex command-line options, V850
+@cindex V850 command-line options
@table @code
-@cindex @code{-wsigned_overflow} command line option, V850
+@cindex @code{-wsigned_overflow} command-line option, V850
@item -wsigned_overflow
Causes warnings to be produced when signed immediate values overflow the
space available for then within their opcodes. By default this option
is disabled as it is possible to receive spurious warnings due to using
exact bit patterns as immediate constants.
-@cindex @code{-wunsigned_overflow} command line option, V850
+@cindex @code{-wunsigned_overflow} command-line option, V850
@item -wunsigned_overflow
Causes warnings to be produced when unsigned immediate values overflow
the space available for then within their opcodes. By default this
option is disabled as it is possible to receive spurious warnings due to
using exact bit patterns as immediate constants.
-@cindex @code{-mv850} command line option, V850
+@cindex @code{-mv850} command-line option, V850
@item -mv850
Specifies that the assembled code should be marked as being targeted at
the V850 processor. This allows the linker to detect attempts to link
such code with code assembled for other processors.
-@cindex @code{-mv850e} command line option, V850
+@cindex @code{-mv850e} command-line option, V850
@item -mv850e
Specifies that the assembled code should be marked as being targeted at
the V850E processor. This allows the linker to detect attempts to link
such code with code assembled for other processors.
-@cindex @code{-mv850e1} command line option, V850
+@cindex @code{-mv850e1} command-line option, V850
@item -mv850e1
Specifies that the assembled code should be marked as being targeted at
the V850E1 processor. This allows the linker to detect attempts to link
such code with code assembled for other processors.
-@cindex @code{-mv850any} command line option, V850
+@cindex @code{-mv850any} command-line option, V850
@item -mv850any
Specifies that the assembled code should be marked as being targeted at
the V850 processor but support instructions that are specific to the
architecture, together with support routines only used by the V850E
architecture.
-@cindex @code{-mv850e2} command line option, V850
+@cindex @code{-mv850e2} command-line option, V850
@item -mv850e2
Specifies that the assembled code should be marked as being targeted at
the V850E2 processor. This allows the linker to detect attempts to link
such code with code assembled for other processors.
-@cindex @code{-mv850e2v3} command line option, V850
+@cindex @code{-mv850e2v3} command-line option, V850
@item -mv850e2v3
Specifies that the assembled code should be marked as being targeted at
the V850E2V3 processor. This allows the linker to detect attempts to link
such code with code assembled for other processors.
-@cindex @code{-mrelax} command line option, V850
+@cindex @code{-mv850e2v4} command-line option, V850
+@item -mv850e2v4
+This is an alias for @option{-mv850e3v5}.
+
+@cindex @code{-mv850e3v5} command-line option, V850
+@item -mv850e3v5
+Specifies that the assembled code should be marked as being targeted at
+the V850E3V5 processor. This allows the linker to detect attempts to link
+such code with code assembled for other processors.
+
+@cindex @code{-mrelax} command-line option, V850
@item -mrelax
Enables relaxation. This allows the .longcall and .longjump pseudo
ops to be used in the assembler source code. These ops label sections
assembler will then flag these sections of code and the linker will
attempt to relax them.
-@cindex @code{-mgcc-abi} command line option, V850
+@cindex @code{-mgcc-abi} command-line option, V850
@item -mgcc-abi
-Marks the generated objecy file as supporting the old GCC ABI.
+Marks the generated object file as supporting the old GCC ABI.
-@cindex @code{-mrh850-abi} command line option, V850
+@cindex @code{-mrh850-abi} command-line option, V850
@item -mrh850-abi
-Marks the generated objecy file as supporting the RH850 ABI. This is
+Marks the generated object file as supporting the RH850 ABI. This is
the default.
-@cindex @code{-m8byte-align} command line option, V850
+@cindex @code{-m8byte-align} command-line option, V850
@item -m8byte-align
-Marks the generated objecy file as supporting a maximum 64-bits of
+Marks the generated object file as supporting a maximum 64-bits of
alignment for variables defined in the source code.
-@cindex @code{-m4byte-align} command line option, V850
+@cindex @code{-m4byte-align} command-line option, V850
@item -m4byte-align
-Marks the generated objecy file as supporting a maximum 32-bits of
+Marks the generated object file as supporting a maximum 32-bits of
alignment for variables defined in the source code. This is the
default.
+@cindex @code{-msoft-float} command-line option, V850
+@item -msoft-float
+Marks the generated object file as not using any floating point
+instructions - and hence can be linked with other V850 binaries
+that do or do not use floating point. This is the default for
+binaries for architectures earlier than the @code{e2v3}.
+
+@cindex @code{-mhard-float} command-line option, V850
+@item -mhard-float
+Marks the generated object file as one that uses floating point
+instructions - and hence can only be linked with other V850 binaries
+that use the same kind of floating point instructions, or with
+binaries that do not use floating point at all. This is the default
+for binaries the @code{e2v3} and later architectures.
+
@end table
@node V850 Syntax
the V850E2V3 processor. This allows the linker to detect attempts to link
such code with code assembled for other processors.
+@cindex @code{.v850e2v4} directive, V850
+@item .v850e2v4
+Specifies that the assembled code should be marked as being targeted at
+the V850E3V5 processor. This allows the linker to detect attempts to link
+such code with code assembled for other processors.
+
+@cindex @code{.v850e3v5} directive, V850
+@item .v850e3v5
+Specifies that the assembled code should be marked as being targeted at
+the V850E3V5 processor. This allows the linker to detect attempts to link
+such code with code assembled for other processors.
+
@end table
@node V850 Opcodes
@cindex @code{sdaoff} pseudo-op, V850
@item sdaoff()
Computes the offset of the named variable from the start of the Small
-Data Area (whoes address is held in register 4, the GP register) and
+Data Area (whose address is held in register 4, the GP register) and
stores the result as a 16 bit signed value in the immediate operand
field of the given instruction. For example:
that the GP register contains a fixed address set to the address of the
label called '__gp'. This can either be set up automatically by the
linker, or specifically set by using the @samp{--defsym __gp=<value>}
-command line option].
+command-line option].
@cindex @code{tdaoff} pseudo-op, V850
@item tdaoff()
Computes the offset of the named variable from the start of the Tiny
-Data Area (whoes address is held in register 30, the EP register) and
+Data Area (whose address is held in register 30, the EP register) and
stores the result as a 4,5, 7 or 8 bit unsigned value in the immediate
operand field of the given instruction. For example:
that the EP register contains a fixed address set to the address of the
label called '__ep'. This can either be set up automatically by the
linker, or specifically set by using the @samp{--defsym __ep=<value>}
-command line option].
+command-line option].
@cindex @code{zdaoff} pseudo-op, V850
@item zdaoff()
@cindex @code{ctoff} pseudo-op, V850
@item ctoff()
Computes the offset of the named variable from the start of the Call
-Table Area (whoes address is helg in system register 20, the CTBP
+Table Area (whose address is held in system register 20, the CTBP
register) and stores the result a 6 or 16 bit unsigned value in the
immediate field of then given instruction or piece of data. For
example:
@samp{callt ctoff(table_func1)}
-will put the call the function whoes address is held in the call table
+will put the call the function whose address is held in the call table
at the location labeled 'table_func1'.
@cindex @code{longcall} pseudo-op, V850
Indicates that the following sequence of instructions is a long call
to function @code{name}. The linker will attempt to shorten this call
sequence if @code{name} is within a 22bit offset of the call. Only
-valid if the @code{-mrelax} command line switch has been enabled.
+valid if the @code{-mrelax} command-line switch has been enabled.
@cindex @code{longjump} pseudo-op, V850
@item .longjump @code{name}
Indicates that the following sequence of instructions is a long jump
to label @code{name}. The linker will attempt to shorten this code
sequence if @code{name} is within a 22bit offset of the jump. Only
-valid if the @code{-mrelax} command line switch has been enabled.
+valid if the @code{-mrelax} command-line switch has been enabled.
@end table
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