Add support for .extCondCode, .extCoreRegister and .extAuxRegister.

[deliverable/binutils-gdb.git] / gas / testsuite / gas / arc / st.d

diff --git a/gas/testsuite/gas/arc/st.d b/gas/testsuite/gas/arc/st.d
index b32934512cc871d3918b73e86ee2a5b76afa8acd..3f75d40c367f449551035094fc003013abf6f505 100644 (file)
--- a/gas/testsuite/gas/arc/st.d
+++ b/gas/testsuite/gas/arc/st.d
@@ -5,7 +5,7 @@
 
 Disassembly of section .text:
 
-[0-9a-f]+ <.L1-0x40>:
+[0-9a-f]+ <.text>:
    0:  1a00 0040               st      r1,\[r2\]
    4:  1a0e 0040               st      r1,\[r2,14\]
    8:  1a00 0042               stb     r1,\[r2\]
@@ -20,13 +20,11 @@ Disassembly of section .text:
   30:  1a03 0068               st.di.aw        r1,\[r2,3\]
   34:  1a04 006c               st[hw]+.di.aw   r1,\[r2,4\]
   38:  1c04 1f80 0000 0000     st      0,\[r12,4\]
-                       3c: R_ARC_32_ME .L1
-
-[0-9a-f]+ <.L1>:
+                       3c: R_ARC_32_ME .text\+0x40
   40:  212b 0080               sr      r1,\[r2\]
   44:  216b 0380               sr      r1,\[0xe\]
   48:  262b 7040 0000 03e8     sr      0x3e8,\[r1\]
   50:  262b 7080 0000 0064     sr      0x64,\[r2\]
   58:  212b 0f80 0000 2710     sr      r1,\[0x2710\]
   60:  266b 7fc0 0000 0064     sr      0x64,\[0x3f\]
-  68:  26ab 7901 0000 2710     sr      0x2710,\[100\]
+  68:  26ab 7901 0000 2710     sr      0x2710,\[vbfdw_build\]