Adds the speculation barrier instructions to the ARM assembler and disassembler.

[deliverable/binutils-gdb.git] / gas / testsuite / gas / arm / thumb2_ldr_immediate_armv6t2.d

diff --git a/gas/testsuite/gas/arm/thumb2_ldr_immediate_armv6t2.d b/gas/testsuite/gas/arm/thumb2_ldr_immediate_armv6t2.d
index 223fbaf6a6b5832dbc1d88bc7f04897cce67bdcb..93f832614b343542608fd305ef9db1dab4e7f439 100644 (file)
--- a/gas/testsuite/gas/arm/thumb2_ldr_immediate_armv6t2.d
+++ b/gas/testsuite/gas/arm/thumb2_ldr_immediate_armv6t2.d
@@ -1,6 +1,7 @@
-# name: Ldr immediate on armv6
+# name: Ldr immediate on armv6t2
 # as: -march=armv6t2
 # objdump: -dr --prefix-addresses --show-raw-insn
+#skip: *-*-pe *-wince-*
 
 .*: +file format .*arm.*
 
@@ -9,7 +10,13 @@ Disassembly of section .text:
 0[0-9a-f]+ <[^>]+> f04f 2163   mov.w   r1, #1660969728 .*
 0[0-9a-f]+ <[^>]+> f04f 1151   mov.w   r1, #5308497    .*
 0[0-9a-f]+ <[^>]+> f44f 228e   mov.w   r2, #290816     .*
-0[0-9a-f]+ <[^>]+> 4a01        ldr     r2, \[pc, #4\]  .*
+0[0-9a-f]+ <[^>]+> 4a07        ldr     r2, \[pc, #28\] .*
 0[0-9a-f]+ <[^>]+> f241 32f1   movw    r2, #5105       .*
+0[0-9a-f]+ <[^>]+> f04f 3872   mov.w   r8, #1920103026 .*
+0[0-9a-f]+ <[^>]+> f04f 2863   mov.w   r8, #1660969728 .*
+0[0-9a-f]+ <[^>]+> f04f 1851   mov.w   r8, #5308497    .*
+0[0-9a-f]+ <[^>]+> f44f 298e   mov.w   r9, #290816     .*
+0[0-9a-f]+ <[^>]+> f8df 9008   ldr.w   r9, \[pc, #8\]  .*
+0[0-9a-f]+ <[^>]+> f241 39f1   movw    r9, #5105       .*
 0[0-9a-f]+ <[^>]+> 0000        .short  0x0000
 0[0-9a-f]+ <[^>]+> ff320000    .word   0xff320000