[LVu] base subseg head view on prev subseg's tail

[deliverable/binutils-gdb.git] / gas / testsuite / gas / elf / dwarf2-12.d

diff --git a/gas/testsuite/gas/elf/dwarf2-12.d b/gas/testsuite/gas/elf/dwarf2-12.d
index 275d48fd30daa924ad941b217b6955f3094e8ae9..58cda41bb060f6fb2e44b886d177236ecff0131b 100644 (file)
--- a/gas/testsuite/gas/elf/dwarf2-12.d
+++ b/gas/testsuite/gas/elf/dwarf2-12.d
@@ -4,17 +4,17 @@
 # The am33 avr cr16 crx ft32 mn10 msp430 nds32 pru rl78 and xtensa targets do not evaluate the subtraction of symbols at assembly time.
 # The riscv targets do not support the subtraction of symbols.
 # The tile targets require 8-byte instructions, but the test only simulates 4-byte instructions.
-#not-target: am3*-* avr-* cr16-* crx-* ft32-* mn10*-* msp430-* nds32*-* pru-* riscv*-* rl78-* tile*-* xtensa-*
+#notarget: am3*-* avr-* cr16-* crx-* ft32-* mn10*-* msp430-* nds32*-* pru-* riscv*-* rl78-* tile*-* xtensa-*
 
 
 Hex dump of section '\.rodata':
   0x00000000 01 *.*
 
-Decoded dump of debug contents of section \.debug_line:
+Contents of the \.debug_line section:
 
 CU: dwarf2-12\.c:
-File name  *Line number  *Starting address  *View
-dwarf2-12\.c  *1  *0
-dwarf2-12\.c  *2  *0
-dwarf2-12\.c  *3  *0  *1
-dwarf2-12\.c  *3  *0x4
+File name  *Line number  *Starting address  *View +Stmt
+dwarf2-12\.c  *1  *0 +x
+dwarf2-12\.c  *2  *0 +x
+dwarf2-12\.c  *3  *0  *1 +x
+dwarf2-12\.c  *3  *0x4 +x