i386: Also check R12-R15 registers when optimizing testq to testb

[deliverable/binutils-gdb.git] / gas / testsuite / gas / i386 / optimize-5.d

diff --git a/gas/testsuite/gas/i386/optimize-5.d b/gas/testsuite/gas/i386/optimize-5.d
index ecc1ab139a379dd413e4faa0fda8ee95d9da4cd3..ecab78cb1a7dd9d27110d6c8e6ede606e935c0bb 100644 (file)
--- a/gas/testsuite/gas/i386/optimize-5.d
+++ b/gas/testsuite/gas/i386/optimize-5.d
@@ -74,12 +74,12 @@ Disassembly of section .text:
  +[a-f0-9]+:   c5 fa 6f 50 7f          vmovdqu 0x7f\(%eax\),%xmm2
  +[a-f0-9]+:   c5 fa 6f 50 7f          vmovdqu 0x7f\(%eax\),%xmm2
  +[a-f0-9]+:   c5 fa 6f 50 7f          vmovdqu 0x7f\(%eax\),%xmm2
- +[a-f0-9]+:   c5 f9 7f 88 80 00 00 00         vmovdqa %xmm1,0x80\(%eax\)
- +[a-f0-9]+:   c5 f9 7f 88 80 00 00 00         vmovdqa %xmm1,0x80\(%eax\)
- +[a-f0-9]+:   c5 fa 7f 88 80 00 00 00         vmovdqu %xmm1,0x80\(%eax\)
- +[a-f0-9]+:   c5 fa 7f 88 80 00 00 00         vmovdqu %xmm1,0x80\(%eax\)
- +[a-f0-9]+:   c5 fa 7f 88 80 00 00 00         vmovdqu %xmm1,0x80\(%eax\)
- +[a-f0-9]+:   c5 fa 7f 88 80 00 00 00         vmovdqu %xmm1,0x80\(%eax\)
+ +[a-f0-9]+:   62 f1 7d 08 7f 48 08    vmovdqa32 %xmm1,0x80\(%eax\)
+ +[a-f0-9]+:   62 f1 fd 08 7f 48 08    vmovdqa64 %xmm1,0x80\(%eax\)
+ +[a-f0-9]+:   62 f1 7f 08 7f 48 08    vmovdqu8 %xmm1,0x80\(%eax\)
+ +[a-f0-9]+:   62 f1 ff 08 7f 48 08    vmovdqu16 %xmm1,0x80\(%eax\)
+ +[a-f0-9]+:   62 f1 7e 08 7f 48 08    vmovdqu32 %xmm1,0x80\(%eax\)
+ +[a-f0-9]+:   62 f1 fe 08 7f 48 08    vmovdqu64 %xmm1,0x80\(%eax\)
  +[a-f0-9]+:   c5 fd 6f d1             vmovdqa %ymm1,%ymm2
  +[a-f0-9]+:   c5 fd 6f d1             vmovdqa %ymm1,%ymm2
  +[a-f0-9]+:   c5 fe 6f d1             vmovdqu %ymm1,%ymm2
@@ -92,12 +92,61 @@ Disassembly of section .text:
  +[a-f0-9]+:   c5 fe 6f 50 7f          vmovdqu 0x7f\(%eax\),%ymm2
  +[a-f0-9]+:   c5 fe 6f 50 7f          vmovdqu 0x7f\(%eax\),%ymm2
  +[a-f0-9]+:   c5 fe 6f 50 7f          vmovdqu 0x7f\(%eax\),%ymm2
- +[a-f0-9]+:   c5 fd 7f 88 80 00 00 00         vmovdqa %ymm1,0x80\(%eax\)
- +[a-f0-9]+:   c5 fd 7f 88 80 00 00 00         vmovdqa %ymm1,0x80\(%eax\)
- +[a-f0-9]+:   c5 fe 7f 88 80 00 00 00         vmovdqu %ymm1,0x80\(%eax\)
- +[a-f0-9]+:   c5 fe 7f 88 80 00 00 00         vmovdqu %ymm1,0x80\(%eax\)
- +[a-f0-9]+:   c5 fe 7f 88 80 00 00 00         vmovdqu %ymm1,0x80\(%eax\)
- +[a-f0-9]+:   c5 fe 7f 88 80 00 00 00         vmovdqu %ymm1,0x80\(%eax\)
+ +[a-f0-9]+:   62 f1 7d 28 7f 48 04    vmovdqa32 %ymm1,0x80\(%eax\)
+ +[a-f0-9]+:   62 f1 fd 28 7f 48 04    vmovdqa64 %ymm1,0x80\(%eax\)
+ +[a-f0-9]+:   62 f1 7f 28 7f 48 04    vmovdqu8 %ymm1,0x80\(%eax\)
+ +[a-f0-9]+:   62 f1 ff 28 7f 48 04    vmovdqu16 %ymm1,0x80\(%eax\)
+ +[a-f0-9]+:   62 f1 7e 28 7f 48 04    vmovdqu32 %ymm1,0x80\(%eax\)
+ +[a-f0-9]+:   62 f1 fe 28 7f 48 04    vmovdqu64 %ymm1,0x80\(%eax\)
+ +[a-f0-9]+:   62 f1 7d 48 6f 10       vmovdqa32 \(%eax\),%zmm2
+ +[a-f0-9]+:   c5 .*   vpand  %xmm2,%xmm3,%xmm4
+ +[a-f0-9]+:   c5 .*   vpand  %xmm2,%xmm3,%xmm4
+ +[a-f0-9]+:   c5 .*   vpandn %xmm2,%xmm3,%xmm4
+ +[a-f0-9]+:   c5 .*   vpandn %xmm2,%xmm3,%xmm4
+ +[a-f0-9]+:   c5 .*   vpor   %xmm2,%xmm3,%xmm4
+ +[a-f0-9]+:   c5 .*   vpor   %xmm2,%xmm3,%xmm4
+ +[a-f0-9]+:   c5 .*   vpxor  %xmm2,%xmm3,%xmm4
+ +[a-f0-9]+:   c5 .*   vpxor  %xmm2,%xmm3,%xmm4
+ +[a-f0-9]+:   c5 .*   vpand  %ymm2,%ymm3,%ymm4
+ +[a-f0-9]+:   c5 .*   vpand  %ymm2,%ymm3,%ymm4
+ +[a-f0-9]+:   c5 .*   vpandn %ymm2,%ymm3,%ymm4
+ +[a-f0-9]+:   c5 .*   vpandn %ymm2,%ymm3,%ymm4
+ +[a-f0-9]+:   c5 .*   vpor   %ymm2,%ymm3,%ymm4
+ +[a-f0-9]+:   c5 .*   vpor   %ymm2,%ymm3,%ymm4
+ +[a-f0-9]+:   c5 .*   vpxor  %ymm2,%ymm3,%ymm4
+ +[a-f0-9]+:   c5 .*   vpxor  %ymm2,%ymm3,%ymm4
+ +[a-f0-9]+:   c5 .*   vpand  0x70\(%eax\),%xmm2,%xmm3
+ +[a-f0-9]+:   c5 .*   vpand  0x70\(%eax\),%xmm2,%xmm3
+ +[a-f0-9]+:   c5 .*   vpandn 0x70\(%eax\),%xmm2,%xmm3
+ +[a-f0-9]+:   c5 .*   vpandn 0x70\(%eax\),%xmm2,%xmm3
+ +[a-f0-9]+:   c5 .*   vpor   0x70\(%eax\),%xmm2,%xmm3
+ +[a-f0-9]+:   c5 .*   vpor   0x70\(%eax\),%xmm2,%xmm3
+ +[a-f0-9]+:   c5 .*   vpxor  0x70\(%eax\),%xmm2,%xmm3
+ +[a-f0-9]+:   c5 .*   vpxor  0x70\(%eax\),%xmm2,%xmm3
+ +[a-f0-9]+:   62 .*   vpandd 0x80\(%eax\),%xmm2,%xmm3
+ +[a-f0-9]+:   62 .*   vpandq 0x80\(%eax\),%xmm2,%xmm3
+ +[a-f0-9]+:   62 .*   vpandnd 0x80\(%eax\),%xmm2,%xmm3
+ +[a-f0-9]+:   62 .*   vpandnq 0x80\(%eax\),%xmm2,%xmm3
+ +[a-f0-9]+:   62 .*   vpord  0x80\(%eax\),%xmm2,%xmm3
+ +[a-f0-9]+:   62 .*   vporq  0x80\(%eax\),%xmm2,%xmm3
+ +[a-f0-9]+:   62 .*   vpxord 0x80\(%eax\),%xmm2,%xmm3
+ +[a-f0-9]+:   62 .*   vpxorq 0x80\(%eax\),%xmm2,%xmm3
+ +[a-f0-9]+:   c5 .*   vpand  0x60\(%eax\),%ymm2,%ymm3
+ +[a-f0-9]+:   c5 .*   vpand  0x60\(%eax\),%ymm2,%ymm3
+ +[a-f0-9]+:   c5 .*   vpandn 0x60\(%eax\),%ymm2,%ymm3
+ +[a-f0-9]+:   c5 .*   vpandn 0x60\(%eax\),%ymm2,%ymm3
+ +[a-f0-9]+:   c5 .*   vpor   0x60\(%eax\),%ymm2,%ymm3
+ +[a-f0-9]+:   c5 .*   vpor   0x60\(%eax\),%ymm2,%ymm3
+ +[a-f0-9]+:   c5 .*   vpxor  0x60\(%eax\),%ymm2,%ymm3
+ +[a-f0-9]+:   c5 .*   vpxor  0x60\(%eax\),%ymm2,%ymm3
+ +[a-f0-9]+:   62 .*   vpandd 0x80\(%eax\),%ymm2,%ymm3
+ +[a-f0-9]+:   62 .*   vpandq 0x80\(%eax\),%ymm2,%ymm3
+ +[a-f0-9]+:   62 .*   vpandnd 0x80\(%eax\),%ymm2,%ymm3
+ +[a-f0-9]+:   62 .*   vpandnq 0x80\(%eax\),%ymm2,%ymm3
+ +[a-f0-9]+:   62 .*   vpord  0x80\(%eax\),%ymm2,%ymm3
+ +[a-f0-9]+:   62 .*   vporq  0x80\(%eax\),%ymm2,%ymm3
+ +[a-f0-9]+:   62 .*   vpxord 0x80\(%eax\),%ymm2,%ymm3
+ +[a-f0-9]+:   62 .*   vpxorq 0x80\(%eax\),%ymm2,%ymm3
  +[a-f0-9]+:   62 f1 f5 08 55 e9       vandnpd %xmm1,%xmm1,%xmm5
  +[a-f0-9]+:   62 f1 f5 08 55 e9       vandnpd %xmm1,%xmm1,%xmm5
  +[a-f0-9]+:   62 f1 7d 28 6f d1       vmovdqa32 %ymm1,%ymm2
@@ -106,4 +155,12 @@ Disassembly of section .text:
  +[a-f0-9]+:   62 f1 ff 08 6f d1       vmovdqu16 %xmm1,%xmm2
  +[a-f0-9]+:   62 f1 7e 08 6f d1       vmovdqu32 %xmm1,%xmm2
  +[a-f0-9]+:   62 f1 fe 08 6f d1       vmovdqu64 %xmm1,%xmm2
+ +[a-f0-9]+:   62 .*   vpandd %xmm2,%xmm3,%xmm4
+ +[a-f0-9]+:   62 .*   vpandq %ymm2,%ymm3,%ymm4
+ +[a-f0-9]+:   62 .*   vpandnd %ymm2,%ymm3,%ymm4
+ +[a-f0-9]+:   62 .*   vpandnq %xmm2,%xmm3,%xmm4
+ +[a-f0-9]+:   62 .*   vpord  %xmm2,%xmm3,%xmm4
+ +[a-f0-9]+:   62 .*   vporq  %ymm2,%ymm3,%ymm4
+ +[a-f0-9]+:   62 .*   vpxord %ymm2,%ymm3,%ymm4
+ +[a-f0-9]+:   62 .*   vpxorq %xmm2,%xmm3,%xmm4
 #pass