Improve -mlfence-after-load

[deliverable/binutils-gdb.git] / gas / testsuite / gas / i386 / x86-64-lfence-ret-b.d

diff --git a/gas/testsuite/gas/i386/x86-64-lfence-ret-b.d b/gas/testsuite/gas/i386/x86-64-lfence-ret-b.d
index 340488831dee1fe0ec5c8554966f4edeaef463e6..3947660fea8aed4a9f3704af8e3dc92f7e3e59e7 100644 (file)
--- a/gas/testsuite/gas/i386/x86-64-lfence-ret-b.d
+++ b/gas/testsuite/gas/i386/x86-64-lfence-ret-b.d
@@ -1,6 +1,7 @@
-#source: lfence-ret.s
+#source: x86-64-lfence-ret.s
 #as: -mlfence-before-ret=not
-#objdump: -dw
+#warning_output: x86-64-lfence-ret.e
+#objdump: -dw -Mintel64
 #name: x86-64 -mlfence-before-ret=not
 
 .*: +file format .*
@@ -9,6 +10,14 @@
 Disassembly of section .text:
 
 0+ <_start>:
+ +[a-f0-9]+:   48 f7 14 24             notq   \(%rsp\)
+ +[a-f0-9]+:   48 f7 14 24             notq   \(%rsp\)
+ +[a-f0-9]+:   0f ae e8                lfence 
+ +[a-f0-9]+:   66 c3                   data16 retq 
+ +[a-f0-9]+:   48 f7 14 24             notq   \(%rsp\)
+ +[a-f0-9]+:   48 f7 14 24             notq   \(%rsp\)
+ +[a-f0-9]+:   0f ae e8                lfence 
+ +[a-f0-9]+:   66 c2 14 00             data16 retq \$0x14
  +[a-f0-9]+:   48 f7 14 24             notq   \(%rsp\)
  +[a-f0-9]+:   48 f7 14 24             notq   \(%rsp\)
  +[a-f0-9]+:   0f ae e8                lfence 
@@ -17,4 +26,36 @@ Disassembly of section .text:
  +[a-f0-9]+:   48 f7 14 24             notq   \(%rsp\)
  +[a-f0-9]+:   0f ae e8                lfence 
  +[a-f0-9]+:   c2 1e 00                retq   \$0x1e
+ +[a-f0-9]+:   48 f7 14 24             notq   \(%rsp\)
+ +[a-f0-9]+:   48 f7 14 24             notq   \(%rsp\)
+ +[a-f0-9]+:   0f ae e8                lfence 
+ +[a-f0-9]+:   66 48 c3                data16 rex.W retq 
+ +[a-f0-9]+:   48 f7 14 24             notq   \(%rsp\)
+ +[a-f0-9]+:   48 f7 14 24             notq   \(%rsp\)
+ +[a-f0-9]+:   0f ae e8                lfence 
+ +[a-f0-9]+:   66 48 c2 28 00          data16 rex.W retq \$0x28
+ +[a-f0-9]+:   66 f7 14 24             notw   \(%rsp\)
+ +[a-f0-9]+:   66 f7 14 24             notw   \(%rsp\)
+ +[a-f0-9]+:   0f ae e8                lfence 
+ +[a-f0-9]+:   66 cb                   lretw  
+ +[a-f0-9]+:   66 f7 14 24             notw   \(%rsp\)
+ +[a-f0-9]+:   66 f7 14 24             notw   \(%rsp\)
+ +[a-f0-9]+:   0f ae e8                lfence 
+ +[a-f0-9]+:   66 ca 28 00             lretw  \$0x28
+ +[a-f0-9]+:   f7 14 24                notl   \(%rsp\)
+ +[a-f0-9]+:   f7 14 24                notl   \(%rsp\)
+ +[a-f0-9]+:   0f ae e8                lfence 
+ +[a-f0-9]+:   cb                      lret   
+ +[a-f0-9]+:   f7 14 24                notl   \(%rsp\)
+ +[a-f0-9]+:   f7 14 24                notl   \(%rsp\)
+ +[a-f0-9]+:   0f ae e8                lfence 
+ +[a-f0-9]+:   ca 28 00                lret   \$0x28
+ +[a-f0-9]+:   48 f7 14 24             notq   \(%rsp\)
+ +[a-f0-9]+:   48 f7 14 24             notq   \(%rsp\)
+ +[a-f0-9]+:   0f ae e8                lfence 
+ +[a-f0-9]+:   48 cb                   lretq  
+ +[a-f0-9]+:   48 f7 14 24             notq   \(%rsp\)
+ +[a-f0-9]+:   48 f7 14 24             notq   \(%rsp\)
+ +[a-f0-9]+:   0f ae e8                lfence 
+ +[a-f0-9]+:   48 ca 28 00             lretq  \$0x28
 #pass