Add Intel MCU support to opcodes

[deliverable/binutils-gdb.git] / gas / testsuite / gas / i386 / x86-64-xsave-intel.d

diff --git a/gas/testsuite/gas/i386/x86-64-xsave-intel.d b/gas/testsuite/gas/i386/x86-64-xsave-intel.d
index ae506d6d0300a190c74564a27622b3a15ea0400b..f516402a7afdcaaf654d8ba4d84151a3065b0318 100644 (file)
--- a/gas/testsuite/gas/i386/x86-64-xsave-intel.d
+++ b/gas/testsuite/gas/i386/x86-64-xsave-intel.d
@@ -29,6 +29,15 @@ Disassembly of section .text:
 [      ]*[a-f0-9]+:    49 0f ae 2c 00          xrstor64 \[r8\+rax\*1\]
 [      ]*[a-f0-9]+:    4a 0f ae 2c 00          xrstor64 \[rax\+r8\*1\]
 [      ]*[a-f0-9]+:    4b 0f ae 2c 38          xrstor64 \[r8\+r15\*1\]
+[      ]*[a-f0-9]+:    0f ae 30                xsaveopt \[rax\]
+[      ]*[a-f0-9]+:    41 0f ae 30             xsaveopt \[r8\]
+[      ]*[a-f0-9]+:    41 0f ae 34 00          xsaveopt \[r8\+rax\*1\]
+[      ]*[a-f0-9]+:    42 0f ae 34 00          xsaveopt \[rax\+r8\*1\]
+[      ]*[a-f0-9]+:    43 0f ae 34 38          xsaveopt \[r8\+r15\*1\]
+[      ]*[a-f0-9]+:    48 0f ae 30             xsaveopt64 \[rax\]
+[      ]*[a-f0-9]+:    49 0f ae 30             xsaveopt64 \[r8\]
+[      ]*[a-f0-9]+:    49 0f ae 34 00          xsaveopt64 \[r8\+rax\*1\]
+[      ]*[a-f0-9]+:    4a 0f ae 34 00          xsaveopt64 \[rax\+r8\*1\]
 [      ]*[a-f0-9]+:    0f ae 20                xsave  \[rax\]
 [      ]*[a-f0-9]+:    41 0f ae 20             xsave  \[r8\]
 [      ]*[a-f0-9]+:    41 0f ae 24 00          xsave  \[r8\+rax\*1\]
@@ -48,4 +57,13 @@ Disassembly of section .text:
 [      ]*[a-f0-9]+:    49 0f ae 2c 00          xrstor64 \[r8\+rax\*1\]
 [      ]*[a-f0-9]+:    4a 0f ae 2c 00          xrstor64 \[rax\+r8\*1\]
 [      ]*[a-f0-9]+:    4b 0f ae 2c 38          xrstor64 \[r8\+r15\*1\]
+[      ]*[a-f0-9]+:    0f ae 30                xsaveopt \[rax\]
+[      ]*[a-f0-9]+:    41 0f ae 30             xsaveopt \[r8\]
+[      ]*[a-f0-9]+:    41 0f ae 34 00          xsaveopt \[r8\+rax\*1\]
+[      ]*[a-f0-9]+:    42 0f ae 34 00          xsaveopt \[rax\+r8\*1\]
+[      ]*[a-f0-9]+:    43 0f ae 34 38          xsaveopt \[r8\+r15\*1\]
+[      ]*[a-f0-9]+:    48 0f ae 30             xsaveopt64 \[rax\]
+[      ]*[a-f0-9]+:    49 0f ae 30             xsaveopt64 \[r8\]
+[      ]*[a-f0-9]+:    49 0f ae 34 00          xsaveopt64 \[r8\+rax\*1\]
+[      ]*[a-f0-9]+:    4a 0f ae 34 00          xsaveopt64 \[rax\+r8\*1\]
 #pass