Stop objdump from displaying control codes embedded in symbol names.

[deliverable/binutils-gdb.git] / gas / testsuite / gas / mips / r6-n32.d

diff --git a/gas/testsuite/gas/mips/r6-n32.d b/gas/testsuite/gas/mips/r6-n32.d
index c9efa1d7c392ee9ab94d1ae9f649ddea0b19d675..70b84e10a3fe4a0827278d14fba85f9716ad1f92 100644 (file)
--- a/gas/testsuite/gas/mips/r6-n32.d
+++ b/gas/testsuite/gas/mips/r6-n32.d
@@ -57,10 +57,10 @@ Disassembly of section .text:
 0+00b8 <[^>]*> 4682081b        cmp.sne.s       \$f0,\$f1,\$f2
 0+00bc <[^>]*> 46a2081b        cmp.sne.d       \$f0,\$f1,\$f2
 0+00c0 <[^>]*> 45200000        bc1eqz  \$f0,000000c4 <[^>]*>
-[      ]*c0: R_MIPS_PC16       .L1.1-0x4
+[      ]*c0: R_MIPS_PC16       .L1.*1-0x4
 0+00c4 <[^>]*> 00000000        nop
 0+00c8 <[^>]*> 453f0000        bc1eqz  \$f31,000000cc <[^>]*>
-[      ]*c8: R_MIPS_PC16       .L1.1-0x4
+[      ]*c8: R_MIPS_PC16       .L1.*1-0x4
 0+00cc <[^>]*> 00000000        nop
 0+00d0 <[^>]*> 453f0000        bc1eqz  \$f31,000000d4 <[^>]*>
 [      ]*d0: R_MIPS_PC16       new-0x4
@@ -69,10 +69,10 @@ Disassembly of section .text:
 [      ]*d8: R_MIPS_PC16       external_label-0x4
 0+00dc <[^>]*> 00000000        nop
 0+00e0 <[^>]*> 45a00000        bc1nez  \$f0,000000e4 <[^>]*>
-[      ]*e0: R_MIPS_PC16       .L1.1-0x4
+[      ]*e0: R_MIPS_PC16       .L1.*1-0x4
 0+00e4 <[^>]*> 00000000        nop
 0+00e8 <[^>]*> 45bf0000        bc1nez  \$f31,000000ec <[^>]*>
-[      ]*e8: R_MIPS_PC16       .L1.1-0x4
+[      ]*e8: R_MIPS_PC16       .L1.*1-0x4
 0+00ec <[^>]*> 00000000        nop
 0+00f0 <[^>]*> 45bf0000        bc1nez  \$f31,000000f4 <[^>]*>
 [      ]*f0: R_MIPS_PC16       new-0x4
@@ -81,10 +81,10 @@ Disassembly of section .text:
 [      ]*f8: R_MIPS_PC16       external_label-0x4
 0+00fc <[^>]*> 00000000        nop
 0+0100 <[^>]*> 49200000        bc2eqz  \$0,00000104 <[^>]*>
-[      ]*100: R_MIPS_PC16      .L1.1-0x4
+[      ]*100: R_MIPS_PC16      .L1.*1-0x4
 0+0104 <[^>]*> 00000000        nop
 0+0108 <[^>]*> 493f0000        bc2eqz  \$31,0000010c <[^>]*>
-[      ]*108: R_MIPS_PC16      .L1.1-0x4
+[      ]*108: R_MIPS_PC16      .L1.*1-0x4
 0+010c <[^>]*> 00000000        nop
 0+0110 <[^>]*> 493f0000        bc2eqz  \$31,00000114 <[^>]*>
 [      ]*110: R_MIPS_PC16      new-0x4
@@ -93,10 +93,10 @@ Disassembly of section .text:
 [      ]*118: R_MIPS_PC16      external_label-0x4
 0+011c <[^>]*> 00000000        nop
 0+0120 <[^>]*> 49a00000        bc2nez  \$0,00000124 <[^>]*>
-[      ]*120: R_MIPS_PC16      .L1.1-0x4
+[      ]*120: R_MIPS_PC16      .L1.*1-0x4
 0+0124 <[^>]*> 00000000        nop
 0+0128 <[^>]*> 49bf0000        bc2nez  \$31,0000012c <[^>]*>
-[      ]*128: R_MIPS_PC16      .L1.1-0x4
+[      ]*128: R_MIPS_PC16      .L1.*1-0x4
 0+012c <[^>]*> 00000000        nop
 0+0130 <[^>]*> 49bf0000        bc2nez  \$31,00000134 <[^>]*>
 [      ]*130: R_MIPS_PC16      new-0x4
@@ -170,31 +170,31 @@ Disassembly of section .text:
 [      ]*228: R_MIPS_PC16      ext-0x4
 0+022c <[^>]*> 00000000        nop
 0+0230 <[^>]*> 20820000        bovc    a0,v0,00000234 <[^>]*>
-[      ]*230: R_MIPS_PC16      L0.-0x20000
+[      ]*230: R_MIPS_PC16      L0.*-0x20000
 0+0234 <[^>]*> 00000000        nop
 0+0238 <[^>]*> 20820000        bovc    a0,v0,0000023c <[^>]*>
-[      ]*238: R_MIPS_PC16      L0.+0x1fffc
+[      ]*238: R_MIPS_PC16      L0.*\+0x1fffc
 0+023c <[^>]*> 00000000        nop
 0+0240 <[^>]*> 20820000        bovc    a0,v0,00000244 <[^>]*>
-[      ]*240: R_MIPS_PC16      .L1.2-0x4
+[      ]*240: R_MIPS_PC16      .L1.*2-0x4
 0+0244 <[^>]*> 00000000        nop
 0+0248 <[^>]*> 20420000        bovc    v0,v0,0000024c <[^>]*>
 [      ]*248: R_MIPS_PC16      ext-0x4
 0+024c <[^>]*> 00000000        nop
 0+0250 <[^>]*> 20420000        bovc    v0,v0,00000254 <[^>]*>
-[      ]*250: R_MIPS_PC16      L0.-0x20000
+[      ]*250: R_MIPS_PC16      L0.*-0x20000
 0+0254 <[^>]*> 00000000        nop
 0+0258 <[^>]*> 20020000        beqzalc v0,0000025c <[^>]*>
 [      ]*258: R_MIPS_PC16      ext-0x4
 0+025c <[^>]*> 00000000        nop
 0+0260 <[^>]*> 20020000        beqzalc v0,00000264 <[^>]*>
-[      ]*260: R_MIPS_PC16      L0.-0x20000
+[      ]*260: R_MIPS_PC16      L0.*-0x20000
 0+0264 <[^>]*> 00000000        nop
 0+0268 <[^>]*> 20020000        beqzalc v0,0000026c <[^>]*>
-[      ]*268: R_MIPS_PC16      L0.+0x1fffc
+[      ]*268: R_MIPS_PC16      L0.*\+0x1fffc
 0+026c <[^>]*> 00000000        nop
 0+0270 <[^>]*> 20020000        beqzalc v0,00000274 <[^>]*>
-[      ]*270: R_MIPS_PC16      .L1.2-0x4
+[      ]*270: R_MIPS_PC16      .L1.*2-0x4
 0+0274 <[^>]*> 00000000        nop
 0+0278 <[^>]*> 20430000        beqc    v0,v1,0000027c <[^>]*>
 [      ]*278: R_MIPS_PC16      ext-0x4
@@ -203,13 +203,13 @@ Disassembly of section .text:
 [      ]*280: R_MIPS_PC16      ext-0x4
 0+0284 <[^>]*> 00000000        nop
 0+0288 <[^>]*> 20430000        beqc    v0,v1,0000028c <[^>]*>
-[      ]*288: R_MIPS_PC16      L0.-0x20000
+[      ]*288: R_MIPS_PC16      L0.*-0x20000
 0+028c <[^>]*> 00000000        nop
 0+0290 <[^>]*> 20430000        beqc    v0,v1,00000294 <[^>]*>
-[      ]*290: R_MIPS_PC16      L0.+0x1fffc
+[      ]*290: R_MIPS_PC16      L0.*\+0x1fffc
 0+0294 <[^>]*> 00000000        nop
 0+0298 <[^>]*> 20430000        beqc    v0,v1,0000029c <[^>]*>
-[      ]*298: R_MIPS_PC16      .L1.2-0x4
+[      ]*298: R_MIPS_PC16      .L1.*2-0x4
 0+029c <[^>]*> 00000000        nop
 0+02a0 <[^>]*> 60000000        bnvc    zero,zero,000002a4 <[^>]*>
 [      ]*2a0: R_MIPS_PC16      ext-0x4
@@ -227,31 +227,31 @@ Disassembly of section .text:
 [      ]*2c0: R_MIPS_PC16      ext-0x4
 0+02c4 <[^>]*> 00000000        nop
 0+02c8 <[^>]*> 60820000        bnvc    a0,v0,000002cc <[^>]*>
-[      ]*2c8: R_MIPS_PC16      L0.-0x20000
+[      ]*2c8: R_MIPS_PC16      L0.*-0x20000
 0+02cc <[^>]*> 00000000        nop
 0+02d0 <[^>]*> 60820000        bnvc    a0,v0,000002d4 <[^>]*>
-[      ]*2d0: R_MIPS_PC16      L0.+0x1fffc
+[      ]*2d0: R_MIPS_PC16      L0.*\+0x1fffc
 0+02d4 <[^>]*> 00000000        nop
 0+02d8 <[^>]*> 60820000        bnvc    a0,v0,000002dc <[^>]*>
-[      ]*2d8: R_MIPS_PC16      .L1.2-0x4
+[      ]*2d8: R_MIPS_PC16      .L1.*2-0x4
 0+02dc <[^>]*> 00000000        nop
 0+02e0 <[^>]*> 60420000        bnvc    v0,v0,000002e4 <[^>]*>
 [      ]*2e0: R_MIPS_PC16      ext-0x4
 0+02e4 <[^>]*> 00000000        nop
 0+02e8 <[^>]*> 60420000        bnvc    v0,v0,000002ec <[^>]*>
-[      ]*2e8: R_MIPS_PC16      L0.-0x20000
+[      ]*2e8: R_MIPS_PC16      L0.*-0x20000
 0+02ec <[^>]*> 00000000        nop
 0+02f0 <[^>]*> 60020000        bnezalc v0,000002f4 <[^>]*>
 [      ]*2f0: R_MIPS_PC16      ext-0x4
 0+02f4 <[^>]*> 00000000        nop
 0+02f8 <[^>]*> 60020000        bnezalc v0,000002fc <[^>]*>
-[      ]*2f8: R_MIPS_PC16      L0.-0x20000
+[      ]*2f8: R_MIPS_PC16      L0.*-0x20000
 0+02fc <[^>]*> 00000000        nop
 0+0300 <[^>]*> 60020000        bnezalc v0,00000304 <[^>]*>
-[      ]*300: R_MIPS_PC16      L0.+0x1fffc
+[      ]*300: R_MIPS_PC16      L0.*\+0x1fffc
 0+0304 <[^>]*> 00000000        nop
 0+0308 <[^>]*> 60020000        bnezalc v0,0000030c <[^>]*>
-[      ]*308: R_MIPS_PC16      .L1.2-0x4
+[      ]*308: R_MIPS_PC16      .L1.*2-0x4
 0+030c <[^>]*> 00000000        nop
 0+0310 <[^>]*> 60430000        bnec    v0,v1,00000314 <[^>]*>
 [      ]*310: R_MIPS_PC16      ext-0x4
@@ -260,197 +260,197 @@ Disassembly of section .text:
 [      ]*318: R_MIPS_PC16      ext-0x4
 0+031c <[^>]*> 00000000        nop
 0+0320 <[^>]*> 60430000        bnec    v0,v1,00000324 <[^>]*>
-[      ]*320: R_MIPS_PC16      L0.-0x20000
+[      ]*320: R_MIPS_PC16      L0.*-0x20000
 0+0324 <[^>]*> 00000000        nop
 0+0328 <[^>]*> 60430000        bnec    v0,v1,0000032c <[^>]*>
-[      ]*328: R_MIPS_PC16      L0.+0x1fffc
+[      ]*328: R_MIPS_PC16      L0.*\+0x1fffc
 0+032c <[^>]*> 00000000        nop
 0+0330 <[^>]*> 60430000        bnec    v0,v1,00000334 <[^>]*>
-[      ]*330: R_MIPS_PC16      .L1.2-0x4
+[      ]*330: R_MIPS_PC16      .L1.*2-0x4
 0+0334 <[^>]*> 00000000        nop
 0+0338 <[^>]*> 58020000        blezc   v0,0000033c <[^>]*>
 [      ]*338: R_MIPS_PC16      ext-0x4
 0+033c <[^>]*> 00000000        nop
 0+0340 <[^>]*> 58020000        blezc   v0,00000344 <[^>]*>
-[      ]*340: R_MIPS_PC16      L0.-0x20000
+[      ]*340: R_MIPS_PC16      L0.*-0x20000
 0+0344 <[^>]*> 00000000        nop
 0+0348 <[^>]*> 58020000        blezc   v0,0000034c <[^>]*>
-[      ]*348: R_MIPS_PC16      L0.+0x1fffc
+[      ]*348: R_MIPS_PC16      L0.*\+0x1fffc
 0+034c <[^>]*> 00000000        nop
 0+0350 <[^>]*> 58020000        blezc   v0,00000354 <[^>]*>
-[      ]*350: R_MIPS_PC16      .L1.2-0x4
+[      ]*350: R_MIPS_PC16      .L1.*2-0x4
 0+0354 <[^>]*> 00000000        nop
 0+0358 <[^>]*> 58420000        bgezc   v0,0000035c <[^>]*>
 [      ]*358: R_MIPS_PC16      ext-0x4
 0+035c <[^>]*> 00000000        nop
 0+0360 <[^>]*> 58420000        bgezc   v0,00000364 <[^>]*>
-[      ]*360: R_MIPS_PC16      L0.-0x20000
+[      ]*360: R_MIPS_PC16      L0.*-0x20000
 0+0364 <[^>]*> 00000000        nop
 0+0368 <[^>]*> 58420000        bgezc   v0,0000036c <[^>]*>
-[      ]*368: R_MIPS_PC16      L0.+0x1fffc
+[      ]*368: R_MIPS_PC16      L0.*\+0x1fffc
 0+036c <[^>]*> 00000000        nop
 0+0370 <[^>]*> 58420000        bgezc   v0,00000374 <[^>]*>
-[      ]*370: R_MIPS_PC16      .L1.2-0x4
+[      ]*370: R_MIPS_PC16      .L1.*2-0x4
 0+0374 <[^>]*> 00000000        nop
 0+0378 <[^>]*> 58430000        bgec    v0,v1,0000037c <[^>]*>
 [      ]*378: R_MIPS_PC16      ext-0x4
 0+037c <[^>]*> 00000000        nop
 0+0380 <[^>]*> 58430000        bgec    v0,v1,00000384 <[^>]*>
-[      ]*380: R_MIPS_PC16      L0.-0x20000
+[      ]*380: R_MIPS_PC16      L0.*-0x20000
 0+0384 <[^>]*> 00000000        nop
 0+0388 <[^>]*> 58430000        bgec    v0,v1,0000038c <[^>]*>
-[      ]*388: R_MIPS_PC16      L0.+0x1fffc
+[      ]*388: R_MIPS_PC16      L0.*\+0x1fffc
 0+038c <[^>]*> 00000000        nop
 0+0390 <[^>]*> 58430000        bgec    v0,v1,00000394 <[^>]*>
-[      ]*390: R_MIPS_PC16      .L1.2-0x4
+[      ]*390: R_MIPS_PC16      .L1.*2-0x4
 0+0394 <[^>]*> 00000000        nop
 0+0398 <[^>]*> 58620000        bgec    v1,v0,0000039c <[^>]*>
-[      ]*398: R_MIPS_PC16      .L1.2-0x4
+[      ]*398: R_MIPS_PC16      .L1.*2-0x4
 0+039c <[^>]*> 00000000        nop
 0+03a0 <[^>]*> 5c020000        bgtzc   v0,000003a4 <[^>]*>
 [      ]*3a0: R_MIPS_PC16      ext-0x4
 0+03a4 <[^>]*> 00000000        nop
 0+03a8 <[^>]*> 5c020000        bgtzc   v0,000003ac <[^>]*>
-[      ]*3a8: R_MIPS_PC16      L0.-0x20000
+[      ]*3a8: R_MIPS_PC16      L0.*-0x20000
 0+03ac <[^>]*> 00000000        nop
 0+03b0 <[^>]*> 5c020000        bgtzc   v0,000003b4 <[^>]*>
-[      ]*3b0: R_MIPS_PC16      L0.+0x1fffc
+[      ]*3b0: R_MIPS_PC16      L0.*\+0x1fffc
 0+03b4 <[^>]*> 00000000        nop
 0+03b8 <[^>]*> 5c020000        bgtzc   v0,000003bc <[^>]*>
-[      ]*3b8: R_MIPS_PC16      .L1.2-0x4
+[      ]*3b8: R_MIPS_PC16      .L1.*2-0x4
 0+03bc <[^>]*> 00000000        nop
 0+03c0 <[^>]*> 5c420000        bltzc   v0,000003c4 <[^>]*>
 [      ]*3c0: R_MIPS_PC16      ext-0x4
 0+03c4 <[^>]*> 00000000        nop
 0+03c8 <[^>]*> 5c420000        bltzc   v0,000003cc <[^>]*>
-[      ]*3c8: R_MIPS_PC16      L0.-0x20000
+[      ]*3c8: R_MIPS_PC16      L0.*-0x20000
 0+03cc <[^>]*> 00000000        nop
 0+03d0 <[^>]*> 5c420000        bltzc   v0,000003d4 <[^>]*>
-[      ]*3d0: R_MIPS_PC16      L0.+0x1fffc
+[      ]*3d0: R_MIPS_PC16      L0.*\+0x1fffc
 0+03d4 <[^>]*> 00000000        nop
 0+03d8 <[^>]*> 5c420000        bltzc   v0,000003dc <[^>]*>
-[      ]*3d8: R_MIPS_PC16      .L1.2-0x4
+[      ]*3d8: R_MIPS_PC16      .L1.*2-0x4
 0+03dc <[^>]*> 00000000        nop
 0+03e0 <[^>]*> 5c430000        bltc    v0,v1,000003e4 <[^>]*>
 [      ]*3e0: R_MIPS_PC16      ext-0x4
 0+03e4 <[^>]*> 00000000        nop
 0+03e8 <[^>]*> 5c430000        bltc    v0,v1,000003ec <[^>]*>
-[      ]*3e8: R_MIPS_PC16      L0.-0x20000
+[      ]*3e8: R_MIPS_PC16      L0.*-0x20000
 0+03ec <[^>]*> 00000000        nop
 0+03f0 <[^>]*> 5c430000        bltc    v0,v1,000003f4 <[^>]*>
-[      ]*3f0: R_MIPS_PC16      L0.+0x1fffc
+[      ]*3f0: R_MIPS_PC16      L0.*\+0x1fffc
 0+03f4 <[^>]*> 00000000        nop
 0+03f8 <[^>]*> 5c430000        bltc    v0,v1,000003fc <[^>]*>
-[      ]*3f8: R_MIPS_PC16      .L1.2-0x4
+[      ]*3f8: R_MIPS_PC16      .L1.*2-0x4
 0+03fc <[^>]*> 00000000        nop
 0+0400 <[^>]*> 5c620000        bltc    v1,v0,00000404 <[^>]*>
-[      ]*400: R_MIPS_PC16      .L1.2-0x4
+[      ]*400: R_MIPS_PC16      .L1.*2-0x4
 0+0404 <[^>]*> 00000000        nop
 0+0408 <[^>]*> 18020000        blezalc v0,0000040c <[^>]*>
 [      ]*408: R_MIPS_PC16      ext-0x4
 0+040c <[^>]*> 00000000        nop
 0+0410 <[^>]*> 18020000        blezalc v0,00000414 <[^>]*>
-[      ]*410: R_MIPS_PC16      L0.-0x20000
+[      ]*410: R_MIPS_PC16      L0.*-0x20000
 0+0414 <[^>]*> 00000000        nop
 0+0418 <[^>]*> 18020000        blezalc v0,0000041c <[^>]*>
-[      ]*418: R_MIPS_PC16      L0.+0x1fffc
+[      ]*418: R_MIPS_PC16      L0.*\+0x1fffc
 0+041c <[^>]*> 00000000        nop
 0+0420 <[^>]*> 18020000        blezalc v0,00000424 <[^>]*>
-[      ]*420: R_MIPS_PC16      .L1.2-0x4
+[      ]*420: R_MIPS_PC16      .L1.*2-0x4
 0+0424 <[^>]*> 00000000        nop
 0+0428 <[^>]*> 18420000        bgezalc v0,0000042c <[^>]*>
 [      ]*428: R_MIPS_PC16      ext-0x4
 0+042c <[^>]*> 00000000        nop
 0+0430 <[^>]*> 18420000        bgezalc v0,00000434 <[^>]*>
-[      ]*430: R_MIPS_PC16      L0.-0x20000
+[      ]*430: R_MIPS_PC16      L0.*-0x20000
 0+0434 <[^>]*> 00000000        nop
 0+0438 <[^>]*> 18420000        bgezalc v0,0000043c <[^>]*>
-[      ]*438: R_MIPS_PC16      L0.+0x1fffc
+[      ]*438: R_MIPS_PC16      L0.*\+0x1fffc
 0+043c <[^>]*> 00000000        nop
 0+0440 <[^>]*> 18420000        bgezalc v0,00000444 <[^>]*>
-[      ]*440: R_MIPS_PC16      .L1.2-0x4
+[      ]*440: R_MIPS_PC16      .L1.*2-0x4
 0+0444 <[^>]*> 00000000        nop
 0+0448 <[^>]*> 18430000        bgeuc   v0,v1,0000044c <[^>]*>
 [      ]*448: R_MIPS_PC16      ext-0x4
 0+044c <[^>]*> 00000000        nop
 0+0450 <[^>]*> 18430000        bgeuc   v0,v1,00000454 <[^>]*>
-[      ]*450: R_MIPS_PC16      L0.-0x20000
+[      ]*450: R_MIPS_PC16      L0.*-0x20000
 0+0454 <[^>]*> 00000000        nop
 0+0458 <[^>]*> 18430000        bgeuc   v0,v1,0000045c <[^>]*>
-[      ]*458: R_MIPS_PC16      L0.+0x1fffc
+[      ]*458: R_MIPS_PC16      L0.*\+0x1fffc
 0+045c <[^>]*> 00000000        nop
 0+0460 <[^>]*> 18430000        bgeuc   v0,v1,00000464 <[^>]*>
-[      ]*460: R_MIPS_PC16      .L1.2-0x4
+[      ]*460: R_MIPS_PC16      .L1.*2-0x4
 0+0464 <[^>]*> 00000000        nop
 0+0468 <[^>]*> 18620000        bgeuc   v1,v0,0000046c <[^>]*>
-[      ]*468: R_MIPS_PC16      .L1.2-0x4
+[      ]*468: R_MIPS_PC16      .L1.*2-0x4
 0+046c <[^>]*> 00000000        nop
 0+0470 <[^>]*> 1c020000        bgtzalc v0,00000474 <[^>]*>
 [      ]*470: R_MIPS_PC16      ext-0x4
 0+0474 <[^>]*> 00000000        nop
 0+0478 <[^>]*> 1c020000        bgtzalc v0,0000047c <[^>]*>
-[      ]*478: R_MIPS_PC16      L0.-0x20000
+[      ]*478: R_MIPS_PC16      L0.*-0x20000
 0+047c <[^>]*> 00000000        nop
 0+0480 <[^>]*> 1c020000        bgtzalc v0,00000484 <[^>]*>
-[      ]*480: R_MIPS_PC16      L0.+0x1fffc
+[      ]*480: R_MIPS_PC16      L0.*\+0x1fffc
 0+0484 <[^>]*> 00000000        nop
 0+0488 <[^>]*> 1c020000        bgtzalc v0,0000048c <[^>]*>
-[      ]*488: R_MIPS_PC16      .L1.2-0x4
+[      ]*488: R_MIPS_PC16      .L1.*2-0x4
 0+048c <[^>]*> 00000000        nop
 0+0490 <[^>]*> 1c420000        bltzalc v0,00000494 <[^>]*>
 [      ]*490: R_MIPS_PC16      ext-0x4
 0+0494 <[^>]*> 00000000        nop
 0+0498 <[^>]*> 1c420000        bltzalc v0,0000049c <[^>]*>
-[      ]*498: R_MIPS_PC16      L0.-0x20000
+[      ]*498: R_MIPS_PC16      L0.*-0x20000
 0+049c <[^>]*> 00000000        nop
 0+04a0 <[^>]*> 1c420000        bltzalc v0,000004a4 <[^>]*>
-[      ]*4a0: R_MIPS_PC16      L0.+0x1fffc
+[      ]*4a0: R_MIPS_PC16      L0.*\+0x1fffc
 0+04a4 <[^>]*> 00000000        nop
 0+04a8 <[^>]*> 1c420000        bltzalc v0,000004ac <[^>]*>
-[      ]*4a8: R_MIPS_PC16      .L1.2-0x4
+[      ]*4a8: R_MIPS_PC16      .L1.*2-0x4
 0+04ac <[^>]*> 00000000        nop
 0+04b0 <[^>]*> 1c430000        bltuc   v0,v1,000004b4 <[^>]*>
 [      ]*4b0: R_MIPS_PC16      ext-0x4
 0+04b4 <[^>]*> 00000000        nop
 0+04b8 <[^>]*> 1c430000        bltuc   v0,v1,000004bc <[^>]*>
-[      ]*4b8: R_MIPS_PC16      L0.-0x20000
+[      ]*4b8: R_MIPS_PC16      L0.*-0x20000
 0+04bc <[^>]*> 00000000        nop
 0+04c0 <[^>]*> 1c430000        bltuc   v0,v1,000004c4 <[^>]*>
-[      ]*4c0: R_MIPS_PC16      L0.+0x1fffc
+[      ]*4c0: R_MIPS_PC16      L0.*\+0x1fffc
 0+04c4 <[^>]*> 00000000        nop
 0+04c8 <[^>]*> 1c430000        bltuc   v0,v1,000004cc <[^>]*>
-[      ]*4c8: R_MIPS_PC16      .L1.2-0x4
+[      ]*4c8: R_MIPS_PC16      .L1.*2-0x4
 0+04cc <[^>]*> 00000000        nop
 0+04d0 <[^>]*> 1c620000        bltuc   v1,v0,000004d4 <[^>]*>
-[      ]*4d0: R_MIPS_PC16      .L1.2-0x4
+[      ]*4d0: R_MIPS_PC16      .L1.*2-0x4
 0+04d4 <[^>]*> 00000000        nop
 0+04d8 <[^>]*> c8000000        bc      000004dc <[^>]*>
 [      ]*4d8: R_MIPS_PC26_S2   ext-0x4
 0+04dc <[^>]*> c8000000        bc      000004e0 <[^>]*>
-[      ]*4dc: R_MIPS_PC26_S2   L0.-0x8000000
+[      ]*4dc: R_MIPS_PC26_S2   L0.*-0x8000000
 0+04e0 <[^>]*> c8000000        bc      000004e4 <[^>]*>
-[      ]*4e0: R_MIPS_PC26_S2   L0.+0x7fffffc
+[      ]*4e0: R_MIPS_PC26_S2   L0.*\+0x7fffffc
 0+04e4 <[^>]*> c8000000        bc      000004e8 <[^>]*>
-[      ]*4e4: R_MIPS_PC26_S2   .L1.2-0x4
+[      ]*4e4: R_MIPS_PC26_S2   .L1.*2-0x4
 0+04e8 <[^>]*> e8000000        balc    000004ec <[^>]*>
 [      ]*4e8: R_MIPS_PC26_S2   ext-0x4
 0+04ec <[^>]*> e8000000        balc    000004f0 <[^>]*>
-[      ]*4ec: R_MIPS_PC26_S2   L0.-0x8000000
+[      ]*4ec: R_MIPS_PC26_S2   L0.*-0x8000000
 0+04f0 <[^>]*> e8000000        balc    000004f4 <[^>]*>
-[      ]*4f0: R_MIPS_PC26_S2   L0.+0x7fffffc
+[      ]*4f0: R_MIPS_PC26_S2   L0.*\+0x7fffffc
 0+04f4 <[^>]*> e8000000        balc    000004f8 <[^>]*>
-[      ]*4f4: R_MIPS_PC26_S2   .L1.2-0x4
+[      ]*4f4: R_MIPS_PC26_S2   .L1.*2-0x4
 0+04f8 <[^>]*> d8400000        beqzc   v0,000004fc <[^>]*>
 [      ]*4f8: R_MIPS_PC21_S2   ext-0x4
 0+04fc <[^>]*> 00000000        nop
 0+0500 <[^>]*> d8400000        beqzc   v0,00000504 <[^>]*>
-[      ]*500: R_MIPS_PC21_S2   L0.-0x400000
+[      ]*500: R_MIPS_PC21_S2   L0.*-0x400000
 0+0504 <[^>]*> 00000000        nop
 0+0508 <[^>]*> d8400000        beqzc   v0,0000050c <[^>]*>
-[      ]*508: R_MIPS_PC21_S2   L0.+0x3ffffc
+[      ]*508: R_MIPS_PC21_S2   L0.*\+0x3ffffc
 0+050c <[^>]*> 00000000        nop
 0+0510 <[^>]*> d8400000        beqzc   v0,00000514 <[^>]*>
-[      ]*510: R_MIPS_PC21_S2   .L1.2-0x4
+[      ]*510: R_MIPS_PC21_S2   .L1.*2-0x4
 0+0514 <[^>]*> 00000000        nop
 0+0518 <[^>]*> d8038000        jic     v1,-32768
 0+051c <[^>]*> d8037fff        jic     v1,32767
@@ -459,33 +459,33 @@ Disassembly of section .text:
 [      ]*524: R_MIPS_PC21_S2   ext-0x4
 0+0528 <[^>]*> 00000000        nop
 0+052c <[^>]*> f8400000        bnezc   v0,00000530 <[^>]*>
-[      ]*52c: R_MIPS_PC21_S2   L0.-0x400000
+[      ]*52c: R_MIPS_PC21_S2   L0.*-0x400000
 0+0530 <[^>]*> 00000000        nop
 0+0534 <[^>]*> f8400000        bnezc   v0,00000538 <[^>]*>
-[      ]*534: R_MIPS_PC21_S2   L0.+0x3ffffc
+[      ]*534: R_MIPS_PC21_S2   L0.*\+0x3ffffc
 0+0538 <[^>]*> 00000000        nop
 0+053c <[^>]*> f8400000        bnezc   v0,00000540 <[^>]*>
-[      ]*53c: R_MIPS_PC21_S2   .L1.2-0x4
+[      ]*53c: R_MIPS_PC21_S2   .L1.*2-0x4
 0+0540 <[^>]*> 00000000        nop
 0+0544 <[^>]*> f8038000        jialc   v1,-32768
 0+0548 <[^>]*> f8037fff        jialc   v1,32767
 0+054c <[^>]*> 3c43ffff        aui     v1,v0,0xffff
 0+0550 <[^>]*> ec600000        lapc    v1,00000550 <[^>]*>
-[      ]*550: R_MIPS_PC19_S2   .L1.2
+[      ]*550: R_MIPS_PC19_S2   .L1.*2
 0+0554 <[^>]*> ec800000        lapc    a0,00000554 <[^>]*>
-[      ]*554: R_MIPS_PC19_S2   L0.-0x100000
+[      ]*554: R_MIPS_PC19_S2   L0.*-0x100000
 0+0558 <[^>]*> ec800000        lapc    a0,00000558 <[^>]*>
-[      ]*558: R_MIPS_PC19_S2   L0.+0xffffc
+[      ]*558: R_MIPS_PC19_S2   L0.*\+0xffffc
 0+055c <[^>]*> ec840000        lapc    a0,fff0055c <[^>]*>
 0+0560 <[^>]*> ec83ffff        lapc    a0,0010055c <[^>]*>
 0+0564 <[^>]*> ec7effff        auipc   v1,0xffff
 0+0568 <[^>]*> ec7fffff        aluipc  v1,0xffff
 0+056c <[^>]*> ec880000        lwpc    a0,0000056c <[^>]*>
-[      ]*56c: R_MIPS_PC19_S2   .L1.2
+[      ]*56c: R_MIPS_PC19_S2   .L1.*2
 0+0570 <[^>]*> ec880000        lwpc    a0,00000570 <[^>]*>
-[      ]*570: R_MIPS_PC19_S2   L0.-0x100000
+[      ]*570: R_MIPS_PC19_S2   L0.*-0x100000
 0+0574 <[^>]*> ec880000        lwpc    a0,00000574 <[^>]*>
-[      ]*574: R_MIPS_PC19_S2   L0.+0xffffc
+[      ]*574: R_MIPS_PC19_S2   L0.*\+0xffffc
 0+0578 <[^>]*> ec8c0000        lwpc    a0,fff00578 <[^>]*>
 0+057c <[^>]*> ec8bffff        lwpc    a0,00100578 <[^>]*>
 0+0580 <[^>]*> 00000000        nop