Change the layout of the PowerPC E500 raw register cache to allow

[deliverable/binutils-gdb.git] / gdb / Makefile.in

diff --git a/gdb/Makefile.in b/gdb/Makefile.in
index 27ca01af5af0d0db0f56ec2e9299b42fdb24df33..32b955ad3a86dd7056e89f404204dc8e05349621 100644 (file)
--- a/gdb/Makefile.in
+++ b/gdb/Makefile.in
@@ -2402,7 +2402,7 @@ rs6000-tdep.o: rs6000-tdep.c $(defs_h) $(frame_h) $(inferior_h) $(symtab_h) \
        $(coff_xcoff_h) $(libxcoff_h) $(elf_bfd_h) $(solib_svr4_h) \
        $(ppc_tdep_h) $(gdb_assert_h) $(dis_asm_h) $(trad_frame_h) \
        $(frame_unwind_h) $(frame_base_h) $(infcall_h) $(sim_regno_h) \
-       $(gdb_sim_ppc_h)
+       $(gdb_sim_ppc_h) $(reggroups_h)
 s390-nat.o: s390-nat.c $(defs_h) $(tm_h) $(regcache_h) $(inferior_h) \
        $(s390_tdep_h)
 s390-tdep.o: s390-tdep.c $(defs_h) $(arch_utils_h) $(frame_h) $(inferior_h) \