Improve MSP430 section placement.

[deliverable/binutils-gdb.git] / gdb / aarch64-linux-nat.c

diff --git a/gdb/aarch64-linux-nat.c b/gdb/aarch64-linux-nat.c
index d7ac19eb5a366d35d35811c1491ff962d61b256d..3f5b30eaeb2b01021841d8d4ddc541c5c2b574b0 100644 (file)
--- a/gdb/aarch64-linux-nat.c
+++ b/gdb/aarch64-linux-nat.c
@@ -1,6 +1,6 @@
 /* Native-dependent code for GNU/Linux AArch64.
 
-   Copyright (C) 2011-2015 Free Software Foundation, Inc.
+   Copyright (C) 2011-2017 Free Software Foundation, Inc.
    Contributed by ARM Ltd.
 
    This file is part of GDB.
@@ -163,7 +163,7 @@ fetch_gregs_from_thread (struct regcache *regcache)
      and arm.  */
   gdb_static_assert (sizeof (regs) >= 18 * 4);
 
-  tid = ptid_get_lwp (inferior_ptid);
+  tid = ptid_get_lwp (regcache_get_ptid (regcache));
 
   iovec.iov_base = &regs;
   if (gdbarch_bfd_arch_info (gdbarch)->bits_per_word == 32)
@@ -200,7 +200,7 @@ store_gregs_to_thread (const struct regcache *regcache)
   /* Make sure REGS can hold all registers contents on both aarch64
      and arm.  */
   gdb_static_assert (sizeof (regs) >= 18 * 4);
-  tid = ptid_get_lwp (inferior_ptid);
+  tid = ptid_get_lwp (regcache_get_ptid (regcache));
 
   iovec.iov_base = &regs;
   if (gdbarch_bfd_arch_info (gdbarch)->bits_per_word == 32)
@@ -244,7 +244,7 @@ fetch_fpregs_from_thread (struct regcache *regcache)
      and arm.  */
   gdb_static_assert (sizeof regs >= VFP_REGS_SIZE);
 
-  tid = ptid_get_lwp (inferior_ptid);
+  tid = ptid_get_lwp (regcache_get_ptid (regcache));
 
   iovec.iov_base = &regs;
 
@@ -291,7 +291,7 @@ store_fpregs_to_thread (const struct regcache *regcache)
   /* Make sure REGS can hold all VFP registers contents on both aarch64
      and arm.  */
   gdb_static_assert (sizeof regs >= VFP_REGS_SIZE);
-  tid = ptid_get_lwp (inferior_ptid);
+  tid = ptid_get_lwp (regcache_get_ptid (regcache));
 
   iovec.iov_base = &regs;
 
@@ -457,24 +457,13 @@ aarch64_linux_new_fork (struct lwp_info *parent, pid_t child_pid)
    storage (or its descriptor).  */
 
 ps_err_e
-ps_get_thread_area (const struct ps_prochandle *ph,
+ps_get_thread_area (struct ps_prochandle *ph,
                    lwpid_t lwpid, int idx, void **base)
 {
-  struct iovec iovec;
-  uint64_t reg;
-
-  iovec.iov_base = ®
-  iovec.iov_len = sizeof (reg);
-
-  if (ptrace (PTRACE_GETREGSET, lwpid, NT_ARM_TLS, &iovec) != 0)
-    return PS_ERR;
+  int is_64bit_p
+    = (gdbarch_bfd_arch_info (target_gdbarch ())->bits_per_word == 64);
 
-  /* IDX is the bias from the thread pointer to the beginning of the
-     thread descriptor.  It has to be subtracted due to implementation
-     quirks in libthread_db.  */
-  *base = (void *) (reg - idx);
-
-  return PS_OK;
+  return aarch64_ps_get_thread_area (ph, lwpid, idx, base, is_64bit_p);
 }
 \f
 
@@ -492,7 +481,6 @@ aarch64_linux_child_post_startup_inferior (struct target_ops *self,
   super_post_startup_inferior (self, ptid);
 }
 
-extern struct target_desc *tdesc_arm_with_vfpv3;
 extern struct target_desc *tdesc_arm_with_neon;
 
 /* Implement the "to_read_description" target_ops method.  */
@@ -500,47 +488,20 @@ extern struct target_desc *tdesc_arm_with_neon;
 static const struct target_desc *
 aarch64_linux_read_description (struct target_ops *ops)
 {
-  CORE_ADDR at_phent;
-
-  if (target_auxv_search (ops, AT_PHENT, &at_phent) == 1)
-    {
-      if (at_phent == sizeof (Elf64_External_Phdr))
-       return tdesc_aarch64;
-      else
-       {
-         CORE_ADDR arm_hwcap = 0;
-
-         if (target_auxv_search (ops, AT_HWCAP, &arm_hwcap) != 1)
-           return ops->beneath->to_read_description (ops->beneath);
-
-#ifndef COMPAT_HWCAP_VFP
-#define COMPAT_HWCAP_VFP        (1 << 6)
-#endif
-#ifndef COMPAT_HWCAP_NEON
-#define COMPAT_HWCAP_NEON       (1 << 12)
-#endif
-#ifndef COMPAT_HWCAP_VFPv3
-#define COMPAT_HWCAP_VFPv3      (1 << 13)
-#endif
-
-         if (arm_hwcap & COMPAT_HWCAP_VFP)
-           {
-             char *buf;
-             const struct target_desc *result = NULL;
-
-             if (arm_hwcap & COMPAT_HWCAP_NEON)
-               result = tdesc_arm_with_neon;
-             else if (arm_hwcap & COMPAT_HWCAP_VFPv3)
-               result = tdesc_arm_with_vfpv3;
+  int ret, tid;
+  gdb_byte regbuf[VFP_REGS_SIZE];
+  struct iovec iovec;
 
-             return result;
-           }
+  tid = ptid_get_lwp (inferior_ptid);
 
-         return NULL;
-       }
-    }
+  iovec.iov_base = regbuf;
+  iovec.iov_len = VFP_REGS_SIZE;
 
-  return tdesc_aarch64;
+  ret = ptrace (PTRACE_GETREGSET, tid, NT_ARM_VFP, &iovec);
+  if (ret == 0)
+    return tdesc_arm_with_neon;
+  else
+    return tdesc_aarch64;
 }
 
 /* Convert a native/host siginfo object, into/from the siginfo in the
@@ -619,11 +580,13 @@ aarch64_linux_insert_hw_breakpoint (struct target_ops *self,
 {
   int ret;
   CORE_ADDR addr = bp_tgt->placed_address = bp_tgt->reqstd_address;
-  const int len = 4;
+  int len;
   const enum target_hw_bp_type type = hw_execute;
   struct aarch64_debug_reg_state *state
     = aarch64_get_debug_reg_state (ptid_get_pid (inferior_ptid));
 
+  gdbarch_breakpoint_from_pc (gdbarch, &addr, &len);
+
   if (show_debug_regs)
     fprintf_unfiltered
       (gdb_stdlog,
@@ -651,11 +614,13 @@ aarch64_linux_remove_hw_breakpoint (struct target_ops *self,
 {
   int ret;
   CORE_ADDR addr = bp_tgt->placed_address;
-  const int len = 4;
+  int len = 4;
   const enum target_hw_bp_type type = hw_execute;
   struct aarch64_debug_reg_state *state
     = aarch64_get_debug_reg_state (ptid_get_pid (inferior_ptid));
 
+  gdbarch_breakpoint_from_pc (gdbarch, &addr, &len);
+
   if (show_debug_regs)
     fprintf_unfiltered
       (gdb_stdlog, "remove_hw_breakpoint on entry (addr=0x%08lx, len=%d))\n",