/* Common target dependent code for GDB on AArch64 systems.
- Copyright (C) 2009-2017 Free Software Foundation, Inc.
+ Copyright (C) 2009-2018 Free Software Foundation, Inc.
Contributed by ARM Ltd.
This file is part of GDB.
#include "record.h"
#include "record-full.h"
-
-#include "features/aarch64.c"
-
#include "arch/aarch64-insn.h"
#include "opcode/aarch64.h"
aarch64_extract_return_value (struct type *type, struct regcache *regs,
gdb_byte *valbuf)
{
- struct gdbarch *gdbarch = get_regcache_arch (regs);
+ struct gdbarch *gdbarch = regs->arch ();
enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
if (TYPE_CODE (type) == TYPE_CODE_FLT)
aarch64_store_return_value (struct type *type, struct regcache *regs,
const gdb_byte *valbuf)
{
- struct gdbarch *gdbarch = get_regcache_arch (regs);
+ struct gdbarch *gdbarch = regs->arch ();
enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
if (TYPE_CODE (type) == TYPE_CODE_FLT)
unsigned v_regnum;
v_regnum = AARCH64_V0_REGNUM + regnum - AARCH64_Q0_REGNUM;
- status = regcache_raw_read (regcache, v_regnum, reg_buf);
+ status = regcache->raw_read (v_regnum, reg_buf);
if (status != REG_VALID)
mark_value_bytes_unavailable (result_value, 0,
TYPE_LENGTH (value_type (result_value)));
unsigned v_regnum;
v_regnum = AARCH64_V0_REGNUM + regnum - AARCH64_D0_REGNUM;
- status = regcache_raw_read (regcache, v_regnum, reg_buf);
+ status = regcache->raw_read (v_regnum, reg_buf);
if (status != REG_VALID)
mark_value_bytes_unavailable (result_value, 0,
TYPE_LENGTH (value_type (result_value)));
unsigned v_regnum;
v_regnum = AARCH64_V0_REGNUM + regnum - AARCH64_S0_REGNUM;
- status = regcache_raw_read (regcache, v_regnum, reg_buf);
+ status = regcache->raw_read (v_regnum, reg_buf);
if (status != REG_VALID)
mark_value_bytes_unavailable (result_value, 0,
TYPE_LENGTH (value_type (result_value)));
unsigned v_regnum;
v_regnum = AARCH64_V0_REGNUM + regnum - AARCH64_H0_REGNUM;
- status = regcache_raw_read (regcache, v_regnum, reg_buf);
+ status = regcache->raw_read (v_regnum, reg_buf);
if (status != REG_VALID)
mark_value_bytes_unavailable (result_value, 0,
TYPE_LENGTH (value_type (result_value)));
unsigned v_regnum;
v_regnum = AARCH64_V0_REGNUM + regnum - AARCH64_B0_REGNUM;
- status = regcache_raw_read (regcache, v_regnum, reg_buf);
+ status = regcache->raw_read (v_regnum, reg_buf);
if (status != REG_VALID)
mark_value_bytes_unavailable (result_value, 0,
TYPE_LENGTH (value_type (result_value)));
static std::vector<CORE_ADDR>
aarch64_software_single_step (struct regcache *regcache)
{
- struct gdbarch *gdbarch = get_regcache_arch (regcache);
+ struct gdbarch *gdbarch = regcache->arch ();
enum bfd_endian byte_order_for_code = gdbarch_byte_order_for_code (gdbarch);
const int insn_size = 4;
const int atomic_sequence_length = 16; /* Instruction sequence length. */
return next_pcs;
}
-struct displaced_step_closure
+struct aarch64_displaced_step_closure : public displaced_step_closure
{
/* It is true when condition instruction, such as B.CON, TBZ, etc,
is being displaced stepping. */
- int cond;
+ int cond = 0;
/* PC adjustment offset after displaced stepping. */
- int32_t pc_adjust;
+ int32_t pc_adjust = 0;
};
/* Data when visiting instructions for displaced stepping. */
/* Registers when doing displaced stepping. */
struct regcache *regs;
- struct displaced_step_closure *dsc;
+ aarch64_displaced_step_closure *dsc;
};
/* Implementation of aarch64_insn_visitor method "b". */
CORE_ADDR from, CORE_ADDR to,
struct regcache *regs)
{
- struct displaced_step_closure *dsc = NULL;
enum bfd_endian byte_order_for_code = gdbarch_byte_order_for_code (gdbarch);
uint32_t insn = read_memory_unsigned_integer (from, 4, byte_order_for_code);
struct aarch64_displaced_step_data dsd;
return NULL;
}
- dsc = XCNEW (struct displaced_step_closure);
+ std::unique_ptr<aarch64_displaced_step_closure> dsc
+ (new aarch64_displaced_step_closure);
dsd.base.insn_addr = from;
dsd.new_addr = to;
dsd.regs = regs;
- dsd.dsc = dsc;
+ dsd.dsc = dsc.get ();
dsd.insn_count = 0;
aarch64_relocate_instruction (insn, &visitor,
(struct aarch64_insn_data *) &dsd);
}
else
{
- xfree (dsc);
dsc = NULL;
}
- return dsc;
+ return dsc.release ();
}
/* Implement the "displaced_step_fixup" gdbarch method. */
void
aarch64_displaced_step_fixup (struct gdbarch *gdbarch,
- struct displaced_step_closure *dsc,
+ struct displaced_step_closure *dsc_,
CORE_ADDR from, CORE_ADDR to,
struct regcache *regs)
{
+ aarch64_displaced_step_closure *dsc = (aarch64_displaced_step_closure *) dsc_;
+
if (dsc->cond)
{
ULONGEST pc;
return 1;
}
+/* Get the correct target description. */
+
+const target_desc *
+aarch64_read_description ()
+{
+ static target_desc *aarch64_tdesc = NULL;
+ target_desc **tdesc = &aarch64_tdesc;
+
+ if (*tdesc == NULL)
+ *tdesc = aarch64_create_target_description ();
+
+ return *tdesc;
+}
+
/* Initialize the current architecture based on INFO. If possible,
re-use an architecture from ARCHES, which is a list of
architectures already created during this debugging session.
/* Ensure we always have a target descriptor. */
if (!tdesc_has_registers (tdesc))
- tdesc = tdesc_aarch64;
+ tdesc = aarch64_read_description ();
gdb_assert (tdesc);
set_tdesc_pseudo_register_reggroup_p (gdbarch,
aarch64_pseudo_register_reggroup_p);
+ /* The top byte of an address is known as the "tag" and is
+ ignored by the kernel, the hardware, etc. and can be regarded
+ as additional data associated with the address. */
+ set_gdbarch_significant_addr_bit (gdbarch, 56);
+
/* ABI */
set_gdbarch_short_bit (gdbarch, 16);
set_gdbarch_int_bit (gdbarch, 32);
gdbarch_register (bfd_arch_aarch64, aarch64_gdbarch_init,
aarch64_dump_tdep);
- initialize_tdesc_aarch64 ();
-
/* Debug this file's internals. */
add_setshow_boolean_cmd ("aarch64", class_maintenance, &aarch64_debug, _("\
Set AArch64 debugging."), _("\
selftests::aarch64_analyze_prologue_test);
selftests::register_test ("aarch64-process-record",
selftests::aarch64_process_record_test);
+ selftests::record_xml_tdesc ("aarch64.xml",
+ aarch64_create_target_description ());
#endif
}
projects / deliverable / binutils-gdb.git / blobdiff