/* Native-dependent code for GNU/Linux x86-64.
- Copyright (C) 2001-2016 Free Software Foundation, Inc.
+ Copyright (C) 2001-2018 Free Software Foundation, Inc.
Contributed by Jiri Smid, SuSE Labs.
This file is part of GDB.
#include "gdb_proc_service.h"
#include "amd64-nat.h"
-#include "linux-nat.h"
#include "amd64-tdep.h"
#include "amd64-linux-tdep.h"
#include "i386-linux-tdep.h"
#include "nat/linux-ptrace.h"
#include "nat/amd64-linux-siginfo.h"
+/* This definition comes from prctl.h. Kernels older than 2.5.64
+ do not have it. */
+#ifndef PTRACE_ARCH_PRCTL
+#define PTRACE_ARCH_PRCTL 30
+#endif
+
+struct amd64_linux_nat_target final : public x86_linux_nat_target
+{
+ /* Add our register access methods. */
+ void fetch_registers (struct regcache *, int) override;
+ void store_registers (struct regcache *, int) override;
+
+ bool low_siginfo_fixup (siginfo_t *ptrace, gdb_byte *inf, int direction)
+ override;
+};
+
+static amd64_linux_nat_target the_amd64_linux_nat_target;
+
/* Mapping between the general-purpose registers in GNU/Linux x86-64
`struct user' format and GDB's register cache layout for GNU/Linux
i386.
-1, -1, /* MPX registers BNDCFGU, BNDSTATUS. */
-1, -1, -1, -1, -1, -1, -1, -1, /* k0 ... k7 (AVX512) */
-1, -1, -1, -1, -1, -1, -1, -1, /* zmm0 ... zmm7 (AVX512) */
+ -1, /* PKEYS register PKRU */
ORIG_RAX * 8 /* "orig_eax" */
};
\f
this for all registers (including the floating point and SSE
registers). */
-static void
-amd64_linux_fetch_inferior_registers (struct target_ops *ops,
- struct regcache *regcache, int regnum)
+void
+amd64_linux_nat_target::fetch_registers (struct regcache *regcache, int regnum)
{
- struct gdbarch *gdbarch = get_regcache_arch (regcache);
+ struct gdbarch *gdbarch = regcache->arch ();
int tid;
/* GNU/Linux LWP ID's are process ID's. */
- tid = ptid_get_lwp (inferior_ptid);
+ tid = ptid_get_lwp (regcache->ptid ());
if (tid == 0)
- tid = ptid_get_pid (inferior_ptid); /* Not a threaded program. */
+ tid = regcache->ptid ().pid (); /* Not a threaded program. */
if (regnum == -1 || amd64_native_gregset_supplies_p (gdbarch, regnum))
{
amd64_supply_fxsave (regcache, -1, &fpregs);
}
+#ifndef HAVE_STRUCT_USER_REGS_STRUCT_FS_BASE
+ {
+ /* PTRACE_ARCH_PRCTL is obsolete since 2.6.25, where the
+ fs_base and gs_base fields of user_regs_struct can be
+ used directly. */
+ unsigned long base;
+
+ if (regnum == -1 || regnum == AMD64_FSBASE_REGNUM)
+ {
+ if (ptrace (PTRACE_ARCH_PRCTL, tid, &base, ARCH_GET_FS) < 0)
+ perror_with_name (_("Couldn't get segment register fs_base"));
+
+ regcache->raw_supply (AMD64_FSBASE_REGNUM, &base);
+ }
+
+ if (regnum == -1 || regnum == AMD64_GSBASE_REGNUM)
+ {
+ if (ptrace (PTRACE_ARCH_PRCTL, tid, &base, ARCH_GET_GS) < 0)
+ perror_with_name (_("Couldn't get segment register gs_base"));
+
+ regcache->raw_supply (AMD64_GSBASE_REGNUM, &base);
+ }
+ }
+#endif
}
}
-1, do this for all registers (including the floating-point and SSE
registers). */
-static void
-amd64_linux_store_inferior_registers (struct target_ops *ops,
- struct regcache *regcache, int regnum)
+void
+amd64_linux_nat_target::store_registers (struct regcache *regcache, int regnum)
{
- struct gdbarch *gdbarch = get_regcache_arch (regcache);
+ struct gdbarch *gdbarch = regcache->arch ();
int tid;
/* GNU/Linux LWP ID's are process ID's. */
- tid = ptid_get_lwp (inferior_ptid);
+ tid = ptid_get_lwp (regcache->ptid ());
if (tid == 0)
- tid = ptid_get_pid (inferior_ptid); /* Not a threaded program. */
+ tid = regcache->ptid ().pid (); /* Not a threaded program. */
if (regnum == -1 || amd64_native_gregset_supplies_p (gdbarch, regnum))
{
if (ptrace (PTRACE_SETFPREGS, tid, 0, (long) &fpregs) < 0)
perror_with_name (_("Couldn't write floating point status"));
}
+
+#ifndef HAVE_STRUCT_USER_REGS_STRUCT_FS_BASE
+ {
+ /* PTRACE_ARCH_PRCTL is obsolete since 2.6.25, where the
+ fs_base and gs_base fields of user_regs_struct can be
+ used directly. */
+ void *base;
+
+ if (regnum == -1 || regnum == AMD64_FSBASE_REGNUM)
+ {
+ regcache->raw_collect (AMD64_FSBASE_REGNUM, &base);
+
+ if (ptrace (PTRACE_ARCH_PRCTL, tid, base, ARCH_SET_FS) < 0)
+ perror_with_name (_("Couldn't write segment register fs_base"));
+ }
+ if (regnum == -1 || regnum == AMD64_GSBASE_REGNUM)
+ {
+
+ regcache->raw_collect (AMD64_GSBASE_REGNUM, &base);
+ if (ptrace (PTRACE_ARCH_PRCTL, tid, base, ARCH_SET_GS) < 0)
+ perror_with_name (_("Couldn't write segment register gs_base"));
+ }
+ }
+#endif
}
}
\f
a request for a thread's local storage address. */
ps_err_e
-ps_get_thread_area (const struct ps_prochandle *ph,
+ps_get_thread_area (struct ps_prochandle *ph,
lwpid_t lwpid, int idx, void **base)
{
if (gdbarch_bfd_arch_info (target_gdbarch ())->bits_per_word == 32)
}
else
{
- /* This definition comes from prctl.h, but some kernels may not
- have it. */
-#ifndef PTRACE_ARCH_PRCTL
-#define PTRACE_ARCH_PRCTL 30
-#endif
+
/* FIXME: ezannoni-2003-07-09 see comment above about include
file order. We could be getting bogus values for these two. */
gdb_assert (FS < ELF_NGREG);
from INF to PTRACE. If DIRECTION is 0, copy from PTRACE to
INF. */
-static int
-amd64_linux_siginfo_fixup (siginfo_t *ptrace, gdb_byte *inf, int direction)
+bool
+amd64_linux_nat_target::low_siginfo_fixup (siginfo_t *ptrace,
+ gdb_byte *inf,
+ int direction)
{
struct gdbarch *gdbarch = get_frame_arch (get_current_frame ());
/* Is the inferior 32-bit? If so, then do fixup the siginfo
object. */
if (gdbarch_bfd_arch_info (gdbarch)->bits_per_word == 32)
- return amd64_linux_siginfo_fixup_common (ptrace, inf, direction,
- FIXUP_32);
+ return amd64_linux_siginfo_fixup_common (ptrace, inf, direction,
+ FIXUP_32);
/* No fixup for native x32 GDB. */
else if (gdbarch_addr_bit (gdbarch) == 32 && sizeof (void *) == 8)
- return amd64_linux_siginfo_fixup_common (ptrace, inf, direction,
- FIXUP_X32);
+ return amd64_linux_siginfo_fixup_common (ptrace, inf, direction,
+ FIXUP_X32);
else
- return 0;
+ return false;
}
-/* Provide a prototype to silence -Wmissing-prototypes. */
-void _initialize_amd64_linux_nat (void);
-
void
_initialize_amd64_linux_nat (void)
{
- struct target_ops *t;
-
amd64_native_gregset32_reg_offset = amd64_linux_gregset32_reg_offset;
amd64_native_gregset32_num_regs = I386_LINUX_NUM_REGS;
amd64_native_gregset64_reg_offset = amd64_linux_gregset_reg_offset;
gdb_assert (ARRAY_SIZE (amd64_linux_gregset32_reg_offset)
== amd64_native_gregset32_num_regs);
- /* Create a generic x86 GNU/Linux target. */
- t = x86_linux_create_target ();
-
- /* Add our register access methods. */
- t->to_fetch_registers = amd64_linux_fetch_inferior_registers;
- t->to_store_registers = amd64_linux_store_inferior_registers;
+ linux_target = &the_amd64_linux_nat_target;
/* Add the target. */
- x86_linux_add_target (t);
-
- /* Add our siginfo layout converter. */
- linux_nat_set_siginfo_fixup (t, amd64_linux_siginfo_fixup);
+ add_inf_child_target (linux_target);
}