gdb/x86: Handle kernels using compact xsave format

[deliverable/binutils-gdb.git] / gdb / amd64-tdep.c

diff --git a/gdb/amd64-tdep.c b/gdb/amd64-tdep.c
index 1fea26409ae93678784a13f2fb09909eea5c7404..d555465c2f9646fd829652741c44ce917d8b602b 100644 (file)
--- a/gdb/amd64-tdep.c
+++ b/gdb/amd64-tdep.c
@@ -3372,13 +3372,23 @@ amd64_supply_xsave (struct regcache *regcache, int regnum,
       && gdbarch_bfd_arch_info (gdbarch)->bits_per_word == 64)
     {
       const gdb_byte *regs = (const gdb_byte *) xsave;
+      static const gdb_byte zero[I386_MAX_REGISTER_SIZE] = { 0 };
+      ULONGEST clear_bv;
 
-      if (regnum == -1 || regnum == I387_FISEG_REGNUM (tdep))
-       regcache_raw_supply (regcache, I387_FISEG_REGNUM (tdep),
-                            regs + 12);
-      if (regnum == -1 || regnum == I387_FOSEG_REGNUM (tdep))
-       regcache_raw_supply (regcache, I387_FOSEG_REGNUM (tdep),
-                            regs + 20);
+      clear_bv = i387_xsave_get_clear_bv (gdbarch, xsave);
+
+      /* If the FISEG and FOSEG registers have not been initialised yet
+        (their CLEAR_BV bit is set) then their default values of zero will
+        have already been setup by I387_SUPPLY_XSAVE.  */
+      if (!(clear_bv & X86_XSTATE_X87))
+       {
+         if (regnum == -1 || regnum == I387_FISEG_REGNUM (tdep))
+           regcache_raw_supply (regcache, I387_FISEG_REGNUM (tdep),
+                                regs + 12);
+         if (regnum == -1 || regnum == I387_FOSEG_REGNUM (tdep))
+           regcache_raw_supply (regcache, I387_FOSEG_REGNUM (tdep),
+                                regs + 20);
+       }
     }
 }