struct regcache *regcache, int regnum,
const void *regs, size_t len)
{
- const struct gdbarch_tdep *tdep = regset->descr;
+ const struct gdbarch_tdep *tdep = gdbarch_tdep (regset->arch);
gdb_assert (len >= tdep->sizeof_gregset + I387_SIZEOF_FXSAVE);
&& sect_size >= tdep->sizeof_gregset + I387_SIZEOF_FXSAVE)
{
if (tdep->gregset == NULL)
- {
- tdep->gregset = XMALLOC (struct regset);
- tdep->gregset->descr = tdep;
- tdep->gregset->supply_regset = amd64obsd_supply_regset;
- }
+ tdep->gregset = regset_alloc (gdbarch, amd64obsd_supply_regset, NULL);
return tdep->gregset;
}
return 0;
/* If we can't read the instructions at START_PC, return zero. */
- buf = alloca (sizeof sigreturn);
- if (target_read_memory (start_pc + 7, buf, sizeof sigreturn))
+ buf = alloca ((sizeof sigreturn) + 1);
+ if (target_read_memory (start_pc + 6, buf, (sizeof sigreturn) + 1))
return 0;
- /* Check for sigreturn(2). */
- if (memcmp (buf, sigreturn, sizeof sigreturn))
+ /* Check for sigreturn(2). Depending on how the assembler encoded
+ the `movq %rsp, %rdi' instruction, the code starts at offset 6 or
+ 7. */
+ if (memcmp (buf, sigreturn, sizeof sigreturn)
+ && memcpy (buf + 1, sigreturn, sizeof sigreturn))
return 0;
return 1;
(see /usr/src/sys/arch/amd64/amd64/locore.S). The `pushq'
instruction clobbers %rsp, but its value is saved in `%rdi'. */
- if (offset > 6)
+ if (offset > 5)
return frame_unwind_register_unsigned (next_frame, AMD64_RDI_REGNUM);
else
return frame_unwind_register_unsigned (next_frame, AMD64_RSP_REGNUM);