C++-ify prologue-value's pv_area

[deliverable/binutils-gdb.git] / gdb / arc-tdep.c

diff --git a/gdb/arc-tdep.c b/gdb/arc-tdep.c
index 6ff6ba38f954a3810370529f7d797777a4022e84..9927910000291e7ff96f34000fa5bb12009be3c0 100644 (file)
--- a/gdb/arc-tdep.c
+++ b/gdb/arc-tdep.c
@@ -1014,7 +1014,7 @@ arc_is_in_prologue (struct gdbarch *gdbarch, const struct arc_instruction &insn,
        addr = pv_add_constant (regs[base_reg],
                                arc_insn_get_memory_offset (insn));
 
-      if (pv_area_store_would_trash (stack, addr))
+      if (stack->store_would_trash (addr))
        return false;
 
       if (insn.data_size_mode != ARC_SCALING_D)
@@ -1031,7 +1031,7 @@ arc_is_in_prologue (struct gdbarch *gdbarch, const struct arc_instruction &insn,
          else
            size = ARC_REGISTER_SIZE;
 
-         pv_area_store (stack, addr, size, store_value);
+         stack->store (addr, size, store_value);
        }
       else
        {
@@ -1040,16 +1040,15 @@ arc_is_in_prologue (struct gdbarch *gdbarch, const struct arc_instruction &insn,
              /* If this is a double store, than write N+1 register as well.  */
              pv_t store_value1 = regs[insn.operands[0].value];
              pv_t store_value2 = regs[insn.operands[0].value + 1];
-             pv_area_store (stack, addr, ARC_REGISTER_SIZE, store_value1);
-             pv_area_store (stack,
-                            pv_add_constant (addr, ARC_REGISTER_SIZE),
-                            ARC_REGISTER_SIZE, store_value2);
+             stack->store (addr, ARC_REGISTER_SIZE, store_value1);
+             stack->store (pv_add_constant (addr, ARC_REGISTER_SIZE),
+                           ARC_REGISTER_SIZE, store_value2);
            }
          else
            {
              pv_t store_value
                = pv_constant (arc_insn_get_operand_value (insn, 0));
-             pv_area_store (stack, addr, ARC_REGISTER_SIZE * 2, store_value);
+             stack->store (addr, ARC_REGISTER_SIZE * 2, store_value);
            }
        }
 
@@ -1136,7 +1135,7 @@ arc_is_in_prologue (struct gdbarch *gdbarch, const struct arc_instruction &insn,
 
       /* Assume that if the last register (closest to new SP) can be written,
         then it is possible to write all of them.  */
-      if (pv_area_store_would_trash (stack, new_sp))
+      if (stack->store_would_trash (new_sp))
        return false;
 
       /* Current store address.  */
@@ -1145,21 +1144,21 @@ arc_is_in_prologue (struct gdbarch *gdbarch, const struct arc_instruction &insn,
       if (is_fp_saved)
        {
          addr = pv_add_constant (addr, -ARC_REGISTER_SIZE);
-         pv_area_store (stack, addr, ARC_REGISTER_SIZE, regs[ARC_FP_REGNUM]);
+         stack->store (addr, ARC_REGISTER_SIZE, regs[ARC_FP_REGNUM]);
        }
 
       /* Registers are stored in backward order: from GP (R26) to R13.  */
       for (int i = ARC_R13_REGNUM + regs_saved - 1; i >= ARC_R13_REGNUM; i--)
        {
          addr = pv_add_constant (addr, -ARC_REGISTER_SIZE);
-         pv_area_store (stack, addr, ARC_REGISTER_SIZE, regs[i]);
+         stack->store (addr, ARC_REGISTER_SIZE, regs[i]);
        }
 
       if (is_blink_saved)
        {
          addr = pv_add_constant (addr, -ARC_REGISTER_SIZE);
-         pv_area_store (stack, addr, ARC_REGISTER_SIZE,
-                        regs[ARC_BLINK_REGNUM]);
+         stack->store (addr, ARC_REGISTER_SIZE,
+                       regs[ARC_BLINK_REGNUM]);
        }
 
       gdb_assert (pv_is_identical (addr, new_sp));
@@ -1271,9 +1270,7 @@ arc_analyze_prologue (struct gdbarch *gdbarch, const CORE_ADDR entrypoint,
   pv_t regs[ARC_LAST_CORE_REGNUM + 1];
   for (int i = 0; i <= ARC_LAST_CORE_REGNUM; i++)
     regs[i] = pv_register (i, 0);
-  struct pv_area *stack = make_pv_area (ARC_SP_REGNUM,
-                                       gdbarch_addr_bit (gdbarch));
-  struct cleanup *back_to = make_cleanup_free_pv_area (stack);
+  pv_area stack (ARC_SP_REGNUM, gdbarch_addr_bit (gdbarch));
 
   CORE_ADDR current_prologue_end = entrypoint;
 
@@ -1290,7 +1287,7 @@ arc_analyze_prologue (struct gdbarch *gdbarch, const CORE_ADDR entrypoint,
 
       /* If this instruction is in the prologue, fields in the cache will be
         updated, and the saved registers mask may be updated.  */
-      if (!arc_is_in_prologue (gdbarch, insn, regs, stack))
+      if (!arc_is_in_prologue (gdbarch, insn, regs, &stack))
        {
          /* Found an instruction that is not in the prologue.  */
          if (arc_debug)
@@ -1320,12 +1317,11 @@ arc_analyze_prologue (struct gdbarch *gdbarch, const CORE_ADDR entrypoint,
       for (int i = 0; i <= ARC_LAST_CORE_REGNUM; i++)
        {
          CORE_ADDR offset;
-         if (pv_area_find_reg (stack, gdbarch, i, &offset))
+         if (stack.find_reg (gdbarch, i, &offset))
            cache->saved_regs[i].addr = offset;
        }
     }
 
-  do_cleanups (back_to);
   return current_prologue_end;
 }