/* Target dependent code for ARC architecture, for GDB.
- Copyright 2005-2020 Free Software Foundation, Inc.
+ Copyright 2005-2021 Free Software Foundation, Inc.
Contributed by Synopsys Inc.
This file is part of GDB.
/* Need disassemble_info. */
#include "dis-asm.h"
+#include "gdbarch.h"
#include "arch/arc.h"
/* To simplify GDB code this enum assumes that internal regnums should be same
{
/* Core registers. */
ARC_R0_REGNUM = 0,
- ARC_FIRST_CORE_REGNUM = ARC_R0_REGNUM,
ARC_R1_REGNUM = 1,
ARC_R4_REGNUM = 4,
ARC_R7_REGNUM = 7,
ARC_R30_REGNUM,
/* Return address from function. */
ARC_BLINK_REGNUM,
+ /* Accumulator registers. */
+ ARC_R58_REGNUM = 58,
+ ARC_R59_REGNUM,
/* Zero-delay loop counter. */
ARC_LP_COUNT_REGNUM = 60,
/* Reserved register number. There should never be a register with such
/* Program counter, aligned to 4-bytes, read-only. */
ARC_PCL_REGNUM,
ARC_LAST_CORE_REGNUM = ARC_PCL_REGNUM,
+
/* AUX registers. */
/* Actual program counter. */
ARC_PC_REGNUM,
ARC_FIRST_AUX_REGNUM = ARC_PC_REGNUM,
/* Status register. */
ARC_STATUS32_REGNUM,
- ARC_LAST_REGNUM = ARC_STATUS32_REGNUM,
- ARC_LAST_AUX_REGNUM = ARC_STATUS32_REGNUM,
+ /* Zero-delay loop start instruction. */
+ ARC_LP_START_REGNUM,
+ /* Zero-delay loop next-after-last instruction. */
+ ARC_LP_END_REGNUM,
+ /* Branch target address. */
+ ARC_BTA_REGNUM,
+ /* Exception return address. */
+ ARC_ERET_REGNUM,
+ ARC_LAST_AUX_REGNUM = ARC_ERET_REGNUM,
+ ARC_LAST_REGNUM = ARC_LAST_AUX_REGNUM,
/* Additional ABI constants. */
ARC_FIRST_ARG_REGNUM = ARC_R0_REGNUM,
Longer registers are represented as pairs of 32-bit registers. */
#define ARC_REGISTER_SIZE 4
+/* STATUS32 register: hardware loops disabled bit. */
+#define ARC_STATUS32_L_MASK (1 << 12)
+/* STATUS32 register: current instruction is a delay slot. */
+#define ARC_STATUS32_DE_MASK (1 << 6)
+
+/* Special value for register offset arrays. */
+#define ARC_OFFSET_NO_REGISTER (-1)
+
#define arc_print(fmt, args...) fprintf_unfiltered (gdb_stdlog, fmt, ##args)
-extern int arc_debug;
+extern bool arc_debug;
+
+/* Print an "arc" debug statement. */
+
+#define arc_debug_printf(fmt, ...) \
+ debug_prefixed_printf_cond (arc_debug, "arc", fmt, ##__VA_ARGS__)
/* Target-dependent information. */
/* Offset to PC value in jump buffer. If this is negative, longjmp
support will be disabled. */
int jb_pc;
+
+ /* Whether target has hardware (aka zero-delay) loops. */
+ bool has_hw_loops;
+
+ /* Detect sigtramp. */
+ bool (*is_sigtramp) (struct frame_info *);
+
+ /* Get address of sigcontext for sigtramp. */
+ CORE_ADDR (*sigcontext_addr) (struct frame_info *);
+
+ /* Offset of registers in `struct sigcontext'. */
+ const int *sc_reg_offset;
+
+ /* Number of registers in sc_reg_offsets. Most likely a ARC_LAST_REGNUM,
+ but in theory it could be less, so it is kept separate. */
+ int sc_num_regs;
};
/* Utility functions used by other ARC-specific modules. */
CORE_ADDR arc_insn_get_linear_next_pc (const struct arc_instruction &insn);
-/* Get the correct ARC target description for the given system type. */
-const target_desc *arc_read_description (arc_sys_type sys_type);
+/* Create an arc_arch_features instance from the provided data. */
+
+arc_arch_features arc_arch_features_create (const bfd *abfd,
+ const unsigned long mach);
#endif /* ARC_TDEP_H */