/* Common code for ARM software single stepping support.
- Copyright (C) 1988-2018 Free Software Foundation, Inc.
+ Copyright (C) 1988-2020 Free Software Foundation, Inc.
This file is part of GDB.
You should have received a copy of the GNU General Public License
along with this program. If not, see <http://www.gnu.org/licenses/>. */
-#include "common-defs.h"
-#include "gdb_vecs.h"
-#include "common-regcache.h"
+#include "gdbsupport/common-defs.h"
+#include "gdbsupport/gdb_vecs.h"
+#include "gdbsupport/common-regcache.h"
#include "arm.h"
#include "arm-get-next-pcs.h"
+#include "count-one-bits.h"
/* See arm-get-next-pcs.h. */
thumb_deal_with_atomic_sequence_raw (struct arm_get_next_pcs *self)
{
int byte_order_for_code = self->byte_order_for_code;
- CORE_ADDR breaks[2] = {-1, -1};
+ CORE_ADDR breaks[2] = {CORE_ADDR_MAX, CORE_ADDR_MAX};
CORE_ADDR pc = regcache_read_pc (self->regcache);
CORE_ADDR loc = pc;
unsigned short insn1, insn2;
arm_deal_with_atomic_sequence_raw (struct arm_get_next_pcs *self)
{
int byte_order_for_code = self->byte_order_for_code;
- CORE_ADDR breaks[2] = {-1, -1};
+ CORE_ADDR breaks[2] = {CORE_ADDR_MAX, CORE_ADDR_MAX};
CORE_ADDR pc = regcache_read_pc (self->regcache);
CORE_ADDR loc = pc;
unsigned int insn;
unsigned long pc_val = ((unsigned long) pc) + 4; /* PC after prefetch */
unsigned short inst1;
CORE_ADDR nextpc = pc + 2; /* Default is next instruction. */
- unsigned long offset;
ULONGEST status, itstate;
struct regcache *regcache = self->regcache;
std::vector<CORE_ADDR> next_pcs;
/* Fetch the saved PC from the stack. It's stored above
all of the other registers. */
- offset = bitcount (bits (inst1, 0, 7)) * INT_REGISTER_SIZE;
+ unsigned long offset
+ = count_one_bits (bits (inst1, 0, 7)) * ARM_INT_REGISTER_SIZE;
sp = regcache_raw_get_unsigned (regcache, ARM_SP_REGNUM);
nextpc = self->ops->read_mem_uint (sp + offset, 4, byte_order);
}
j1 = bit (inst2, 13);
j2 = bit (inst2, 11);
- offset = ((imm1 << 12) + (imm2 << 1));
+ unsigned long offset = ((imm1 << 12) + (imm2 << 1));
offset ^= ((!j2) << 22) | ((!j1) << 23);
nextpc = pc_val + offset;
j1 = bit (inst2, 13);
j2 = bit (inst2, 11);
- offset = (sign << 20) + (j2 << 19) + (j1 << 18);
+ unsigned long offset
+ = (sign << 20) + (j2 << 19) + (j1 << 18);
offset += (imm1 << 12) + (imm2 << 1);
nextpc = pc_val + offset;
/* LDMIA or POP */
if (!bit (inst2, 15))
load_pc = 0;
- offset = bitcount (inst2) * 4 - 4;
+ offset = count_one_bits (inst2) * 4 - 4;
}
else if (!bit (inst1, 7) && bit (inst1, 8))
{
{
/* up */
unsigned long reglist = bits (this_instr, 0, 14);
- offset = bitcount (reglist) * 4;
+ offset = count_one_bits_l (reglist) * 4;
if (bit (this_instr, 24)) /* pre */
offset += 4;
}