/* GNU/Linux on ARM target support.
- Copyright 1999, 2000, 2001, 2002 Free Software Foundation, Inc.
+
+ Copyright (C) 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008,
+ 2009, 2010 Free Software Foundation, Inc.
This file is part of GDB.
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
+ the Free Software Foundation; either version 3 of the License, or
(at your option) any later version.
This program is distributed in the hope that it will be useful,
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place - Suite 330,
- Boston, MA 02111-1307, USA. */
+ along with this program. If not, see <http://www.gnu.org/licenses/>. */
#include "defs.h"
#include "target.h"
#include "frame.h"
#include "regcache.h"
#include "doublest.h"
+#include "solib-svr4.h"
+#include "osabi.h"
+#include "regset.h"
+#include "trad-frame.h"
+#include "tramp-frame.h"
+#include "breakpoint.h"
#include "arm-tdep.h"
-
-/* For arm_linux_skip_solib_resolver. */
-#include "symtab.h"
+#include "arm-linux-tdep.h"
+#include "linux-tdep.h"
+#include "glibc-tdep.h"
+#include "arch-utils.h"
+#include "inferior.h"
+#include "gdbthread.h"
#include "symfile.h"
-#include "objfiles.h"
-
-/* CALL_DUMMY_WORDS:
- This sequence of words is the instructions
-
- mov lr, pc
- mov pc, r4
- swi bkpt_swi
-
- Note this is 12 bytes. */
-
-LONGEST arm_linux_call_dummy_words[] =
-{
- 0xe1a0e00f, 0xe1a0f004, 0xef9f001
-};
-
-#ifdef GET_LONGJMP_TARGET
-
-/* Figure out where the longjmp will land. We expect that we have
- just entered longjmp and haven't yet altered r0, r1, so the
- arguments are still in the registers. (ARM_A1_REGNUM) points at
- the jmp_buf structure from which we extract the pc (JB_PC) that we
- will land at. The pc is copied into ADDR. This routine returns
- true on success. */
-
-#define LONGJMP_TARGET_SIZE sizeof(int)
-#define JB_ELEMENT_SIZE sizeof(int)
-#define JB_SL 18
-#define JB_FP 19
-#define JB_SP 20
-#define JB_PC 21
-
-int
-arm_get_longjmp_target (CORE_ADDR * pc)
-{
- CORE_ADDR jb_addr;
- char buf[LONGJMP_TARGET_SIZE];
-
- jb_addr = read_register (ARM_A1_REGNUM);
-
- if (target_read_memory (jb_addr + JB_PC * JB_ELEMENT_SIZE, buf,
- LONGJMP_TARGET_SIZE))
- return 0;
- *pc = extract_address (buf, LONGJMP_TARGET_SIZE);
- return 1;
-}
+#include "gdb_string.h"
-#endif /* GET_LONGJMP_TARGET */
+extern int arm_apcs_32;
-/* Extract from an array REGBUF containing the (raw) register state
- a function return value of type TYPE, and copy that, in virtual format,
- into VALBUF. */
+/* Under ARM GNU/Linux the traditional way of performing a breakpoint
+ is to execute a particular software interrupt, rather than use a
+ particular undefined instruction to provoke a trap. Upon exection
+ of the software interrupt the kernel stops the inferior with a
+ SIGTRAP, and wakes the debugger. */
-void
-arm_linux_extract_return_value (struct type *type,
- char regbuf[REGISTER_BYTES],
- char *valbuf)
-{
- /* ScottB: This needs to be looked at to handle the different
- floating point emulators on ARM Linux. Right now the code
- assumes that fetch inferior registers does the right thing for
- GDB. I suspect this won't handle NWFPE registers correctly, nor
- will the default ARM version (arm_extract_return_value()). */
-
- int regnum = ((TYPE_CODE_FLT == TYPE_CODE (type))
- ? ARM_F0_REGNUM : ARM_A1_REGNUM);
- memcpy (valbuf, ®buf[REGISTER_BYTE (regnum)], TYPE_LENGTH (type));
-}
+static const char arm_linux_arm_le_breakpoint[] = { 0x01, 0x00, 0x9f, 0xef };
-/* Note: ScottB
-
- This function does not support passing parameters using the FPA
- variant of the APCS. It passes any floating point arguments in the
- general registers and/or on the stack.
-
- FIXME: This and arm_push_arguments should be merged. However this
- function breaks on a little endian host, big endian target
- using the COFF file format. ELF is ok.
-
- ScottB. */
-
-/* Addresses for calling Thumb functions have the bit 0 set.
- Here are some macros to test, set, or clear bit 0 of addresses. */
-#define IS_THUMB_ADDR(addr) ((addr) & 1)
-#define MAKE_THUMB_ADDR(addr) ((addr) | 1)
-#define UNMAKE_THUMB_ADDR(addr) ((addr) & ~1)
-
-CORE_ADDR
-arm_linux_push_arguments (int nargs, struct value **args, CORE_ADDR sp,
- int struct_return, CORE_ADDR struct_addr)
-{
- char *fp;
- int argnum, argreg, nstack_size;
+static const char arm_linux_arm_be_breakpoint[] = { 0xef, 0x9f, 0x00, 0x01 };
- /* Walk through the list of args and determine how large a temporary
- stack is required. Need to take care here as structs may be
- passed on the stack, and we have to to push them. */
- nstack_size = -4 * REGISTER_SIZE; /* Some arguments go into A1-A4. */
+/* However, the EABI syscall interface (new in Nov. 2005) does not look at
+ the operand of the swi if old-ABI compatibility is disabled. Therefore,
+ use an undefined instruction instead. This is supported as of kernel
+ version 2.5.70 (May 2003), so should be a safe assumption for EABI
+ binaries. */
- if (struct_return) /* The struct address goes in A1. */
- nstack_size += REGISTER_SIZE;
+static const char eabi_linux_arm_le_breakpoint[] = { 0xf0, 0x01, 0xf0, 0xe7 };
- /* Walk through the arguments and add their size to nstack_size. */
- for (argnum = 0; argnum < nargs; argnum++)
- {
- int len;
- struct type *arg_type;
+static const char eabi_linux_arm_be_breakpoint[] = { 0xe7, 0xf0, 0x01, 0xf0 };
- arg_type = check_typedef (VALUE_TYPE (args[argnum]));
- len = TYPE_LENGTH (arg_type);
+/* All the kernels which support Thumb support using a specific undefined
+ instruction for the Thumb breakpoint. */
- /* ANSI C code passes float arguments as integers, K&R code
- passes float arguments as doubles. Correct for this here. */
- if (TYPE_CODE_FLT == TYPE_CODE (arg_type) && REGISTER_SIZE == len)
- nstack_size += FP_REGISTER_VIRTUAL_SIZE;
- else
- nstack_size += len;
- }
-
- /* Allocate room on the stack, and initialize our stack frame
- pointer. */
- fp = NULL;
- if (nstack_size > 0)
- {
- sp -= nstack_size;
- fp = (char *) sp;
- }
+static const char arm_linux_thumb_be_breakpoint[] = {0xde, 0x01};
- /* Initialize the integer argument register pointer. */
- argreg = ARM_A1_REGNUM;
+static const char arm_linux_thumb_le_breakpoint[] = {0x01, 0xde};
- /* The struct_return pointer occupies the first parameter passing
- register. */
- if (struct_return)
- write_register (argreg++, struct_addr);
-
- /* Process arguments from left to right. Store as many as allowed
- in the parameter passing registers (A1-A4), and save the rest on
- the temporary stack. */
- for (argnum = 0; argnum < nargs; argnum++)
- {
- int len;
- char *val;
- CORE_ADDR regval;
- enum type_code typecode;
- struct type *arg_type, *target_type;
-
- arg_type = check_typedef (VALUE_TYPE (args[argnum]));
- target_type = TYPE_TARGET_TYPE (arg_type);
- len = TYPE_LENGTH (arg_type);
- typecode = TYPE_CODE (arg_type);
- val = (char *) VALUE_CONTENTS (args[argnum]);
-
- /* ANSI C code passes float arguments as integers, K&R code
- passes float arguments as doubles. The .stabs record for
- for ANSI prototype floating point arguments records the
- type as FP_INTEGER, while a K&R style (no prototype)
- .stabs records the type as FP_FLOAT. In this latter case
- the compiler converts the float arguments to double before
- calling the function. */
- if (TYPE_CODE_FLT == typecode && REGISTER_SIZE == len)
- {
- DOUBLEST dblval;
- dblval = extract_floating (val, len);
- len = TARGET_DOUBLE_BIT / TARGET_CHAR_BIT;
- val = alloca (len);
- store_floating (val, len, dblval);
- }
+/* Because the 16-bit Thumb breakpoint is affected by Thumb-2 IT blocks,
+ we must use a length-appropriate breakpoint for 32-bit Thumb
+ instructions. See also thumb_get_next_pc. */
- /* If the argument is a pointer to a function, and it is a Thumb
- function, set the low bit of the pointer. */
- if (TYPE_CODE_PTR == typecode
- && NULL != target_type
- && TYPE_CODE_FUNC == TYPE_CODE (target_type))
- {
- CORE_ADDR regval = extract_address (val, len);
- if (arm_pc_is_thumb (regval))
- store_address (val, len, MAKE_THUMB_ADDR (regval));
- }
+static const char arm_linux_thumb2_be_breakpoint[] = { 0xf7, 0xf0, 0xa0, 0x00 };
- /* Copy the argument to general registers or the stack in
- register-sized pieces. Large arguments are split between
- registers and stack. */
- while (len > 0)
- {
- int partial_len = len < REGISTER_SIZE ? len : REGISTER_SIZE;
+static const char arm_linux_thumb2_le_breakpoint[] = { 0xf0, 0xf7, 0x00, 0xa0 };
- if (argreg <= ARM_LAST_ARG_REGNUM)
- {
- /* It's an argument being passed in a general register. */
- regval = extract_address (val, partial_len);
- write_register (argreg++, regval);
- }
- else
- {
- /* Push the arguments onto the stack. */
- write_memory ((CORE_ADDR) fp, val, REGISTER_SIZE);
- fp += REGISTER_SIZE;
- }
+/* Description of the longjmp buffer. The buffer is treated as an array of
+ elements of size ARM_LINUX_JB_ELEMENT_SIZE.
- len -= partial_len;
- val += partial_len;
- }
- }
+ The location of saved registers in this buffer (in particular the PC
+ to use after longjmp is called) varies depending on the ABI (in
+ particular the FP model) and also (possibly) the C Library.
- /* Return adjusted stack pointer. */
- return sp;
-}
+ For glibc, eglibc, and uclibc the following holds: If the FP model is
+ SoftVFP or VFP (which implies EABI) then the PC is at offset 9 in the
+ buffer. This is also true for the SoftFPA model. However, for the FPA
+ model the PC is at offset 21 in the buffer. */
+#define ARM_LINUX_JB_ELEMENT_SIZE INT_REGISTER_SIZE
+#define ARM_LINUX_JB_PC_FPA 21
+#define ARM_LINUX_JB_PC_EABI 9
/*
- Dynamic Linking on ARM Linux
- ----------------------------
+ Dynamic Linking on ARM GNU/Linux
+ --------------------------------
Note: PLT = procedure linkage table
GOT = global offset table
When the executable or library is first loaded, each GOT entry is
initialized to point to the code which implements dynamic name
resolution and code finding. This is normally a function in the
- program interpreter (on ARM Linux this is usually ld-linux.so.2,
- but it does not have to be). On the first invocation, the function
- is located and the GOT entry is replaced with the real function
- address. Subsequent calls go through steps 1, 2 and 3 and end up
- calling the real code.
+ program interpreter (on ARM GNU/Linux this is usually
+ ld-linux.so.2, but it does not have to be). On the first
+ invocation, the function is located and the GOT entry is replaced
+ with the real function address. Subsequent calls go through steps
+ 1, 2 and 3 and end up calling the real code.
1) In the code:
with. Before the fixup/resolver code returns, it actually calls
the requested function and repairs &GOT[n+3]. */
-/* Find the minimal symbol named NAME, and return both the minsym
- struct and its objfile. This probably ought to be in minsym.c, but
- everything there is trying to deal with things like C++ and
- SOFUN_ADDRESS_MAYBE_TURQUOISE, ... Since this is so simple, it may
- be considered too special-purpose for general consumption. */
+/* The constants below were determined by examining the following files
+ in the linux kernel sources:
+
+ arch/arm/kernel/signal.c
+ - see SWI_SYS_SIGRETURN and SWI_SYS_RT_SIGRETURN
+ include/asm-arm/unistd.h
+ - see __NR_sigreturn, __NR_rt_sigreturn, and __NR_SYSCALL_BASE */
+
+#define ARM_LINUX_SIGRETURN_INSTR 0xef900077
+#define ARM_LINUX_RT_SIGRETURN_INSTR 0xef9000ad
+
+/* For ARM EABI, the syscall number is not in the SWI instruction
+ (instead it is loaded into r7). We recognize the pattern that
+ glibc uses... alternatively, we could arrange to do this by
+ function name, but they are not always exported. */
+#define ARM_SET_R7_SIGRETURN 0xe3a07077
+#define ARM_SET_R7_RT_SIGRETURN 0xe3a070ad
+#define ARM_EABI_SYSCALL 0xef000000
+
+/* OABI syscall restart trampoline, used for EABI executables too
+ whenever OABI support has been enabled in the kernel. */
+#define ARM_OABI_SYSCALL_RESTART_SYSCALL 0xef900000
+#define ARM_LDR_PC_SP_12 0xe49df00c
+
+static void
+arm_linux_sigtramp_cache (struct frame_info *this_frame,
+ struct trad_frame_cache *this_cache,
+ CORE_ADDR func, int regs_offset)
+{
+ CORE_ADDR sp = get_frame_register_unsigned (this_frame, ARM_SP_REGNUM);
+ CORE_ADDR base = sp + regs_offset;
+ int i;
+
+ for (i = 0; i < 16; i++)
+ trad_frame_set_reg_addr (this_cache, i, base + i * 4);
+
+ trad_frame_set_reg_addr (this_cache, ARM_PS_REGNUM, base + 16 * 4);
+
+ /* The VFP or iWMMXt registers may be saved on the stack, but there's
+ no reliable way to restore them (yet). */
+
+ /* Save a frame ID. */
+ trad_frame_set_id (this_cache, frame_id_build (sp, func));
+}
+
+/* There are a couple of different possible stack layouts that
+ we need to support.
+
+ Before version 2.6.18, the kernel used completely independent
+ layouts for non-RT and RT signals. For non-RT signals the stack
+ began directly with a struct sigcontext. For RT signals the stack
+ began with two redundant pointers (to the siginfo and ucontext),
+ and then the siginfo and ucontext.
+
+ As of version 2.6.18, the non-RT signal frame layout starts with
+ a ucontext and the RT signal frame starts with a siginfo and then
+ a ucontext. Also, the ucontext now has a designated save area
+ for coprocessor registers.
+
+ For RT signals, it's easy to tell the difference: we look for
+ pinfo, the pointer to the siginfo. If it has the expected
+ value, we have an old layout. If it doesn't, we have the new
+ layout.
+
+ For non-RT signals, it's a bit harder. We need something in one
+ layout or the other with a recognizable offset and value. We can't
+ use the return trampoline, because ARM usually uses SA_RESTORER,
+ in which case the stack return trampoline is not filled in.
+ We can't use the saved stack pointer, because sigaltstack might
+ be in use. So for now we guess the new layout... */
+
+/* There are three words (trap_no, error_code, oldmask) in
+ struct sigcontext before r0. */
+#define ARM_SIGCONTEXT_R0 0xc
+
+/* There are five words (uc_flags, uc_link, and three for uc_stack)
+ in the ucontext_t before the sigcontext. */
+#define ARM_UCONTEXT_SIGCONTEXT 0x14
+
+/* There are three elements in an rt_sigframe before the ucontext:
+ pinfo, puc, and info. The first two are pointers and the third
+ is a struct siginfo, with size 128 bytes. We could follow puc
+ to the ucontext, but it's simpler to skip the whole thing. */
+#define ARM_OLD_RT_SIGFRAME_SIGINFO 0x8
+#define ARM_OLD_RT_SIGFRAME_UCONTEXT 0x88
+
+#define ARM_NEW_RT_SIGFRAME_UCONTEXT 0x80
+
+#define ARM_NEW_SIGFRAME_MAGIC 0x5ac3c35a
+
+static void
+arm_linux_sigreturn_init (const struct tramp_frame *self,
+ struct frame_info *this_frame,
+ struct trad_frame_cache *this_cache,
+ CORE_ADDR func)
+{
+ struct gdbarch *gdbarch = get_frame_arch (this_frame);
+ enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
+ CORE_ADDR sp = get_frame_register_unsigned (this_frame, ARM_SP_REGNUM);
+ ULONGEST uc_flags = read_memory_unsigned_integer (sp, 4, byte_order);
+
+ if (uc_flags == ARM_NEW_SIGFRAME_MAGIC)
+ arm_linux_sigtramp_cache (this_frame, this_cache, func,
+ ARM_UCONTEXT_SIGCONTEXT
+ + ARM_SIGCONTEXT_R0);
+ else
+ arm_linux_sigtramp_cache (this_frame, this_cache, func,
+ ARM_SIGCONTEXT_R0);
+}
+
+static void
+arm_linux_rt_sigreturn_init (const struct tramp_frame *self,
+ struct frame_info *this_frame,
+ struct trad_frame_cache *this_cache,
+ CORE_ADDR func)
+{
+ struct gdbarch *gdbarch = get_frame_arch (this_frame);
+ enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
+ CORE_ADDR sp = get_frame_register_unsigned (this_frame, ARM_SP_REGNUM);
+ ULONGEST pinfo = read_memory_unsigned_integer (sp, 4, byte_order);
+
+ if (pinfo == sp + ARM_OLD_RT_SIGFRAME_SIGINFO)
+ arm_linux_sigtramp_cache (this_frame, this_cache, func,
+ ARM_OLD_RT_SIGFRAME_UCONTEXT
+ + ARM_UCONTEXT_SIGCONTEXT
+ + ARM_SIGCONTEXT_R0);
+ else
+ arm_linux_sigtramp_cache (this_frame, this_cache, func,
+ ARM_NEW_RT_SIGFRAME_UCONTEXT
+ + ARM_UCONTEXT_SIGCONTEXT
+ + ARM_SIGCONTEXT_R0);
+}
-static struct minimal_symbol *
-find_minsym_and_objfile (char *name, struct objfile **objfile_p)
+static void
+arm_linux_restart_syscall_init (const struct tramp_frame *self,
+ struct frame_info *this_frame,
+ struct trad_frame_cache *this_cache,
+ CORE_ADDR func)
{
- struct objfile *objfile;
+ CORE_ADDR sp = get_frame_register_unsigned (this_frame, ARM_SP_REGNUM);
+
+ trad_frame_set_reg_addr (this_cache, ARM_PC_REGNUM, sp);
+ trad_frame_set_reg_value (this_cache, ARM_SP_REGNUM, sp + 12);
+
+ /* Save a frame ID. */
+ trad_frame_set_id (this_cache, frame_id_build (sp, func));
+}
+
+static struct tramp_frame arm_linux_sigreturn_tramp_frame = {
+ SIGTRAMP_FRAME,
+ 4,
+ {
+ { ARM_LINUX_SIGRETURN_INSTR, -1 },
+ { TRAMP_SENTINEL_INSN }
+ },
+ arm_linux_sigreturn_init
+};
+
+static struct tramp_frame arm_linux_rt_sigreturn_tramp_frame = {
+ SIGTRAMP_FRAME,
+ 4,
+ {
+ { ARM_LINUX_RT_SIGRETURN_INSTR, -1 },
+ { TRAMP_SENTINEL_INSN }
+ },
+ arm_linux_rt_sigreturn_init
+};
+
+static struct tramp_frame arm_eabi_linux_sigreturn_tramp_frame = {
+ SIGTRAMP_FRAME,
+ 4,
+ {
+ { ARM_SET_R7_SIGRETURN, -1 },
+ { ARM_EABI_SYSCALL, -1 },
+ { TRAMP_SENTINEL_INSN }
+ },
+ arm_linux_sigreturn_init
+};
+
+static struct tramp_frame arm_eabi_linux_rt_sigreturn_tramp_frame = {
+ SIGTRAMP_FRAME,
+ 4,
+ {
+ { ARM_SET_R7_RT_SIGRETURN, -1 },
+ { ARM_EABI_SYSCALL, -1 },
+ { TRAMP_SENTINEL_INSN }
+ },
+ arm_linux_rt_sigreturn_init
+};
- ALL_OBJFILES (objfile)
+static struct tramp_frame arm_linux_restart_syscall_tramp_frame = {
+ NORMAL_FRAME,
+ 4,
+ {
+ { ARM_OABI_SYSCALL_RESTART_SYSCALL, -1 },
+ { ARM_LDR_PC_SP_12, -1 },
+ { TRAMP_SENTINEL_INSN }
+ },
+ arm_linux_restart_syscall_init
+};
+
+/* Core file and register set support. */
+
+#define ARM_LINUX_SIZEOF_GREGSET (18 * INT_REGISTER_SIZE)
+
+void
+arm_linux_supply_gregset (const struct regset *regset,
+ struct regcache *regcache,
+ int regnum, const void *gregs_buf, size_t len)
+{
+ struct gdbarch *gdbarch = get_regcache_arch (regcache);
+ enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
+ const gdb_byte *gregs = gregs_buf;
+ int regno;
+ CORE_ADDR reg_pc;
+ gdb_byte pc_buf[INT_REGISTER_SIZE];
+
+ for (regno = ARM_A1_REGNUM; regno < ARM_PC_REGNUM; regno++)
+ if (regnum == -1 || regnum == regno)
+ regcache_raw_supply (regcache, regno,
+ gregs + INT_REGISTER_SIZE * regno);
+
+ if (regnum == ARM_PS_REGNUM || regnum == -1)
{
- struct minimal_symbol *msym;
+ if (arm_apcs_32)
+ regcache_raw_supply (regcache, ARM_PS_REGNUM,
+ gregs + INT_REGISTER_SIZE * ARM_CPSR_GREGNUM);
+ else
+ regcache_raw_supply (regcache, ARM_PS_REGNUM,
+ gregs + INT_REGISTER_SIZE * ARM_PC_REGNUM);
+ }
- ALL_OBJFILE_MSYMBOLS (objfile, msym)
- {
- if (SYMBOL_NAME (msym)
- && STREQ (SYMBOL_NAME (msym), name))
- {
- *objfile_p = objfile;
- return msym;
- }
- }
+ if (regnum == ARM_PC_REGNUM || regnum == -1)
+ {
+ reg_pc = extract_unsigned_integer (gregs
+ + INT_REGISTER_SIZE * ARM_PC_REGNUM,
+ INT_REGISTER_SIZE, byte_order);
+ reg_pc = gdbarch_addr_bits_remove (gdbarch, reg_pc);
+ store_unsigned_integer (pc_buf, INT_REGISTER_SIZE, byte_order, reg_pc);
+ regcache_raw_supply (regcache, ARM_PC_REGNUM, pc_buf);
}
+}
- return 0;
+void
+arm_linux_collect_gregset (const struct regset *regset,
+ const struct regcache *regcache,
+ int regnum, void *gregs_buf, size_t len)
+{
+ gdb_byte *gregs = gregs_buf;
+ int regno;
+
+ for (regno = ARM_A1_REGNUM; regno < ARM_PC_REGNUM; regno++)
+ if (regnum == -1 || regnum == regno)
+ regcache_raw_collect (regcache, regno,
+ gregs + INT_REGISTER_SIZE * regno);
+
+ if (regnum == ARM_PS_REGNUM || regnum == -1)
+ {
+ if (arm_apcs_32)
+ regcache_raw_collect (regcache, ARM_PS_REGNUM,
+ gregs + INT_REGISTER_SIZE * ARM_CPSR_GREGNUM);
+ else
+ regcache_raw_collect (regcache, ARM_PS_REGNUM,
+ gregs + INT_REGISTER_SIZE * ARM_PC_REGNUM);
+ }
+
+ if (regnum == ARM_PC_REGNUM || regnum == -1)
+ regcache_raw_collect (regcache, ARM_PC_REGNUM,
+ gregs + INT_REGISTER_SIZE * ARM_PC_REGNUM);
}
+/* Support for register format used by the NWFPE FPA emulator. */
-static CORE_ADDR
-skip_hurd_resolver (CORE_ADDR pc)
+#define typeNone 0x00
+#define typeSingle 0x01
+#define typeDouble 0x02
+#define typeExtended 0x03
+
+void
+supply_nwfpe_register (struct regcache *regcache, int regno,
+ const gdb_byte *regs)
{
- /* The HURD dynamic linker is part of the GNU C library, so many
- GNU/Linux distributions use it. (All ELF versions, as far as I
- know.) An unresolved PLT entry points to "_dl_runtime_resolve",
- which calls "fixup" to patch the PLT, and then passes control to
- the function.
-
- We look for the symbol `_dl_runtime_resolve', and find `fixup' in
- the same objfile. If we are at the entry point of `fixup', then
- we set a breakpoint at the return address (at the top of the
- stack), and continue.
-
- It's kind of gross to do all these checks every time we're
- called, since they don't change once the executable has gotten
- started. But this is only a temporary hack --- upcoming versions
- of Linux will provide a portable, efficient interface for
- debugging programs that use shared libraries. */
+ const gdb_byte *reg_data;
+ gdb_byte reg_tag;
+ gdb_byte buf[FP_REGISTER_SIZE];
+
+ reg_data = regs + (regno - ARM_F0_REGNUM) * FP_REGISTER_SIZE;
+ reg_tag = regs[(regno - ARM_F0_REGNUM) + NWFPE_TAGS_OFFSET];
+ memset (buf, 0, FP_REGISTER_SIZE);
+
+ switch (reg_tag)
+ {
+ case typeSingle:
+ memcpy (buf, reg_data, 4);
+ break;
+ case typeDouble:
+ memcpy (buf, reg_data + 4, 4);
+ memcpy (buf + 4, reg_data, 4);
+ break;
+ case typeExtended:
+ /* We want sign and exponent, then least significant bits,
+ then most significant. NWFPE does sign, most, least. */
+ memcpy (buf, reg_data, 4);
+ memcpy (buf + 4, reg_data + 8, 4);
+ memcpy (buf + 8, reg_data + 4, 4);
+ break;
+ default:
+ break;
+ }
+
+ regcache_raw_supply (regcache, regno, buf);
+}
+
+void
+collect_nwfpe_register (const struct regcache *regcache, int regno,
+ gdb_byte *regs)
+{
+ gdb_byte *reg_data;
+ gdb_byte reg_tag;
+ gdb_byte buf[FP_REGISTER_SIZE];
+
+ regcache_raw_collect (regcache, regno, buf);
+
+ /* NOTE drow/2006-06-07: This code uses the tag already in the
+ register buffer. I've preserved that when moving the code
+ from the native file to the target file. But this doesn't
+ always make sense. */
+
+ reg_data = regs + (regno - ARM_F0_REGNUM) * FP_REGISTER_SIZE;
+ reg_tag = regs[(regno - ARM_F0_REGNUM) + NWFPE_TAGS_OFFSET];
+
+ switch (reg_tag)
+ {
+ case typeSingle:
+ memcpy (reg_data, buf, 4);
+ break;
+ case typeDouble:
+ memcpy (reg_data, buf + 4, 4);
+ memcpy (reg_data + 4, buf, 4);
+ break;
+ case typeExtended:
+ memcpy (reg_data, buf, 4);
+ memcpy (reg_data + 4, buf + 8, 4);
+ memcpy (reg_data + 8, buf + 4, 4);
+ break;
+ default:
+ break;
+ }
+}
+
+void
+arm_linux_supply_nwfpe (const struct regset *regset,
+ struct regcache *regcache,
+ int regnum, const void *regs_buf, size_t len)
+{
+ const gdb_byte *regs = regs_buf;
+ int regno;
+
+ if (regnum == ARM_FPS_REGNUM || regnum == -1)
+ regcache_raw_supply (regcache, ARM_FPS_REGNUM,
+ regs + NWFPE_FPSR_OFFSET);
+
+ for (regno = ARM_F0_REGNUM; regno <= ARM_F7_REGNUM; regno++)
+ if (regnum == -1 || regnum == regno)
+ supply_nwfpe_register (regcache, regno, regs);
+}
- struct objfile *objfile;
- struct minimal_symbol *resolver
- = find_minsym_and_objfile ("_dl_runtime_resolve", &objfile);
+void
+arm_linux_collect_nwfpe (const struct regset *regset,
+ const struct regcache *regcache,
+ int regnum, void *regs_buf, size_t len)
+{
+ gdb_byte *regs = regs_buf;
+ int regno;
- if (resolver)
+ for (regno = ARM_F0_REGNUM; regno <= ARM_F7_REGNUM; regno++)
+ if (regnum == -1 || regnum == regno)
+ collect_nwfpe_register (regcache, regno, regs);
+
+ if (regnum == ARM_FPS_REGNUM || regnum == -1)
+ regcache_raw_collect (regcache, ARM_FPS_REGNUM,
+ regs + INT_REGISTER_SIZE * ARM_FPS_REGNUM);
+}
+
+/* Return the appropriate register set for the core section identified
+ by SECT_NAME and SECT_SIZE. */
+
+static const struct regset *
+arm_linux_regset_from_core_section (struct gdbarch *gdbarch,
+ const char *sect_name, size_t sect_size)
+{
+ struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
+
+ if (strcmp (sect_name, ".reg") == 0
+ && sect_size == ARM_LINUX_SIZEOF_GREGSET)
{
- struct minimal_symbol *fixup
- = lookup_minimal_symbol ("fixup", NULL, objfile);
+ if (tdep->gregset == NULL)
+ tdep->gregset = regset_alloc (gdbarch, arm_linux_supply_gregset,
+ arm_linux_collect_gregset);
+ return tdep->gregset;
+ }
- if (fixup && SYMBOL_VALUE_ADDRESS (fixup) == pc)
- return (SAVED_PC_AFTER_CALL (get_current_frame ()));
+ if (strcmp (sect_name, ".reg2") == 0
+ && sect_size == ARM_LINUX_SIZEOF_NWFPE)
+ {
+ if (tdep->fpregset == NULL)
+ tdep->fpregset = regset_alloc (gdbarch, arm_linux_supply_nwfpe,
+ arm_linux_collect_nwfpe);
+ return tdep->fpregset;
}
+ return NULL;
+}
+
+/* Copy the value of next pc of sigreturn and rt_sigrturn into PC,
+ and return 1. Return 0 if it is not a rt_sigreturn/sigreturn
+ syscall. */
+static int
+arm_linux_sigreturn_return_addr (struct frame_info *frame,
+ unsigned long svc_number,
+ CORE_ADDR *pc)
+{
+ /* Is this a sigreturn or rt_sigreturn syscall? */
+ if (svc_number == 119 || svc_number == 173)
+ {
+ if (get_frame_type (frame) == SIGTRAMP_FRAME)
+ {
+ *pc = frame_unwind_caller_pc (frame);
+ return 1;
+ }
+ }
return 0;
-}
+}
-/* See the comments for SKIP_SOLIB_RESOLVER at the top of infrun.c.
- This function:
- 1) decides whether a PLT has sent us into the linker to resolve
- a function reference, and
- 2) if so, tells us where to set a temporary breakpoint that will
- trigger when the dynamic linker is done. */
+/* When FRAME is at a syscall instruction, return the PC of the next
+ instruction to be executed. */
-CORE_ADDR
-arm_linux_skip_solib_resolver (CORE_ADDR pc)
+static CORE_ADDR
+arm_linux_syscall_next_pc (struct frame_info *frame)
{
- CORE_ADDR result;
+ CORE_ADDR pc = get_frame_pc (frame);
+ CORE_ADDR return_addr = 0;
+ int is_thumb = arm_frame_is_thumb (frame);
+ ULONGEST svc_number = 0;
+ int is_sigreturn = 0;
+
+ if (is_thumb)
+ {
+ svc_number = get_frame_register_unsigned (frame, 7);
+ }
+ else
+ {
+ struct gdbarch *gdbarch = get_frame_arch (frame);
+ enum bfd_endian byte_order_for_code =
+ gdbarch_byte_order_for_code (gdbarch);
+ unsigned long this_instr =
+ read_memory_unsigned_integer (pc, 4, byte_order_for_code);
+
+ unsigned long svc_operand = (0x00ffffff & this_instr);
+ if (svc_operand) /* OABI. */
+ {
+ svc_number = svc_operand - 0x900000;
+ }
+ else /* EABI. */
+ {
+ svc_number = get_frame_register_unsigned (frame, 7);
+ }
+ }
- /* Plug in functions for other kinds of resolvers here. */
- result = skip_hurd_resolver (pc);
+ is_sigreturn = arm_linux_sigreturn_return_addr (frame, svc_number,
+ &return_addr);
- if (result)
- return result;
+ if (is_sigreturn)
+ return return_addr;
- return 0;
+ if (is_thumb)
+ {
+ return_addr = pc + 2;
+ /* Addresses for calling Thumb functions have the bit 0 set. */
+ return_addr |= 1;
+ }
+ else
+ {
+ return_addr = pc + 4;
+ }
+
+ return return_addr;
}
-/* The constants below were determined by examining the following files
- in the linux kernel sources:
- arch/arm/kernel/signal.c
- - see SWI_SYS_SIGRETURN and SWI_SYS_RT_SIGRETURN
- include/asm-arm/unistd.h
- - see __NR_sigreturn, __NR_rt_sigreturn, and __NR_SYSCALL_BASE */
+/* Insert a single step breakpoint at the next executed instruction. */
-#define ARM_LINUX_SIGRETURN_INSTR 0xef900077
-#define ARM_LINUX_RT_SIGRETURN_INSTR 0xef9000ad
+static int
+arm_linux_software_single_step (struct frame_info *frame)
+{
+ struct gdbarch *gdbarch = get_frame_arch (frame);
+ struct address_space *aspace = get_frame_address_space (frame);
+ CORE_ADDR next_pc = arm_get_next_pc (frame, get_frame_pc (frame));
+
+ /* The Linux kernel offers some user-mode helpers in a high page. We can
+ not read this page (as of 2.6.23), and even if we could then we couldn't
+ set breakpoints in it, and even if we could then the atomic operations
+ would fail when interrupted. They are all called as functions and return
+ to the address in LR, so step to there instead. */
+ if (next_pc > 0xffff0000)
+ next_pc = get_frame_register_unsigned (frame, ARM_LR_REGNUM);
+
+ insert_single_step_breakpoint (gdbarch, aspace, next_pc);
+
+ return 1;
+}
+
+/* Support for displaced stepping of Linux SVC instructions. */
+
+static void
+arm_linux_cleanup_svc (struct gdbarch *gdbarch,
+ struct regcache *regs,
+ struct displaced_step_closure *dsc)
+{
+ CORE_ADDR from = dsc->insn_addr;
+ ULONGEST apparent_pc;
+ int within_scratch;
+
+ regcache_cooked_read_unsigned (regs, ARM_PC_REGNUM, &apparent_pc);
+
+ within_scratch = (apparent_pc >= dsc->scratch_base
+ && apparent_pc < (dsc->scratch_base
+ + DISPLACED_MODIFIED_INSNS * 4 + 4));
+
+ if (debug_displaced)
+ {
+ fprintf_unfiltered (gdb_stdlog, "displaced: PC is apparently %.8lx after "
+ "SVC step ", (unsigned long) apparent_pc);
+ if (within_scratch)
+ fprintf_unfiltered (gdb_stdlog, "(within scratch space)\n");
+ else
+ fprintf_unfiltered (gdb_stdlog, "(outside scratch space)\n");
+ }
-/* arm_linux_in_sigtramp determines if PC points at one of the
- instructions which cause control to return to the Linux kernel upon
- return from a signal handler. FUNC_NAME is unused. */
+ if (within_scratch)
+ displaced_write_reg (regs, dsc, ARM_PC_REGNUM, from + 4, BRANCH_WRITE_PC);
+}
-int
-arm_linux_in_sigtramp (CORE_ADDR pc, char *func_name)
+static int
+arm_linux_copy_svc (struct gdbarch *gdbarch, uint32_t insn, CORE_ADDR to,
+ struct regcache *regs, struct displaced_step_closure *dsc)
{
- unsigned long inst;
+ CORE_ADDR from = dsc->insn_addr;
+ CORE_ADDR return_to = 0;
+
+ struct frame_info *frame;
+ unsigned int svc_number = displaced_read_reg (regs, from, 7);
+ int is_sigreturn = 0;
+
+ if (debug_displaced)
+ fprintf_unfiltered (gdb_stdlog, "displaced: copying Linux svc insn %.8lx\n",
+ (unsigned long) insn);
+
+ frame = get_current_frame ();
+
+ is_sigreturn = arm_linux_sigreturn_return_addr(frame, svc_number,
+ &return_to);
+ if (is_sigreturn)
+ {
+ struct symtab_and_line sal;
+
+ if (debug_displaced)
+ fprintf_unfiltered (gdb_stdlog, "displaced: found "
+ "sigreturn/rt_sigreturn SVC call. PC in frame = %lx\n",
+ (unsigned long) get_frame_pc (frame));
+
+ if (debug_displaced)
+ fprintf_unfiltered (gdb_stdlog, "displaced: unwind pc = %lx. "
+ "Setting momentary breakpoint.\n", (unsigned long) return_to);
+
+ gdb_assert (inferior_thread ()->step_resume_breakpoint == NULL);
+
+ sal = find_pc_line (return_to, 0);
+ sal.pc = return_to;
+ sal.section = find_pc_overlay (return_to);
+ sal.explicit_pc = 1;
+
+ frame = get_prev_frame (frame);
+
+ if (frame)
+ {
+ inferior_thread ()->step_resume_breakpoint
+ = set_momentary_breakpoint (gdbarch, sal, get_frame_id (frame),
+ bp_step_resume);
+
+ /* We need to make sure we actually insert the momentary
+ breakpoint set above. */
+ insert_breakpoints ();
+ }
+ else if (debug_displaced)
+ fprintf_unfiltered (gdb_stderr, "displaced: couldn't find previous "
+ "frame to set momentary breakpoint for "
+ "sigreturn/rt_sigreturn\n");
+ }
+ else if (debug_displaced)
+ fprintf_unfiltered (gdb_stdlog, "displaced: sigreturn/rt_sigreturn "
+ "SVC call not in signal trampoline frame\n");
+
- inst = read_memory_integer (pc, 4);
+ /* Preparation: If we detect sigreturn, set momentary breakpoint at resume
+ location, else nothing.
+ Insn: unmodified svc.
+ Cleanup: if pc lands in scratch space, pc <- insn_addr + 4
+ else leave pc alone. */
- return (inst == ARM_LINUX_SIGRETURN_INSTR
- || inst == ARM_LINUX_RT_SIGRETURN_INSTR);
+ dsc->modinsn[0] = insn;
+ dsc->cleanup = &arm_linux_cleanup_svc;
+ /* Pretend we wrote to the PC, so cleanup doesn't set PC to the next
+ instruction. */
+ dsc->wrote_to_pc = 1;
+
+ return 0;
}
-/* arm_linux_sigcontext_register_address returns the address in the
- sigcontext of register REGNO given a stack pointer value SP and
- program counter value PC. The value 0 is returned if PC is not
- pointing at one of the signal return instructions or if REGNO is
- not saved in the sigcontext struct. */
-CORE_ADDR
-arm_linux_sigcontext_register_address (CORE_ADDR sp, CORE_ADDR pc, int regno)
+/* The following two functions implement single-stepping over calls to Linux
+ kernel helper routines, which perform e.g. atomic operations on architecture
+ variants which don't support them natively.
+
+ When this function is called, the PC will be pointing at the kernel helper
+ (at an address inaccessible to GDB), and r14 will point to the return
+ address. Displaced stepping always executes code in the copy area:
+ so, make the copy-area instruction branch back to the kernel helper (the
+ "from" address), and make r14 point to the breakpoint in the copy area. In
+ that way, we regain control once the kernel helper returns, and can clean
+ up appropriately (as if we had just returned from the kernel helper as it
+ would have been called from the non-displaced location). */
+
+static void
+cleanup_kernel_helper_return (struct gdbarch *gdbarch,
+ struct regcache *regs,
+ struct displaced_step_closure *dsc)
+{
+ displaced_write_reg (regs, dsc, ARM_LR_REGNUM, dsc->tmp[0], CANNOT_WRITE_PC);
+ displaced_write_reg (regs, dsc, ARM_PC_REGNUM, dsc->tmp[0], BRANCH_WRITE_PC);
+}
+
+static void
+arm_catch_kernel_helper_return (struct gdbarch *gdbarch, CORE_ADDR from,
+ CORE_ADDR to, struct regcache *regs,
+ struct displaced_step_closure *dsc)
+{
+ enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
+
+ dsc->numinsns = 1;
+ dsc->insn_addr = from;
+ dsc->cleanup = &cleanup_kernel_helper_return;
+ /* Say we wrote to the PC, else cleanup will set PC to the next
+ instruction in the helper, which isn't helpful. */
+ dsc->wrote_to_pc = 1;
+
+ /* Preparation: tmp[0] <- r14
+ r14 <- <scratch space>+4
+ *(<scratch space>+8) <- from
+ Insn: ldr pc, [r14, #4]
+ Cleanup: r14 <- tmp[0], pc <- tmp[0]. */
+
+ dsc->tmp[0] = displaced_read_reg (regs, from, ARM_LR_REGNUM);
+ displaced_write_reg (regs, dsc, ARM_LR_REGNUM, (ULONGEST) to + 4,
+ CANNOT_WRITE_PC);
+ write_memory_unsigned_integer (to + 8, 4, byte_order, from);
+
+ dsc->modinsn[0] = 0xe59ef004; /* ldr pc, [lr, #4]. */
+}
+
+/* Linux-specific displaced step instruction copying function. Detects when
+ the program has stepped into a Linux kernel helper routine (which must be
+ handled as a special case), falling back to arm_displaced_step_copy_insn()
+ if it hasn't. */
+
+static struct displaced_step_closure *
+arm_linux_displaced_step_copy_insn (struct gdbarch *gdbarch,
+ CORE_ADDR from, CORE_ADDR to,
+ struct regcache *regs)
+{
+ struct displaced_step_closure *dsc
+ = xmalloc (sizeof (struct displaced_step_closure));
+
+ /* Detect when we enter an (inaccessible by GDB) Linux kernel helper, and
+ stop at the return location. */
+ if (from > 0xffff0000)
+ {
+ if (debug_displaced)
+ fprintf_unfiltered (gdb_stdlog, "displaced: detected kernel helper "
+ "at %.8lx\n", (unsigned long) from);
+
+ arm_catch_kernel_helper_return (gdbarch, from, to, regs, dsc);
+ }
+ else
+ {
+ enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
+ uint32_t insn = read_memory_unsigned_integer (from, 4, byte_order);
+
+ if (debug_displaced)
+ fprintf_unfiltered (gdb_stdlog, "displaced: stepping insn %.8lx "
+ "at %.8lx\n", (unsigned long) insn,
+ (unsigned long) from);
+
+ /* Override the default handling of SVC instructions. */
+ dsc->u.svc.copy_svc_os = arm_linux_copy_svc;
+
+ arm_process_displaced_insn (gdbarch, insn, from, to, regs, dsc);
+ }
+
+ arm_displaced_init_closure (gdbarch, from, to, dsc);
+
+ return dsc;
+}
+
+static void
+arm_linux_init_abi (struct gdbarch_info info,
+ struct gdbarch *gdbarch)
{
- unsigned long inst;
- CORE_ADDR reg_addr = 0;
+ struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
+
+ linux_init_abi (info, gdbarch);
+
+ tdep->lowest_pc = 0x8000;
+ if (info.byte_order == BFD_ENDIAN_BIG)
+ {
+ if (tdep->arm_abi == ARM_ABI_AAPCS)
+ tdep->arm_breakpoint = eabi_linux_arm_be_breakpoint;
+ else
+ tdep->arm_breakpoint = arm_linux_arm_be_breakpoint;
+ tdep->thumb_breakpoint = arm_linux_thumb_be_breakpoint;
+ tdep->thumb2_breakpoint = arm_linux_thumb2_be_breakpoint;
+ }
+ else
+ {
+ if (tdep->arm_abi == ARM_ABI_AAPCS)
+ tdep->arm_breakpoint = eabi_linux_arm_le_breakpoint;
+ else
+ tdep->arm_breakpoint = arm_linux_arm_le_breakpoint;
+ tdep->thumb_breakpoint = arm_linux_thumb_le_breakpoint;
+ tdep->thumb2_breakpoint = arm_linux_thumb2_le_breakpoint;
+ }
+ tdep->arm_breakpoint_size = sizeof (arm_linux_arm_le_breakpoint);
+ tdep->thumb_breakpoint_size = sizeof (arm_linux_thumb_le_breakpoint);
+ tdep->thumb2_breakpoint_size = sizeof (arm_linux_thumb2_le_breakpoint);
- inst = read_memory_integer (pc, 4);
+ if (tdep->fp_model == ARM_FLOAT_AUTO)
+ tdep->fp_model = ARM_FLOAT_FPA;
- if (inst == ARM_LINUX_SIGRETURN_INSTR || inst == ARM_LINUX_RT_SIGRETURN_INSTR)
+ switch (tdep->fp_model)
{
- CORE_ADDR sigcontext_addr;
-
- /* The sigcontext structure is at different places for the two
- signal return instructions. For ARM_LINUX_SIGRETURN_INSTR,
- it starts at the SP value. For ARM_LINUX_RT_SIGRETURN_INSTR,
- it is at SP+8. For the latter instruction, it may also be
- the case that the address of this structure may be determined
- by reading the 4 bytes at SP, but I'm not convinced this is
- reliable.
-
- In any event, these magic constants (0 and 8) may be
- determined by examining struct sigframe and struct
- rt_sigframe in arch/arm/kernel/signal.c in the Linux kernel
- sources. */
-
- if (inst == ARM_LINUX_RT_SIGRETURN_INSTR)
- sigcontext_addr = sp + 8;
- else /* inst == ARM_LINUX_SIGRETURN_INSTR */
- sigcontext_addr = sp + 0;
-
- /* The layout of the sigcontext structure for ARM GNU/Linux is
- in include/asm-arm/sigcontext.h in the Linux kernel sources.
-
- There are three 4-byte fields which precede the saved r0
- field. (This accounts for the 12 in the code below.) The
- sixteen registers (4 bytes per field) follow in order. The
- PSR value follows the sixteen registers which accounts for
- the constant 19 below. */
-
- if (0 <= regno && regno <= ARM_PC_REGNUM)
- reg_addr = sigcontext_addr + 12 + (4 * regno);
- else if (regno == ARM_PS_REGNUM)
- reg_addr = sigcontext_addr + 19 * 4;
+ case ARM_FLOAT_FPA:
+ tdep->jb_pc = ARM_LINUX_JB_PC_FPA;
+ break;
+ case ARM_FLOAT_SOFT_FPA:
+ case ARM_FLOAT_SOFT_VFP:
+ case ARM_FLOAT_VFP:
+ tdep->jb_pc = ARM_LINUX_JB_PC_EABI;
+ break;
+ default:
+ internal_error
+ (__FILE__, __LINE__,
+ _("arm_linux_init_abi: Floating point model not supported"));
+ break;
}
+ tdep->jb_elt_size = ARM_LINUX_JB_ELEMENT_SIZE;
+
+ set_solib_svr4_fetch_link_map_offsets
+ (gdbarch, svr4_ilp32_fetch_link_map_offsets);
+
+ /* Single stepping. */
+ set_gdbarch_software_single_step (gdbarch, arm_linux_software_single_step);
+
+ /* Shared library handling. */
+ set_gdbarch_skip_trampoline_code (gdbarch, find_solib_trampoline_target);
+ set_gdbarch_skip_solib_resolver (gdbarch, glibc_skip_solib_resolver);
- return reg_addr;
+ /* Enable TLS support. */
+ set_gdbarch_fetch_tls_load_module_address (gdbarch,
+ svr4_fetch_objfile_link_map);
+
+ tramp_frame_prepend_unwinder (gdbarch,
+ &arm_linux_sigreturn_tramp_frame);
+ tramp_frame_prepend_unwinder (gdbarch,
+ &arm_linux_rt_sigreturn_tramp_frame);
+ tramp_frame_prepend_unwinder (gdbarch,
+ &arm_eabi_linux_sigreturn_tramp_frame);
+ tramp_frame_prepend_unwinder (gdbarch,
+ &arm_eabi_linux_rt_sigreturn_tramp_frame);
+ tramp_frame_prepend_unwinder (gdbarch,
+ &arm_linux_restart_syscall_tramp_frame);
+
+ /* Core file support. */
+ set_gdbarch_regset_from_core_section (gdbarch,
+ arm_linux_regset_from_core_section);
+
+ set_gdbarch_get_siginfo_type (gdbarch, linux_get_siginfo_type);
+
+ /* Displaced stepping. */
+ set_gdbarch_displaced_step_copy_insn (gdbarch,
+ arm_linux_displaced_step_copy_insn);
+ set_gdbarch_displaced_step_fixup (gdbarch, arm_displaced_step_fixup);
+ set_gdbarch_displaced_step_free_closure (gdbarch,
+ simple_displaced_step_free_closure);
+ set_gdbarch_displaced_step_location (gdbarch, displaced_step_at_entry_point);
+
+
+ tdep->syscall_next_pc = arm_linux_syscall_next_pc;
}
+/* Provide a prototype to silence -Wmissing-prototypes. */
+extern initialize_file_ftype _initialize_arm_linux_tdep;
+
void
_initialize_arm_linux_tdep (void)
{
+ gdbarch_register_osabi (bfd_arch_arm, 0, GDB_OSABI_LINUX,
+ arm_linux_init_abi);
}
projects / deliverable / binutils-gdb.git / blobdiff