gdb/doc: space out list entries, fix one type

[deliverable/binutils-gdb.git] / gdb / arm-tdep.c

diff --git a/gdb/arm-tdep.c b/gdb/arm-tdep.c
index 1eeaea32dc66e2071b7333d30449a787cfc768b3..a214f22d7ad10740c67509c4018b4494c5e7f7fe 100644 (file)
--- a/gdb/arm-tdep.c
+++ b/gdb/arm-tdep.c
@@ -461,7 +461,7 @@ arm_pc_is_thumb (struct gdbarch *gdbarch, CORE_ADDR memaddr)
      "display/i $pc" always show the correct mode (though if there is
      a symbol table we will not reach here, so it still may not be
      displayed in the mode it will be executed).  */
-  if (target_has_registers)
+  if (target_has_registers ())
     return arm_frame_is_thumb (get_current_frame ());
 
   /* Otherwise we're out of luck; we assume ARM.  */
@@ -3417,7 +3417,7 @@ static ULONGEST
 arm_type_align (gdbarch *gdbarch, struct type *t)
 {
   t = check_typedef (t);
-  if (t->code () == TYPE_CODE_ARRAY && TYPE_VECTOR (t))
+  if (t->code () == TYPE_CODE_ARRAY && t->is_vector ())
     {
       /* Use the natural alignment for vector types (the same for
         scalar type), but the maximum alignment is 64-bit.  */
@@ -3562,7 +3562,7 @@ arm_vfp_cprc_sub_candidate (struct type *t,
 
     case TYPE_CODE_ARRAY:
       {
-       if (TYPE_VECTOR (t))
+       if (t->is_vector ())
          {
            /* A 64-bit or 128-bit containerized vector type are VFP
               CPRCs.  */
@@ -4030,7 +4030,7 @@ arm_neon_double_type (struct gdbarch *gdbarch)
       elem = builtin_type (gdbarch)->builtin_double;
       append_composite_type_field (t, "f64", elem);
 
-      TYPE_VECTOR (t) = 1;
+      t->set_is_vector (true);
       t->set_name ("neon_d");
       tdep->neon_double_type = t;
     }
@@ -4069,7 +4069,7 @@ arm_neon_quad_type (struct gdbarch *gdbarch)
       elem = builtin_type (gdbarch)->builtin_double;
       append_composite_type_field (t, "f64", init_vector_type (elem, 2));
 
-      TYPE_VECTOR (t) = 1;
+      t->set_is_vector (true);
       t->set_name ("neon_q");
       tdep->neon_quad_type = t;
     }
@@ -8017,7 +8017,7 @@ arm_return_in_memory (struct gdbarch *gdbarch, struct type *type)
       && TYPE_CODE_ARRAY != code && TYPE_CODE_COMPLEX != code)
     return 0;
 
-  if (TYPE_CODE_ARRAY == code && TYPE_VECTOR (type))
+  if (TYPE_CODE_ARRAY == code && type->is_vector ())
     {
       /* Vector values should be returned using ARM registers if they
         are not over 16 bytes.  */
@@ -8863,9 +8863,10 @@ arm_elf_osabi_sniffer (bfd *abfd)
   if (elfosabi == ELFOSABI_ARM)
     /* GNU tools use this value.  Check note sections in this case,
        as well.  */
-    bfd_map_over_sections (abfd,
-                          generic_elf_osabi_sniff_abi_tag_sections, 
-                          &osabi);
+    {
+      for (asection *sect : gdb_bfd_sections (abfd))
+       generic_elf_osabi_sniff_abi_tag_sections (abfd, sect, &osabi);
+    }
 
   /* Anything else will be handled by the generic ELF sniffer.  */
   return osabi;
@@ -8967,7 +8968,7 @@ arm_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
   struct gdbarch_list *best_arch;
   enum arm_abi_kind arm_abi = arm_abi_global;
   enum arm_float_model fp_model = arm_fp_model;
-  struct tdesc_arch_data *tdesc_data = NULL;
+  tdesc_arch_data_up tdesc_data;
   int i;
   bool is_m = false;
   int vfp_register_count = 0;
@@ -9156,29 +9157,26 @@ arm_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
 
       valid_p = 1;
       for (i = 0; i < ARM_SP_REGNUM; i++)
-       valid_p &= tdesc_numbered_register (feature, tdesc_data, i,
+       valid_p &= tdesc_numbered_register (feature, tdesc_data.get (), i,
                                            arm_register_names[i]);
-      valid_p &= tdesc_numbered_register_choices (feature, tdesc_data,
+      valid_p &= tdesc_numbered_register_choices (feature, tdesc_data.get (),
                                                  ARM_SP_REGNUM,
                                                  arm_sp_names);
-      valid_p &= tdesc_numbered_register_choices (feature, tdesc_data,
+      valid_p &= tdesc_numbered_register_choices (feature, tdesc_data.get (),
                                                  ARM_LR_REGNUM,
                                                  arm_lr_names);
-      valid_p &= tdesc_numbered_register_choices (feature, tdesc_data,
+      valid_p &= tdesc_numbered_register_choices (feature, tdesc_data.get (),
                                                  ARM_PC_REGNUM,
                                                  arm_pc_names);
       if (is_m)
-       valid_p &= tdesc_numbered_register (feature, tdesc_data,
+       valid_p &= tdesc_numbered_register (feature, tdesc_data.get (),
                                            ARM_PS_REGNUM, "xpsr");
       else
-       valid_p &= tdesc_numbered_register (feature, tdesc_data,
+       valid_p &= tdesc_numbered_register (feature, tdesc_data.get (),
                                            ARM_PS_REGNUM, "cpsr");
 
       if (!valid_p)
-       {
-         tdesc_data_cleanup (tdesc_data);
-         return NULL;
-       }
+       return NULL;
 
       feature = tdesc_find_feature (tdesc,
                                    "org.gnu.gdb.arm.fpa");
@@ -9186,13 +9184,10 @@ arm_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
        {
          valid_p = 1;
          for (i = ARM_F0_REGNUM; i <= ARM_FPS_REGNUM; i++)
-           valid_p &= tdesc_numbered_register (feature, tdesc_data, i,
+           valid_p &= tdesc_numbered_register (feature, tdesc_data.get (), i,
                                                arm_register_names[i]);
          if (!valid_p)
-           {
-             tdesc_data_cleanup (tdesc_data);
-             return NULL;
-           }
+           return NULL;
        }
       else
        have_fpa_registers = false;
@@ -9211,25 +9206,22 @@ arm_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
          valid_p = 1;
          for (i = ARM_WR0_REGNUM; i <= ARM_WR15_REGNUM; i++)
            valid_p
-             &= tdesc_numbered_register (feature, tdesc_data, i,
+             &= tdesc_numbered_register (feature, tdesc_data.get (), i,
                                          iwmmxt_names[i - ARM_WR0_REGNUM]);
 
          /* Check for the control registers, but do not fail if they
             are missing.  */
          for (i = ARM_WC0_REGNUM; i <= ARM_WCASF_REGNUM; i++)
-           tdesc_numbered_register (feature, tdesc_data, i,
+           tdesc_numbered_register (feature, tdesc_data.get (), i,
                                     iwmmxt_names[i - ARM_WR0_REGNUM]);
 
          for (i = ARM_WCGR0_REGNUM; i <= ARM_WCGR3_REGNUM; i++)
            valid_p
-             &= tdesc_numbered_register (feature, tdesc_data, i,
+             &= tdesc_numbered_register (feature, tdesc_data.get (), i,
                                          iwmmxt_names[i - ARM_WR0_REGNUM]);
 
          if (!valid_p)
-           {
-             tdesc_data_cleanup (tdesc_data);
-             return NULL;
-           }
+           return NULL;
 
          have_wmmx_registers = true;
        }
@@ -9253,7 +9245,7 @@ arm_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
          valid_p = 1;
          for (i = 0; i < 32; i++)
            {
-             valid_p &= tdesc_numbered_register (feature, tdesc_data,
+             valid_p &= tdesc_numbered_register (feature, tdesc_data.get (),
                                                  ARM_D0_REGNUM + i,
                                                  vfp_double_names[i]);
              if (!valid_p)
@@ -9263,13 +9255,10 @@ arm_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
            valid_p = 1;
 
          /* Also require FPSCR.  */
-         valid_p &= tdesc_numbered_register (feature, tdesc_data,
+         valid_p &= tdesc_numbered_register (feature, tdesc_data.get (),
                                              ARM_FPSCR_REGNUM, "fpscr");
          if (!valid_p)
-           {
-             tdesc_data_cleanup (tdesc_data);
-             return NULL;
-           }
+           return NULL;
 
          if (tdesc_unnumbered_register (feature, "s0") == 0)
            have_vfp_pseudos = true;
@@ -9285,10 +9274,7 @@ arm_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
            {
              /* NEON requires 32 double-precision registers.  */
              if (i != 32)
-               {
-                 tdesc_data_cleanup (tdesc_data);
-                 return NULL;
-               }
+               return NULL;
 
              /* If there are quad registers defined by the stub, use
                 their type; otherwise (normally) provide them with
@@ -9328,11 +9314,7 @@ arm_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
     }
 
   if (best_arch != NULL)
-    {
-      if (tdesc_data != NULL)
-       tdesc_data_cleanup (tdesc_data);
-      return best_arch->gdbarch;
-    }
+    return best_arch->gdbarch;
 
   tdep = XCNEW (struct gdbarch_tdep);
   gdbarch = gdbarch_alloc (&info, tdep);
@@ -9534,11 +9516,11 @@ arm_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
       set_gdbarch_pseudo_register_write (gdbarch, arm_pseudo_write);
     }
 
-  if (tdesc_data)
+  if (tdesc_data != nullptr)
     {
       set_tdesc_pseudo_register_name (gdbarch, arm_register_name);
 
-      tdesc_use_registers (gdbarch, tdesc, tdesc_data);
+      tdesc_use_registers (gdbarch, tdesc, std::move (tdesc_data));
 
       /* Override tdesc_register_type to adjust the types of VFP
         registers for NEON.  */