/* Common target dependent code for GDB on ARM systems.
- Copyright 1988, 1989, 1991, 1992, 1993, 1995, 1996, 1998, 1999, 2000,
- 2001, 2002, 2003 Free Software Foundation, Inc.
+
+ Copyright 1988, 1989, 1991, 1992, 1993, 1995, 1996, 1998, 1999,
+ 2000, 2001, 2002, 2003, 2004, 2005 Free Software Foundation, Inc.
This file is part of GDB.
#include "inferior.h"
#include "gdbcmd.h"
#include "gdbcore.h"
-#include "symfile.h"
#include "gdb_string.h"
#include "dis-asm.h" /* For register styles. */
#include "regcache.h"
#include "frame-unwind.h"
#include "frame-base.h"
#include "trad-frame.h"
+#include "objfiles.h"
+#include "dwarf2-frame.h"
#include "arm-tdep.h"
#include "gdb/sim-arm.h"
/* Macros for setting and testing a bit in a minimal symbol that marks
it as Thumb function. The MSB of the minimal symbol's "info" field
- is used for this purpose. This field is already being used to store
- the symbol size, so the assumption is that the symbol size cannot
- exceed 2^31.
+ is used for this purpose.
MSYMBOL_SET_SPECIAL Actually sets the "special" bit.
- MSYMBOL_IS_SPECIAL Tests the "special" bit in a minimal symbol.
- MSYMBOL_SIZE Returns the size of the minimal symbol,
- i.e. the "info" field with the "special" bit
- masked out. */
+ MSYMBOL_IS_SPECIAL Tests the "special" bit in a minimal symbol. */
#define MSYMBOL_SET_SPECIAL(msym) \
MSYMBOL_INFO (msym) = (char *) (((long) MSYMBOL_INFO (msym)) \
#define MSYMBOL_IS_SPECIAL(msym) \
(((long) MSYMBOL_INFO (msym) & 0x80000000) != 0)
-#define MSYMBOL_SIZE(msym) \
- ((long) MSYMBOL_INFO (msym) & 0x7fffffff)
-
/* The list of available "set arm ..." and "show arm ..." commands. */
static struct cmd_list_element *setarmcmdlist = NULL;
static struct cmd_list_element *showarmcmdlist = NULL;
int arm_apcs_32 = 1;
-/* Flag set by arm_fix_call_dummy that tells whether the target
- function is a Thumb function. This flag is checked by
- arm_push_arguments. FIXME: Change the PUSH_ARGUMENTS macro (and
- its use in valops.c) to pass the function address as an additional
- parameter. */
-
-static int target_is_thumb;
-
-/* Flag set by arm_fix_call_dummy that tells whether the calling
- function is a Thumb function. This flag is checked by
- arm_pc_is_thumb and arm_call_dummy_breakpoint_offset. */
-
-static int caller_is_thumb;
-
/* Determine if the program counter specified in MEMADDR is in a Thumb
function. */
}
}
-/* Determine if the program counter specified in MEMADDR is in a call
- dummy being called from a Thumb function. */
-
-int
-arm_pc_is_thumb_dummy (CORE_ADDR memaddr)
-{
- CORE_ADDR sp = read_sp ();
-
- /* FIXME: Until we switch for the new call dummy macros, this heuristic
- is the best we can do. We are trying to determine if the pc is on
- the stack, which (hopefully) will only happen in a call dummy.
- We hope the current stack pointer is not so far alway from the dummy
- frame location (true if we have not pushed large data structures or
- gone too many levels deep) and that our 1024 is not enough to consider
- code regions as part of the stack (true for most practical purposes). */
- if (DEPRECATED_PC_IN_CALL_DUMMY (memaddr, sp, sp + 1024))
- return caller_is_thumb;
- else
- return 0;
-}
-
/* Remove useless bits from addresses in a running program. */
static CORE_ADDR
arm_addr_bits_remove (CORE_ADDR val)
return ADDR_BITS_REMOVE (read_register (ARM_LR_REGNUM));
}
-/* Determine whether the function invocation represented by FI has a
- frame on the stack associated with it. If it does return zero,
- otherwise return 1. */
-
-static int
-arm_frameless_function_invocation (struct frame_info *fi)
-{
- CORE_ADDR func_start, after_prologue;
- int frameless;
-
- /* Sometimes we have functions that do a little setup (like saving the
- vN registers with the stmdb instruction, but DO NOT set up a frame.
- The symbol table will report this as a prologue. However, it is
- important not to try to parse these partial frames as frames, or we
- will get really confused.
-
- So I will demand 3 instructions between the start & end of the
- prologue before I call it a real prologue, i.e. at least
- mov ip, sp,
- stmdb sp!, {}
- sub sp, ip, #4. */
-
- func_start = (get_frame_func (fi) + FUNCTION_START_OFFSET);
- after_prologue = SKIP_PROLOGUE (func_start);
-
- /* There are some frameless functions whose first two instructions
- follow the standard APCS form, in which case after_prologue will
- be func_start + 8. */
-
- frameless = (after_prologue < func_start + 12);
- return frameless;
-}
-
/* A typical Thumb prologue looks like this:
push {r7, lr}
add sp, sp, #-28
struct symtab_and_line sal;
/* If we're in a dummy frame, don't even try to skip the prologue. */
- if (DEPRECATED_PC_IN_CALL_DUMMY (pc, 0, 0))
+ if (deprecated_pc_in_call_dummy (pc))
return pc;
/* See what the symbol table says. */
if (inst == 0xe1a0c00d) /* mov ip, sp */
continue;
+ if ((inst & 0xfffff000) == 0xe28dc000) /* add ip, sp #n */
+ continue;
+
+ if ((inst & 0xfffff000) == 0xe24dc000) /* sub ip, sp #n */
+ continue;
+
/* Some prologues begin with "str lr, [sp, #-4]!". */
if (inst == 0xe52de004) /* str lr, [sp, #-4]! */
continue;
static void
arm_scan_prologue (struct frame_info *next_frame, struct arm_prologue_cache *cache)
{
- int regno, sp_offset, fp_offset;
+ int regno, sp_offset, fp_offset, ip_offset;
CORE_ADDR prologue_start, prologue_end, current_pc;
CORE_ADDR prev_pc = frame_pc_unwind (next_frame);
in which case it is often (but not always) replaced by
"str lr, [sp, #-4]!". - Michael Snyder, 2002-04-23] */
- sp_offset = fp_offset = 0;
+ sp_offset = fp_offset = ip_offset = 0;
for (current_pc = prologue_start;
current_pc < prologue_end;
if (insn == 0xe1a0c00d) /* mov ip, sp */
{
+ ip_offset = 0;
+ continue;
+ }
+ else if ((insn & 0xfffff000) == 0xe28dc000) /* add ip, sp #n */
+ {
+ unsigned imm = insn & 0xff; /* immediate value */
+ unsigned rot = (insn & 0xf00) >> 7; /* rotate amount */
+ imm = (imm >> rot) | (imm << (32 - rot));
+ ip_offset = imm;
+ continue;
+ }
+ else if ((insn & 0xfffff000) == 0xe24dc000) /* sub ip, sp #n */
+ {
+ unsigned imm = insn & 0xff; /* immediate value */
+ unsigned rot = (insn & 0xf00) >> 7; /* rotate amount */
+ imm = (imm >> rot) | (imm << (32 - rot));
+ ip_offset = -imm;
continue;
}
else if (insn == 0xe52de004) /* str lr, [sp, #-4]! */
{
- /* Function is frameless: extra_info defaults OK? */
+ sp_offset -= 4;
+ cache->saved_regs[ARM_LR_REGNUM].addr = sp_offset;
continue;
}
else if ((insn & 0xffff0000) == 0xe92d0000)
unsigned imm = insn & 0xff; /* immediate value */
unsigned rot = (insn & 0xf00) >> 7; /* rotate amount */
imm = (imm >> rot) | (imm << (32 - rot));
- fp_offset = -imm;
+ fp_offset = -imm + ip_offset;
cache->framereg = ARM_FP_REGNUM;
}
else if ((insn & 0xfffff000) == 0xe24dd000) /* sub sp, sp #n */
/* Calculate actual addresses of saved registers using offsets
determined by arm_scan_prologue. */
for (reg = 0; reg < NUM_REGS; reg++)
- if (cache->saved_regs[reg].addr != 0)
+ if (trad_frame_addr_p (cache->saved_regs, reg))
cache->saved_regs[reg].addr += cache->prev_sp;
return cache;
/* This is meant to halt the backtrace at "_start". Make sure we
don't halt it at a generic dummy frame. */
- if (func <= LOWEST_PC || deprecated_inside_entry_file (func))
+ if (func <= LOWEST_PC)
return;
/* If we've hit a wall, stop. */
return;
id = frame_id_build (cache->prev_sp, func);
-
- /* Check that we're not going round in circles with the same frame
- ID (but avoid applying the test to sentinel frames which do go
- round in circles). */
- if (frame_relative_level (next_frame) >= 0
- && get_frame_type (next_frame) == NORMAL_FRAME
- && frame_id_eq (get_frame_id (next_frame), id))
- return;
-
*this_id = id;
}
return;
}
- trad_frame_prev_register (next_frame, cache->saved_regs, prev_regnum,
- optimized, lvalp, addrp, realnump, valuep);
+ trad_frame_get_prev_register (next_frame, cache->saved_regs, prev_regnum,
+ optimized, lvalp, addrp, realnump, valuep);
}
struct frame_unwind arm_prologue_unwind = {
return &arm_prologue_unwind;
}
+static struct arm_prologue_cache *
+arm_make_stub_cache (struct frame_info *next_frame)
+{
+ int reg;
+ struct arm_prologue_cache *cache;
+ CORE_ADDR unwound_fp;
+
+ cache = frame_obstack_zalloc (sizeof (struct arm_prologue_cache));
+ cache->saved_regs = trad_frame_alloc_saved_regs (next_frame);
+
+ cache->prev_sp = frame_unwind_register_unsigned (next_frame, ARM_SP_REGNUM);
+
+ return cache;
+}
+
+/* Our frame ID for a stub frame is the current SP and LR. */
+
+static void
+arm_stub_this_id (struct frame_info *next_frame,
+ void **this_cache,
+ struct frame_id *this_id)
+{
+ struct arm_prologue_cache *cache;
+
+ if (*this_cache == NULL)
+ *this_cache = arm_make_stub_cache (next_frame);
+ cache = *this_cache;
+
+ *this_id = frame_id_build (cache->prev_sp,
+ frame_pc_unwind (next_frame));
+}
+
+struct frame_unwind arm_stub_unwind = {
+ NORMAL_FRAME,
+ arm_stub_this_id,
+ arm_prologue_prev_register
+};
+
+static const struct frame_unwind *
+arm_stub_unwind_sniffer (struct frame_info *next_frame)
+{
+ char dummy[4];
+
+ if (in_plt_section (frame_unwind_address_in_block (next_frame), NULL)
+ || target_read_memory (frame_pc_unwind (next_frame), dummy, 4) != 0)
+ return &arm_stub_unwind;
+
+ return NULL;
+}
+
static CORE_ADDR
arm_normal_frame_base (struct frame_info *next_frame, void **this_cache)
{
cache->framereg = ARM_SP_REGNUM;
cache->prev_sp
= read_memory_integer (cache->saved_regs[cache->framereg].addr,
- REGISTER_RAW_SIZE (cache->framereg));
+ register_size (current_gdbarch, cache->framereg));
return cache;
}
*this_cache = arm_make_sigtramp_cache (next_frame);
cache = *this_cache;
- trad_frame_prev_register (next_frame, cache->saved_regs, prev_regnum,
- optimized, lvalp, addrp, realnump, valuep);
+ trad_frame_get_prev_register (next_frame, cache->saved_regs, prev_regnum,
+ optimized, lvalp, addrp, realnump, valuep);
}
struct frame_unwind arm_sigtramp_unwind = {
static const struct frame_unwind *
arm_sigtramp_unwind_sniffer (struct frame_info *next_frame)
{
- /* Note: If an ARM PC_IN_SIGTRAMP method ever needs to compare
- against the name of the function, the code below will have to be
- changed to first fetch the name of the function and then pass
- this name to PC_IN_SIGTRAMP. */
-
if (SIGCONTEXT_REGISTER_ADDRESS_P ()
- && PC_IN_SIGTRAMP (frame_pc_unwind (next_frame), (char *) 0))
+ && legacy_pc_in_sigtramp (frame_pc_unwind (next_frame), (char *) 0))
return &arm_sigtramp_unwind;
return NULL;
return frame_unwind_register_unsigned (this_frame, ARM_SP_REGNUM);
}
-/* Set the return address for a generic dummy frame. ARM uses the
- entry point. */
-
-static CORE_ADDR
-arm_push_return_address (CORE_ADDR pc, CORE_ADDR sp)
-{
- write_register (ARM_LR_REGNUM, entry_point_address ());
- return sp;
-}
-
-/* Push an empty stack frame, to record the current PC, etc. */
-
-static void
-arm_push_dummy_frame (void)
-{
- CORE_ADDR old_sp = read_register (ARM_SP_REGNUM);
- CORE_ADDR sp = old_sp;
- CORE_ADDR fp, prologue_start;
- int regnum;
-
- /* Push the two dummy prologue instructions in reverse order,
- so that they'll be in the correct low-to-high order in memory. */
- /* sub fp, ip, #4 */
- sp = push_word (sp, 0xe24cb004);
- /* stmdb sp!, {r0-r10, fp, ip, lr, pc} */
- prologue_start = sp = push_word (sp, 0xe92ddfff);
-
- /* Push a pointer to the dummy prologue + 12, because when stm
- instruction stores the PC, it stores the address of the stm
- instruction itself plus 12. */
- fp = sp = push_word (sp, prologue_start + 12);
-
- /* Push the processor status. */
- sp = push_word (sp, read_register (ARM_PS_REGNUM));
-
- /* Push all 16 registers starting with r15. */
- for (regnum = ARM_PC_REGNUM; regnum >= 0; regnum--)
- sp = push_word (sp, read_register (regnum));
-
- /* Update fp (for both Thumb and ARM) and sp. */
- write_register (ARM_FP_REGNUM, fp);
- write_register (THUMB_FP_REGNUM, fp);
- write_register (ARM_SP_REGNUM, sp);
-}
-
-/* DEPRECATED_CALL_DUMMY_WORDS:
- This sequence of words is the instructions
-
- mov lr,pc
- mov pc,r4
- illegal
-
- Note this is 12 bytes. */
-
-static LONGEST arm_call_dummy_words[] =
-{
- 0xe1a0e00f, 0xe1a0f004, 0xe7ffdefe
-};
-
-/* Adjust the call_dummy_breakpoint_offset for the bp_call_dummy
- breakpoint to the proper address in the call dummy, so that
- `finish' after a stop in a call dummy works.
-
- FIXME rearnsha 2002-02018: Tweeking current_gdbarch is not an
- optimal solution, but the call to arm_fix_call_dummy is immediately
- followed by a call to call_function_by_hand, which is the only
- function where call_dummy_breakpoint_offset is actually used. */
-
-
-static void
-arm_set_call_dummy_breakpoint_offset (void)
-{
- if (caller_is_thumb)
- set_gdbarch_deprecated_call_dummy_breakpoint_offset (current_gdbarch, 4);
- else
- set_gdbarch_deprecated_call_dummy_breakpoint_offset (current_gdbarch, 8);
-}
-
-/* Fix up the call dummy, based on whether the processor is currently
- in Thumb or ARM mode, and whether the target function is Thumb or
- ARM. There are three different situations requiring three
- different dummies:
-
- * ARM calling ARM: uses the call dummy in tm-arm.h, which has already
- been copied into the dummy parameter to this function.
- * ARM calling Thumb: uses the call dummy in tm-arm.h, but with the
- "mov pc,r4" instruction patched to be a "bx r4" instead.
- * Thumb calling anything: uses the Thumb dummy defined below, which
- works for calling both ARM and Thumb functions.
-
- All three call dummies expect to receive the target function
- address in R4, with the low bit set if it's a Thumb function. */
-
-static void
-arm_fix_call_dummy (char *dummy, CORE_ADDR pc, CORE_ADDR fun, int nargs,
- struct value **args, struct type *type, int gcc_p)
-{
- static short thumb_dummy[4] =
- {
- 0xf000, 0xf801, /* bl label */
- 0xdf18, /* swi 24 */
- 0x4720, /* label: bx r4 */
- };
- static unsigned long arm_bx_r4 = 0xe12fff14; /* bx r4 instruction */
-
- /* Set flag indicating whether the current PC is in a Thumb function. */
- caller_is_thumb = arm_pc_is_thumb (read_pc ());
- arm_set_call_dummy_breakpoint_offset ();
-
- /* If the target function is Thumb, set the low bit of the function
- address. And if the CPU is currently in ARM mode, patch the
- second instruction of call dummy to use a BX instruction to
- switch to Thumb mode. */
- target_is_thumb = arm_pc_is_thumb (fun);
- if (target_is_thumb)
- {
- fun |= 1;
- if (!caller_is_thumb)
- store_unsigned_integer (dummy + 4, sizeof (arm_bx_r4), arm_bx_r4);
- }
-
- /* If the CPU is currently in Thumb mode, use the Thumb call dummy
- instead of the ARM one that's already been copied. This will
- work for both Thumb and ARM target functions. */
- if (caller_is_thumb)
- {
- int i;
- char *p = dummy;
- int len = sizeof (thumb_dummy) / sizeof (thumb_dummy[0]);
-
- for (i = 0; i < len; i++)
- {
- store_unsigned_integer (p, sizeof (thumb_dummy[0]), thumb_dummy[i]);
- p += sizeof (thumb_dummy[0]);
- }
- }
-
- /* Put the target address in r4; the call dummy will copy this to
- the PC. */
- write_register (4, fun);
-}
-
/* When arguments must be pushed onto the stack, they go on in reverse
order. The code below implements a FILO (stack) to do this. */
we should probably support some of them based on the selected ABI. */
static CORE_ADDR
-arm_push_dummy_call (struct gdbarch *gdbarch, CORE_ADDR func_addr,
+arm_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
struct regcache *regcache, CORE_ADDR bp_addr, int nargs,
struct value **args, CORE_ADDR sp, int struct_return,
CORE_ADDR struct_addr)
struct type *arg_type;
struct type *target_type;
enum type_code typecode;
- char *val;
+ bfd_byte *val;
- arg_type = check_typedef (VALUE_TYPE (args[argnum]));
+ arg_type = check_typedef (value_type (args[argnum]));
len = TYPE_LENGTH (arg_type);
target_type = TYPE_TARGET_TYPE (arg_type);
typecode = TYPE_CODE (arg_type);
- val = VALUE_CONTENTS (args[argnum]);
+ val = value_contents_writeable (args[argnum]);
/* If the argument is a pointer to a function, and it is a
Thumb function, create a LOCAL copy of the value and set
int type;
type = (status >> 24) & 127;
- printf ("%s FPU type %d\n",
- (status & (1 << 31)) ? "Hardware" : "Software",
- type);
- fputs ("mask: ", stdout);
+ if (status & (1 << 31))
+ printf (_("Hardware FPU type %d\n"), type);
+ else
+ printf (_("Software FPU type %d\n"), type);
+ /* i18n: [floating point unit] mask */
+ fputs (_("mask: "), stdout);
print_fpu_flags (status >> 16);
- fputs ("flags: ", stdout);
+ /* i18n: [floating point unit] flags */
+ fputs (_("flags: "), stdout);
print_fpu_flags (status);
}
register N. */
static struct type *
-arm_register_type (int regnum)
+arm_register_type (struct gdbarch *gdbarch, int regnum)
{
if (regnum >= ARM_F0_REGNUM && regnum < ARM_F0_REGNUM + NUM_FREGS)
{
arm_register_byte (int regnum)
{
if (regnum < ARM_F0_REGNUM)
- return regnum * INT_REGISTER_RAW_SIZE;
+ return regnum * INT_REGISTER_SIZE;
else if (regnum < ARM_PS_REGNUM)
- return (NUM_GREGS * INT_REGISTER_RAW_SIZE
- + (regnum - ARM_F0_REGNUM) * FP_REGISTER_RAW_SIZE);
+ return (NUM_GREGS * INT_REGISTER_SIZE
+ + (regnum - ARM_F0_REGNUM) * FP_REGISTER_SIZE);
else
- return (NUM_GREGS * INT_REGISTER_RAW_SIZE
- + NUM_FREGS * FP_REGISTER_RAW_SIZE
+ return (NUM_GREGS * INT_REGISTER_SIZE
+ + NUM_FREGS * FP_REGISTER_SIZE
+ (regnum - ARM_FPS_REGNUM) * STATUS_REGISTER_SIZE);
}
-/* Number of bytes of storage in the actual machine representation for
- register N. All registers are 4 bytes, except fp0 - fp7, which are
- 12 bytes in length. */
-
-static int
-arm_register_raw_size (int regnum)
-{
- if (regnum < ARM_F0_REGNUM)
- return INT_REGISTER_RAW_SIZE;
- else if (regnum < ARM_FPS_REGNUM)
- return FP_REGISTER_RAW_SIZE;
- else
- return STATUS_REGISTER_SIZE;
-}
-
-/* Number of bytes of storage in a program's representation
- for register N. */
-static int
-arm_register_virtual_size (int regnum)
-{
- if (regnum < ARM_F0_REGNUM)
- return INT_REGISTER_VIRTUAL_SIZE;
- else if (regnum < ARM_FPS_REGNUM)
- return FP_REGISTER_VIRTUAL_SIZE;
- else
- return STATUS_REGISTER_SIZE;
-}
-
/* Map GDB internal REGNUM onto the Arm simulator register numbers. */
static int
arm_register_sim_regno (int regnum)
return SIM_ARM_FPS_REGNUM + reg;
reg -= NUM_SREGS;
- internal_error (__FILE__, __LINE__, "Bad REGNUM %d", regnum);
+ internal_error (__FILE__, __LINE__, _("Bad REGNUM %d"), regnum);
}
/* NOTE: cagney/2001-08-20: Both convert_from_extended() and
nextpc = (CORE_ADDR) read_memory_integer (sp + offset, 4);
nextpc = ADDR_BITS_REMOVE (nextpc);
if (nextpc == pc)
- error ("Infinite loop detected");
+ error (_("Infinite loop detected"));
}
else if ((inst1 & 0xf000) == 0xd000) /* conditional branch */
{
{
nextpc = pc_val + (sbits (inst1, 0, 10) << 1);
}
- else if ((inst1 & 0xf800) == 0xf000) /* long branch with link */
+ else if ((inst1 & 0xf800) == 0xf000) /* long branch with link, and blx */
{
unsigned short inst2 = read_memory_integer (pc + 2, 2);
offset = (sbits (inst1, 0, 10) << 12) + (bits (inst2, 0, 10) << 1);
nextpc = pc_val + offset;
+ /* For BLX make sure to clear the low bits. */
+ if (bits (inst2, 11, 12) == 1)
+ nextpc = nextpc & 0xfffffffc;
+ }
+ else if ((inst1 & 0xff00) == 0x4700) /* bx REG, blx REG */
+ {
+ if (bits (inst1, 3, 6) == 0x0f)
+ nextpc = pc_val;
+ else
+ nextpc = read_register (bits (inst1, 3, 6));
+
+ nextpc = ADDR_BITS_REMOVE (nextpc);
+ if (nextpc == pc)
+ error (_("Infinite loop detected"));
}
return nextpc;
if (bits (this_instr, 22, 25) == 0
&& bits (this_instr, 4, 7) == 9) /* multiply */
- error ("Illegal update to pc in instruction");
+ error (_("Invalid update to pc in instruction"));
+
+ /* BX <reg>, BLX <reg> */
+ if (bits (this_instr, 4, 28) == 0x12fff1
+ || bits (this_instr, 4, 28) == 0x12fff3)
+ {
+ rn = bits (this_instr, 0, 3);
+ result = (rn == 15) ? pc_val + 8 : read_register (rn);
+ nextpc = (CORE_ADDR) ADDR_BITS_REMOVE (result);
+
+ if (nextpc == pc)
+ error (_("Infinite loop detected"));
+
+ return nextpc;
+ }
/* Multiply into PC */
c = (status & FLAG_C) ? 1 : 0;
nextpc = (CORE_ADDR) ADDR_BITS_REMOVE (result);
if (nextpc == pc)
- error ("Infinite loop detected");
+ error (_("Infinite loop detected"));
break;
}
unsigned long base;
if (bit (this_instr, 22))
- error ("Illegal update to pc in instruction");
+ error (_("Invalid update to pc in instruction"));
/* byte write to PC */
rn = bits (this_instr, 16, 19);
nextpc = ADDR_BITS_REMOVE (nextpc);
if (nextpc == pc)
- error ("Infinite loop detected");
+ error (_("Infinite loop detected"));
}
}
break;
}
nextpc = ADDR_BITS_REMOVE (nextpc);
if (nextpc == pc)
- error ("Infinite loop detected");
+ error (_("Infinite loop detected"));
}
}
break;
{
nextpc = BranchDest (pc, this_instr);
+ /* BLX */
+ if (bits (this_instr, 28, 31) == INST_NV)
+ nextpc |= bit (this_instr, 24) << 1;
+
nextpc = ADDR_BITS_REMOVE (nextpc);
if (nextpc == pc)
- error ("Infinite loop detected");
+ error (_("Infinite loop detected"));
break;
}
break;
default:
- fprintf_filtered (gdb_stderr, "Bad bit-field extraction\n");
+ fprintf_filtered (gdb_stderr, _("Bad bit-field extraction\n"));
return (pc);
}
}
{
struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
- if (arm_pc_is_thumb (*pcptr) || arm_pc_is_thumb_dummy (*pcptr))
+ if (arm_pc_is_thumb (*pcptr))
{
*pcptr = UNMAKE_THUMB_ADDR (*pcptr);
*lenptr = tdep->thumb_breakpoint_size;
/* The value is in register F0 in internal format. We need to
extract the raw value and then convert it to the desired
internal type. */
- bfd_byte tmpbuf[FP_REGISTER_RAW_SIZE];
+ bfd_byte tmpbuf[FP_REGISTER_SIZE];
regcache_cooked_read (regs, ARM_F0_REGNUM, tmpbuf);
convert_from_extended (floatformat_from_type (type), tmpbuf,
regcache_cooked_read (regs, ARM_A1_REGNUM, valbuf);
if (TYPE_LENGTH (type) > 4)
regcache_cooked_read (regs, ARM_A1_REGNUM + 1,
- valbuf + INT_REGISTER_RAW_SIZE);
+ valbuf + INT_REGISTER_SIZE);
break;
default:
internal_error
(__FILE__, __LINE__,
- "arm_extract_return_value: Floating point model not supported");
+ _("arm_extract_return_value: Floating point model not supported"));
break;
}
}
anything special for small big-endian values. */
regcache_cooked_read_unsigned (regs, regno++, &tmp);
store_unsigned_integer (valbuf,
- (len > INT_REGISTER_RAW_SIZE
- ? INT_REGISTER_RAW_SIZE : len),
+ (len > INT_REGISTER_SIZE
+ ? INT_REGISTER_SIZE : len),
tmp);
- len -= INT_REGISTER_RAW_SIZE;
- valbuf += INT_REGISTER_RAW_SIZE;
+ len -= INT_REGISTER_SIZE;
+ valbuf += INT_REGISTER_SIZE;
}
}
else
registers with 32-bit load instruction(s). */
int len = TYPE_LENGTH (type);
int regno = ARM_A1_REGNUM;
- bfd_byte tmpbuf[INT_REGISTER_RAW_SIZE];
+ bfd_byte tmpbuf[INT_REGISTER_SIZE];
while (len > 0)
{
regcache_cooked_read (regs, regno++, tmpbuf);
memcpy (valbuf, tmpbuf,
- len > INT_REGISTER_RAW_SIZE ? INT_REGISTER_RAW_SIZE : len);
- len -= INT_REGISTER_RAW_SIZE;
- valbuf += INT_REGISTER_RAW_SIZE;
+ len > INT_REGISTER_SIZE ? INT_REGISTER_SIZE : len);
+ len -= INT_REGISTER_SIZE;
+ valbuf += INT_REGISTER_SIZE;
}
}
}
int nRc;
enum type_code code;
+ CHECK_TYPEDEF (type);
+
/* In the ARM ABI, "integer" like aggregate types are returned in
registers. For an aggregate type to be integer like, its size
must be less than or equal to DEPRECATED_REGISTER_SIZE and the
for (i = 0; i < TYPE_NFIELDS (type); i++)
{
enum type_code field_type_code;
- field_type_code = TYPE_CODE (TYPE_FIELD_TYPE (type, i));
+ field_type_code = TYPE_CODE (check_typedef (TYPE_FIELD_TYPE (type, i)));
/* Is it a floating point type field? */
if (field_type_code == TYPE_CODE_FLT)
if (TYPE_CODE (type) == TYPE_CODE_FLT)
{
- char buf[ARM_MAX_REGISTER_RAW_SIZE];
+ char buf[MAX_REGISTER_SIZE];
switch (arm_get_fp_model (current_gdbarch))
{
regcache_cooked_write (regs, ARM_A1_REGNUM, valbuf);
if (TYPE_LENGTH (type) > 4)
regcache_cooked_write (regs, ARM_A1_REGNUM + 1,
- valbuf + INT_REGISTER_RAW_SIZE);
+ valbuf + INT_REGISTER_SIZE);
break;
default:
internal_error
(__FILE__, __LINE__,
- "arm_store_return_value: Floating point model not supported");
+ _("arm_store_return_value: Floating point model not supported"));
break;
}
}
{
/* Values of one word or less are zero/sign-extended and
returned in r0. */
- bfd_byte tmpbuf[INT_REGISTER_RAW_SIZE];
+ bfd_byte tmpbuf[INT_REGISTER_SIZE];
LONGEST val = unpack_long (type, valbuf);
- store_signed_integer (tmpbuf, INT_REGISTER_RAW_SIZE, val);
+ store_signed_integer (tmpbuf, INT_REGISTER_SIZE, val);
regcache_cooked_write (regs, ARM_A1_REGNUM, tmpbuf);
}
else
while (len > 0)
{
regcache_cooked_write (regs, regno++, valbuf);
- len -= INT_REGISTER_RAW_SIZE;
- valbuf += INT_REGISTER_RAW_SIZE;
+ len -= INT_REGISTER_SIZE;
+ valbuf += INT_REGISTER_SIZE;
}
}
}
registers with 32-bit load instruction(s). */
int len = TYPE_LENGTH (type);
int regno = ARM_A1_REGNUM;
- bfd_byte tmpbuf[INT_REGISTER_RAW_SIZE];
+ bfd_byte tmpbuf[INT_REGISTER_SIZE];
while (len > 0)
{
memcpy (tmpbuf, valbuf,
- len > INT_REGISTER_RAW_SIZE ? INT_REGISTER_RAW_SIZE : len);
+ len > INT_REGISTER_SIZE ? INT_REGISTER_SIZE : len);
regcache_cooked_write (regs, regno++, tmpbuf);
- len -= INT_REGISTER_RAW_SIZE;
- valbuf += INT_REGISTER_RAW_SIZE;
+ len -= INT_REGISTER_SIZE;
+ valbuf += INT_REGISTER_SIZE;
}
}
}
arm_get_longjmp_target (CORE_ADDR *pc)
{
CORE_ADDR jb_addr;
- char buf[INT_REGISTER_RAW_SIZE];
+ char buf[INT_REGISTER_SIZE];
struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
jb_addr = read_register (ARM_A1_REGNUM);
if (target_read_memory (jb_addr + tdep->jb_pc * tdep->jb_elt_size, buf,
- INT_REGISTER_RAW_SIZE))
+ INT_REGISTER_SIZE))
return 0;
- *pc = extract_unsigned_integer (buf, INT_REGISTER_RAW_SIZE);
+ *pc = extract_unsigned_integer (buf, INT_REGISTER_SIZE);
return 1;
}
static void
set_arm_command (char *args, int from_tty)
{
- printf_unfiltered ("\"set arm\" must be followed by an apporpriate subcommand.\n");
+ printf_unfiltered (_("\
+\"set arm\" must be followed by an apporpriate subcommand.\n"));
help_list (setarmcmdlist, "set arm ", all_commands, gdb_stdout);
}
}
if (fp_model == ARM_FLOAT_LAST)
- internal_error (__FILE__, __LINE__, "Invalid fp model accepted: %s.",
+ internal_error (__FILE__, __LINE__, _("Invalid fp model accepted: %s."),
current_fp_model);
if (gdbarch_bfd_arch_info (current_gdbarch)->arch == bfd_arch_arm)
}
static void
-show_fp_model (char *args, int from_tty,
- struct cmd_list_element *c)
+show_fp_model (struct ui_file *file, int from_tty,
+ struct cmd_list_element *c, const char *value)
{
struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
+ deprecated_show_value_hack (file, from_tty, c, value);
if (arm_fp_model == ARM_FLOAT_AUTO
&& gdbarch_bfd_arch_info (current_gdbarch)->arch == bfd_arch_arm)
- printf_filtered (" - the default for the current ABI is \"%s\".\n",
+ /* i18n: "the default [floating point model] for the current ABI..." */
+ printf_filtered (_(" - the default for the current ABI is \"%s\".\n"),
fp_model_strings[tdep->fp_model]);
}
set_arm_regname_option (current);
}
-/* arm_othernames implements the "othernames" command. This is deprecated
- by the "set arm disassembly" command. */
-
-static void
-arm_othernames (char *names, int n)
-{
- /* Circle through the various flavors. */
- current_option = (current_option + 1) % num_disassembly_options;
-
- disassembly_style = valid_disassembly_styles[current_option];
- set_disassembly_style ();
-}
-
/* Test whether the coff symbol specific value corresponds to a Thumb
function. */
MSYMBOL_SET_SPECIAL (msym);
}
+static void
+arm_write_pc (CORE_ADDR pc, ptid_t ptid)
+{
+ write_register_pid (ARM_PC_REGNUM, pc, ptid);
+
+ /* If necessary, set the T bit. */
+ if (arm_apcs_32)
+ {
+ CORE_ADDR val = read_register_pid (ARM_PS_REGNUM, ptid);
+ if (arm_pc_is_thumb (pc))
+ write_register_pid (ARM_PS_REGNUM, val | 0x20, ptid);
+ else
+ write_register_pid (ARM_PS_REGNUM, val & ~(CORE_ADDR) 0x20, ptid);
+ }
+}
\f
static enum gdb_osabi
arm_elf_osabi_sniffer (bfd *abfd)
default:
internal_error (__FILE__, __LINE__,
- "arm_elf_osabi_sniffer: Unknown ARM EABI "
- "version 0x%x", eflags);
+ _("\
+arm_elf_osabi_sniffer: Unknown ARM EABI version 0x%x"),
+ eflags);
}
}
break;
default:
internal_error (__FILE__, __LINE__,
- "arm_gdbarch_init: bad byte order for float format");
+ _("arm_gdbarch_init: bad byte order for float format"));
}
/* On ARM targets char defaults to unsigned. */
tdep->lowest_pc = 0x20;
tdep->jb_pc = -1; /* Longjump support not enabled by default. */
- set_gdbarch_deprecated_call_dummy_words (gdbarch, arm_call_dummy_words);
- set_gdbarch_deprecated_sizeof_call_dummy_words (gdbarch, 0);
-
set_gdbarch_push_dummy_call (gdbarch, arm_push_dummy_call);
+ set_gdbarch_write_pc (gdbarch, arm_write_pc);
+
/* Frame handling. */
set_gdbarch_unwind_dummy_id (gdbarch, arm_unwind_dummy_id);
set_gdbarch_unwind_pc (gdbarch, arm_unwind_pc);
set_gdbarch_unwind_sp (gdbarch, arm_unwind_sp);
- set_gdbarch_frameless_function_invocation
- (gdbarch, arm_frameless_function_invocation);
- set_gdbarch_frame_args_skip (gdbarch, 0);
-
frame_base_set_default (gdbarch, &arm_normal_base);
/* Address manipulation. */
set_gdbarch_smash_text_address (gdbarch, arm_smash_text_address);
set_gdbarch_addr_bits_remove (gdbarch, arm_addr_bits_remove);
- /* Offset from address of function to start of its code. */
- set_gdbarch_function_start_offset (gdbarch, 0);
-
/* Advance PC across function entry code. */
set_gdbarch_skip_prologue (gdbarch, arm_skip_prologue);
/* Breakpoint manipulation. */
set_gdbarch_breakpoint_from_pc (gdbarch, arm_breakpoint_from_pc);
- set_gdbarch_decr_pc_after_break (gdbarch, 0);
/* Information about registers, etc. */
set_gdbarch_print_float_info (gdbarch, arm_print_float_info);
set_gdbarch_sp_regnum (gdbarch, ARM_SP_REGNUM);
set_gdbarch_pc_regnum (gdbarch, ARM_PC_REGNUM);
set_gdbarch_deprecated_register_byte (gdbarch, arm_register_byte);
- set_gdbarch_deprecated_register_bytes (gdbarch,
- (NUM_GREGS * INT_REGISTER_RAW_SIZE
- + NUM_FREGS * FP_REGISTER_RAW_SIZE
- + NUM_SREGS * STATUS_REGISTER_SIZE));
set_gdbarch_num_regs (gdbarch, NUM_GREGS + NUM_FREGS + NUM_SREGS);
- set_gdbarch_deprecated_register_raw_size (gdbarch, arm_register_raw_size);
- set_gdbarch_deprecated_register_virtual_size (gdbarch, arm_register_virtual_size);
- set_gdbarch_deprecated_max_register_raw_size (gdbarch, FP_REGISTER_RAW_SIZE);
- set_gdbarch_deprecated_max_register_virtual_size (gdbarch, FP_REGISTER_VIRTUAL_SIZE);
- set_gdbarch_deprecated_register_virtual_type (gdbarch, arm_register_type);
+ set_gdbarch_register_type (gdbarch, arm_register_type);
/* Internal <-> external register number maps. */
set_gdbarch_register_sim_regno (gdbarch, arm_register_sim_regno);
/* Returning results. */
set_gdbarch_extract_return_value (gdbarch, arm_extract_return_value);
set_gdbarch_store_return_value (gdbarch, arm_store_return_value);
- set_gdbarch_use_struct_convention (gdbarch, arm_use_struct_convention);
- set_gdbarch_extract_struct_value_address (gdbarch,
- arm_extract_struct_value_address);
+ set_gdbarch_deprecated_use_struct_convention (gdbarch, arm_use_struct_convention);
+ set_gdbarch_deprecated_extract_struct_value_address (gdbarch, arm_extract_struct_value_address);
/* Single stepping. */
/* XXX For an RDI target we should ask the target if it can single-step. */
gdbarch_init_osabi (info, gdbarch);
/* Add some default predicates. */
+ frame_unwind_append_sniffer (gdbarch, arm_stub_unwind_sniffer);
frame_unwind_append_sniffer (gdbarch, arm_sigtramp_unwind_sniffer);
+ frame_unwind_append_sniffer (gdbarch, dwarf2_frame_sniffer);
frame_unwind_append_sniffer (gdbarch, arm_prologue_unwind_sniffer);
/* Now we have tuned the configuration, set a few final things,
default:
internal_error (__FILE__, __LINE__,
- "arm_gdbarch_init: bad byte order for float format");
+ _("arm_gdbarch_init: bad byte order for float format"));
}
return gdbarch;
if (tdep == NULL)
return;
- fprintf_unfiltered (file, "arm_dump_tdep: Lowest pc = 0x%lx",
+ fprintf_unfiltered (file, _("arm_dump_tdep: Lowest pc = 0x%lx"),
(unsigned long) tdep->lowest_pc);
}
const char **regnames;
int numregs, i, j;
static char *helptext;
+ char regdesc[1024], *rdptr = regdesc;
+ size_t rest = sizeof (regdesc);
gdbarch_register (bfd_arch_arm, arm_gdbarch_init, arm_dump_tdep);
/* Add root prefix command for all "set arm"/"show arm" commands. */
add_prefix_cmd ("arm", no_class, set_arm_command,
- "Various ARM-specific commands.",
+ _("Various ARM-specific commands."),
&setarmcmdlist, "set arm ", 0, &setlist);
add_prefix_cmd ("arm", no_class, show_arm_command,
- "Various ARM-specific commands.",
+ _("Various ARM-specific commands."),
&showarmcmdlist, "show arm ", 0, &showlist);
/* Sync the opcode insn printer with our register viewer. */
parse_arm_disassembler_option ("reg-names-std");
- /* Begin creating the help text. */
- stb = mem_fileopen ();
- fprintf_unfiltered (stb, "Set the disassembly style.\n"
- "The valid values are:\n");
-
- /* Initialize the array that will be passed to add_set_enum_cmd(). */
+ /* Initialize the array that will be passed to
+ add_setshow_enum_cmd(). */
valid_disassembly_styles
= xmalloc ((num_disassembly_options + 1) * sizeof (char *));
for (i = 0; i < num_disassembly_options; i++)
{
numregs = get_arm_regnames (i, &setname, &setdesc, ®names);
valid_disassembly_styles[i] = setname;
- fprintf_unfiltered (stb, "%s - %s\n", setname,
- setdesc);
+ length = snprintf (rdptr, rest, "%s - %s\n", setname, setdesc);
+ rdptr += length;
+ rest -= length;
/* Copy the default names (if found) and synchronize disassembler. */
if (!strcmp (setname, "std"))
{
/* Mark the end of valid options. */
valid_disassembly_styles[num_disassembly_options] = NULL;
- /* Finish the creation of the help text. */
- fprintf_unfiltered (stb, "The default is \"std\".");
+ /* Create the help text. */
+ stb = mem_fileopen ();
+ fprintf_unfiltered (stb, "%s%s%s",
+ _("The valid values are:\n"),
+ regdesc,
+ _("The default is \"std\"."));
helptext = ui_file_xstrdup (stb, &length);
ui_file_delete (stb);
- /* Add the deprecated disassembly-flavor command. */
- new_set = add_set_enum_cmd ("disassembly-flavor", no_class,
- valid_disassembly_styles,
- &disassembly_style,
- helptext,
- &setlist);
- set_cmd_sfunc (new_set, set_disassembly_style_sfunc);
- deprecate_cmd (new_set, "set arm disassembly");
- deprecate_cmd (add_show_from_set (new_set, &showlist),
- "show arm disassembly");
-
- /* And now add the new interface. */
- new_set = add_set_enum_cmd ("disassembler", no_class,
- valid_disassembly_styles, &disassembly_style,
- helptext, &setarmcmdlist);
-
- set_cmd_sfunc (new_set, set_disassembly_style_sfunc);
- add_show_from_set (new_set, &showarmcmdlist);
-
- add_setshow_cmd_full ("apcs32", no_class,
- var_boolean, (char *) &arm_apcs_32,
- "Set usage of ARM 32-bit mode.",
- "Show usage of ARM 32-bit mode.",
- NULL, NULL,
- &setlist, &showlist, &new_set, &new_show);
- deprecate_cmd (new_set, "set arm apcs32");
- deprecate_cmd (new_show, "show arm apcs32");
+ add_setshow_enum_cmd("disassembler", no_class,
+ valid_disassembly_styles, &disassembly_style,
+ _("Set the disassembly style."),
+ _("Show the disassembly style."),
+ helptext,
+ set_disassembly_style_sfunc,
+ NULL, /* FIXME: i18n: The disassembly style is \"%s\". */
+ &setarmcmdlist, &showarmcmdlist);
add_setshow_boolean_cmd ("apcs32", no_class, &arm_apcs_32,
- "Set usage of ARM 32-bit mode. "
- "When off, a 26-bit PC will be used.",
- "Show usage of ARM 32-bit mode. "
- "When off, a 26-bit PC will be used.",
- NULL, NULL,
+ _("Set usage of ARM 32-bit mode."),
+ _("Show usage of ARM 32-bit mode."),
+ _("When off, a 26-bit PC will be used."),
+ NULL,
+ NULL, /* FIXME: i18n: Usage of ARM 32-bit mode is %s. */
&setarmcmdlist, &showarmcmdlist);
/* Add a command to allow the user to force the FPU model. */
- new_set = add_set_enum_cmd
- ("fpu", no_class, fp_model_strings, ¤t_fp_model,
- "Set the floating point type.\n"
- "auto - Determine the FP typefrom the OS-ABI.\n"
- "softfpa - Software FP, mixed-endian doubles on little-endian ARMs.\n"
- "fpa - FPA co-processor (GCC compiled).\n"
- "softvfp - Software FP with pure-endian doubles.\n"
- "vfp - VFP co-processor.",
- &setarmcmdlist);
- set_cmd_sfunc (new_set, set_fp_model_sfunc);
- set_cmd_sfunc (add_show_from_set (new_set, &showarmcmdlist), show_fp_model);
-
- /* Add the deprecated "othernames" command. */
- deprecate_cmd (add_com ("othernames", class_obscure, arm_othernames,
- "Switch to the next set of register names."),
- "set arm disassembly");
+ add_setshow_enum_cmd ("fpu", no_class, fp_model_strings, ¤t_fp_model,
+ _("Set the floating point type."),
+ _("Show the floating point type."),
+ _("auto - Determine the FP typefrom the OS-ABI.\n\
+softfpa - Software FP, mixed-endian doubles on little-endian ARMs.\n\
+fpa - FPA co-processor (GCC compiled).\n\
+softvfp - Software FP with pure-endian doubles.\n\
+vfp - VFP co-processor."),
+ set_fp_model_sfunc, show_fp_model,
+ &setarmcmdlist, &showarmcmdlist);
/* Debugging flag. */
add_setshow_boolean_cmd ("arm", class_maintenance, &arm_debug,
- "Set ARM debugging. "
- "When on, arm-specific debugging is enabled.",
- "Show ARM debugging. "
- "When on, arm-specific debugging is enabled.",
- NULL, NULL,
+ _("Set ARM debugging."),
+ _("Show ARM debugging."),
+ _("When on, arm-specific debugging is enabled."),
+ NULL,
+ NULL, /* FIXME: i18n: "ARM debugging is %s. */
&setdebuglist, &showdebuglist);
}
projects / deliverable / binutils-gdb.git / blobdiff