[ARC] Fix typo in extension instruction name.

[deliverable/binutils-gdb.git] / gdb / arm-tdep.h

diff --git a/gdb/arm-tdep.h b/gdb/arm-tdep.h
index 06658a00e85cf6d275d823716f43db0fd3050625..e5d13bbee22ea2c5fc3c6e778e47bf0fe94a2699 100644 (file)
--- a/gdb/arm-tdep.h
+++ b/gdb/arm-tdep.h
@@ -1,5 +1,5 @@
 /* Common target dependent code for GDB on ARM systems.
-   Copyright (C) 2002-2015 Free Software Foundation, Inc.
+   Copyright (C) 2002-2016 Free Software Foundation, Inc.
 
    This file is part of GDB.
 
@@ -23,48 +23,11 @@
 struct gdbarch;
 struct regset;
 struct address_space;
+struct get_next_pcs;
+struct arm_get_next_pcs;
+struct gdb_get_next_pcs;
 
-/* Register numbers of various important registers.  */
-
-enum gdb_regnum {
-  ARM_A1_REGNUM = 0,           /* first integer-like argument */
-  ARM_A4_REGNUM = 3,           /* last integer-like argument */
-  ARM_AP_REGNUM = 11,
-  ARM_IP_REGNUM = 12,
-  ARM_SP_REGNUM = 13,          /* Contains address of top of stack */
-  ARM_LR_REGNUM = 14,          /* address to return to from a function call */
-  ARM_PC_REGNUM = 15,          /* Contains program counter */
-  ARM_F0_REGNUM = 16,          /* first floating point register */
-  ARM_F3_REGNUM = 19,          /* last floating point argument register */
-  ARM_F7_REGNUM = 23,          /* last floating point register */
-  ARM_FPS_REGNUM = 24,         /* floating point status register */
-  ARM_PS_REGNUM = 25,          /* Contains processor status */
-  ARM_WR0_REGNUM,              /* WMMX data registers.  */
-  ARM_WR15_REGNUM = ARM_WR0_REGNUM + 15,
-  ARM_WC0_REGNUM,              /* WMMX control registers.  */
-  ARM_WCSSF_REGNUM = ARM_WC0_REGNUM + 2,
-  ARM_WCASF_REGNUM = ARM_WC0_REGNUM + 3,
-  ARM_WC7_REGNUM = ARM_WC0_REGNUM + 7,
-  ARM_WCGR0_REGNUM,            /* WMMX general purpose registers.  */
-  ARM_WCGR3_REGNUM = ARM_WCGR0_REGNUM + 3,
-  ARM_WCGR7_REGNUM = ARM_WCGR0_REGNUM + 7,
-  ARM_D0_REGNUM,               /* VFP double-precision registers.  */
-  ARM_D31_REGNUM = ARM_D0_REGNUM + 31,
-  ARM_FPSCR_REGNUM,
-
-  ARM_NUM_REGS,
-
-  /* Other useful registers.  */
-  ARM_FP_REGNUM = 11,          /* Frame register in ARM code, if used.  */
-  THUMB_FP_REGNUM = 7,         /* Frame register in Thumb code, if used.  */
-  ARM_NUM_ARG_REGS = 4, 
-  ARM_LAST_ARG_REGNUM = ARM_A4_REGNUM,
-  ARM_NUM_FP_ARG_REGS = 4,
-  ARM_LAST_FP_ARG_REGNUM = ARM_F3_REGNUM
-};
-
-/* Size of integer registers.  */
-#define INT_REGISTER_SIZE              4
+#include "arch/arm.h"
 
 /* Say how long FP registers are.  Used for documentation purposes and
    code readability in this header.  IEEE extended doubles are 80
@@ -87,32 +50,6 @@ enum gdb_regnum {
 #define NUM_GREGS      16      /* Number of general purpose registers.  */
 
 
-/* Instruction condition field values.  */
-#define INST_EQ                0x0
-#define INST_NE                0x1
-#define INST_CS                0x2
-#define INST_CC                0x3
-#define INST_MI                0x4
-#define INST_PL                0x5
-#define INST_VS                0x6
-#define INST_VC                0x7
-#define INST_HI                0x8
-#define INST_LS                0x9
-#define INST_GE                0xa
-#define INST_LT                0xb
-#define INST_GT                0xc
-#define INST_LE                0xd
-#define INST_AL                0xe
-#define INST_NV                0xf
-
-#define FLAG_N         0x80000000
-#define FLAG_Z         0x40000000
-#define FLAG_C         0x20000000
-#define FLAG_V         0x10000000
-
-#define CPSR_T         0x20
-
-#define XPSR_T         0x01000000
 
 /* Type of floating-point code in use by inferior.  There are really 3 models
    that are traditionally supported (plus the endianness issue), but gcc can
@@ -161,6 +98,7 @@ struct gdbarch_tdep
   enum arm_float_model fp_model; /* Floating point calling conventions.  */
 
   int have_fpa_registers;      /* Does the target report the FPA registers?  */
+  int have_wmmx_registers;     /* Does the target report the WMMX registers?  */
   /* The number of VFP registers reported by the target.  It is zero
      if VFP registers are not supported.  */
   int vfp_register_count;
@@ -200,10 +138,6 @@ struct gdbarch_tdep
   struct type *neon_double_type;
   struct type *neon_quad_type;
 
-  /* Return the expected next PC if FRAME is stopped at a syscall
-     instruction.  */
-  CORE_ADDR (*syscall_next_pc) (struct frame_info *frame);
-
    /* syscall record.  */
   int (*arm_syscall_record) (struct regcache *regcache, unsigned long svc_number);
 };
@@ -315,16 +249,22 @@ extern void
                       ULONGEST val, enum pc_write_style write_pc);
 
 CORE_ADDR arm_skip_stub (struct frame_info *, CORE_ADDR);
-CORE_ADDR arm_get_next_pc (struct frame_info *, CORE_ADDR);
+
+ULONGEST arm_get_next_pcs_read_memory_unsigned_integer (CORE_ADDR memaddr,
+                                                       int len,
+                                                       int byte_order);
+
+CORE_ADDR arm_get_next_pcs_addr_bits_remove (struct arm_get_next_pcs *self,
+                                            CORE_ADDR val);
+
+int arm_get_next_pcs_is_thumb (struct arm_get_next_pcs *self);
+
 void arm_insert_single_step_breakpoint (struct gdbarch *,
                                        struct address_space *, CORE_ADDR);
-int arm_deal_with_atomic_sequence (struct frame_info *);
 int arm_software_single_step (struct frame_info *);
+int arm_is_thumb (struct regcache *regcache);
 int arm_frame_is_thumb (struct frame_info *frame);
 
-extern struct displaced_step_closure *
-  arm_displaced_step_copy_insn (struct gdbarch *, CORE_ADDR, CORE_ADDR,
-                               struct regcache *);
 extern void arm_displaced_step_fixup (struct gdbarch *,
                                      struct displaced_step_closure *,
                                      CORE_ADDR, CORE_ADDR, struct regcache *);