/* Cache and manage the values of registers
- Copyright (C) 2014-2015 Free Software Foundation, Inc.
+ Copyright (C) 2014-2017 Free Software Foundation, Inc.
This file is part of GDB.
/* This header is a stopgap until we have an independent regcache. */
+enum register_status
+ {
+ /* The register value is not in the cache, and we don't know yet
+ whether it's available in the target (or traceframe). */
+ REG_UNKNOWN = 0,
+
+ /* The register value is valid and cached. */
+ REG_VALID = 1,
+
+ /* The register value is unavailable. E.g., we're inspecting a
+ traceframe, and this register wasn't collected. Note that this
+ is different a different "unavailable" from saying the register
+ does not exist in the target's architecture --- in that case,
+ the target should have given us a target description that does
+ not include the register in the first place. */
+ REG_UNAVAILABLE = -1
+ };
+
/* Return a pointer to the register cache associated with the
thread specified by PTID. This function must be provided by
the client. */
extern CORE_ADDR regcache_read_pc (struct regcache *regcache);
+/* Read a raw register into a unsigned integer. */
+extern enum register_status regcache_raw_read_unsigned
+ (struct regcache *regcache, int regnum, ULONGEST *val);
+
+ULONGEST regcache_raw_get_unsigned (struct regcache *regcache, int regnum);
+
#endif /* COMMON_REGCACHE_H */