#define X86_XSTATE_AVX512 (X86_XSTATE_K | X86_XSTATE_ZMM_H \
| X86_XSTATE_ZMM)
+#define X86_XSTATE_PKRU (1ULL << 9)
+
/* Supported mask and size of the extended state. */
#define X86_XSTATE_X87_MASK X86_XSTATE_X87
#define X86_XSTATE_SSE_MASK (X86_XSTATE_X87 | X86_XSTATE_SSE)
#define X86_XSTATE_MPX_MASK (X86_XSTATE_SSE_MASK | X86_XSTATE_MPX)
#define X86_XSTATE_AVX_MPX_MASK (X86_XSTATE_AVX_MASK | X86_XSTATE_MPX)
#define X86_XSTATE_AVX_AVX512_MASK (X86_XSTATE_AVX_MASK | X86_XSTATE_AVX512)
-#define X86_XSTATE_AVX_MPX_AVX512_MASK (X86_XSTATE_AVX_MPX_MASK | X86_XSTATE_AVX512)
+#define X86_XSTATE_AVX_MPX_AVX512_PKU_MASK (X86_XSTATE_AVX_MPX_MASK\
+ | X86_XSTATE_AVX512 | X86_XSTATE_PKRU)
+
+#define X86_XSTATE_ALL_MASK (X86_XSTATE_AVX_MPX_AVX512_PKU_MASK)
-#define X86_XSTATE_ALL_MASK (X86_XSTATE_AVX_MPX_AVX512_MASK)
#define X86_XSTATE_SSE_SIZE 576
#define X86_XSTATE_AVX_SIZE 832
#define X86_XSTATE_BNDREGS_SIZE 1024
#define X86_XSTATE_BNDCFG_SIZE 1088
#define X86_XSTATE_AVX512_SIZE 2688
-#define X86_XSTATE_MAX_SIZE 2688
+#define X86_XSTATE_PKRU_SIZE 2696
+#define X86_XSTATE_MAX_SIZE 2696
/* In case one of the MPX XCR0 bits is set we consider we have MPX. */
#define HAS_MPX(XCR0) (((XCR0) & X86_XSTATE_MPX) != 0)
#define HAS_AVX(XCR0) (((XCR0) & X86_XSTATE_AVX) != 0)
#define HAS_AVX512(XCR0) (((XCR0) & X86_XSTATE_AVX512) != 0)
+#define HAS_PKRU(XCR0) (((XCR0) & X86_XSTATE_PKRU) != 0)
/* Get I386 XSAVE extended state size. */
#define X86_XSTATE_SIZE(XCR0) \
- (HAS_AVX512 (XCR0) ? X86_XSTATE_AVX512_SIZE : \
- (HAS_MPX (XCR0) ? X86_XSTATE_BNDCFG_SIZE : \
- (HAS_AVX (XCR0) ? X86_XSTATE_AVX_SIZE : X86_XSTATE_SSE_SIZE)))
+ (HAS_PKRU (XCR0) ? X86_XSTATE_PKRU_SIZE : \
+ (HAS_AVX512 (XCR0) ? X86_XSTATE_AVX512_SIZE : \
+ (HAS_MPX (XCR0) ? X86_XSTATE_BNDCFG_SIZE : \
+ (HAS_AVX (XCR0) ? X86_XSTATE_AVX_SIZE : X86_XSTATE_SSE_SIZE))))
#endif /* X86_XSTATE_H */