/* Target dependent code for CRIS, for GDB, the GNU debugger.
- Copyright 2001, 2002, 2003, 2004, 2005 Free Software Foundation,
- Inc.
+ Copyright (C) 2001, 2002, 2003, 2004, 2005, 2006, 2007
+ Free Software Foundation, Inc.
Contributed by Axis Communications AB.
Written by Hendrik Ruijter, Stefan Andersson, and Orjan Friberg.
-This file is part of GDB.
+ This file is part of GDB.
-This program is free software; you can redistribute it and/or modify
-it under the terms of the GNU General Public License as published by
-the Free Software Foundation; either version 2 of the License, or
-(at your option) any later version.
+ This program is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3 of the License, or
+ (at your option) any later version.
-This program is distributed in the hope that it will be useful,
-but WITHOUT ANY WARRANTY; without even the implied warranty of
-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-GNU General Public License for more details.
+ This program is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
-You should have received a copy of the GNU General Public License
-along with this program; if not, write to the Free Software
-Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+ You should have received a copy of the GNU General Public License
+ along with this program. If not, see <http://www.gnu.org/licenses/>. */
#include "defs.h"
#include "frame.h"
#include "objfiles.h"
#include "solib.h" /* Support for shared libraries. */
-#include "solib-svr4.h" /* For struct link_map_offsets. */
+#include "solib-svr4.h"
#include "gdb_string.h"
#include "dis-asm.h"
ARG2_REGNUM Contains the second parameter to a function.
ARG3_REGNUM Contains the third parameter to a function.
ARG4_REGNUM Contains the fourth parameter to a function. Rest on stack.
- SP_REGNUM Contains address of top of stack.
- PC_REGNUM Contains address of next instruction.
+ gdbarch_sp_regnum Contains address of top of stack.
+ gdbarch_pc_regnum Contains address of next instruction.
SRP_REGNUM Subroutine return pointer register.
BRP_REGNUM Breakpoint return pointer register. */
cris_sigtramp_start (struct frame_info *next_frame)
{
CORE_ADDR pc = frame_pc_unwind (next_frame);
- unsigned short buf[SIGTRAMP_LEN];
+ gdb_byte buf[SIGTRAMP_LEN];
if (!safe_frame_unwind_memory (next_frame, pc, buf, SIGTRAMP_LEN))
return 0;
- if (buf[0] != SIGTRAMP_INSN0)
+ if (((buf[1] << 8) + buf[0]) != SIGTRAMP_INSN0)
{
- if (buf[0] != SIGTRAMP_INSN1)
+ if (((buf[1] << 8) + buf[0]) != SIGTRAMP_INSN1)
return 0;
pc -= SIGTRAMP_OFFSET1;
cris_rt_sigtramp_start (struct frame_info *next_frame)
{
CORE_ADDR pc = frame_pc_unwind (next_frame);
- unsigned short buf[SIGTRAMP_LEN];
+ gdb_byte buf[SIGTRAMP_LEN];
if (!safe_frame_unwind_memory (next_frame, pc, buf, SIGTRAMP_LEN))
return 0;
- if (buf[0] != SIGTRAMP_INSN0)
+ if (((buf[1] << 8) + buf[0]) != SIGTRAMP_INSN0)
{
- if (buf[0] != SIGTRAMP_INSN1)
+ if (((buf[1] << 8) + buf[0]) != SIGTRAMP_INSN1)
return 0;
pc -= SIGTRAMP_OFFSET1;
CORE_ADDR sp;
char buf[4];
- frame_unwind_register (next_frame, SP_REGNUM, buf);
+ frame_unwind_register (next_frame, gdbarch_sp_regnum (current_gdbarch), buf);
sp = extract_unsigned_integer (buf, 4);
/* Look for normal sigtramp frame first. */
info->return_pc = 0;
info->leaf_function = 0;
- frame_unwind_register (next_frame, SP_REGNUM, buf);
+ frame_unwind_register (next_frame, gdbarch_sp_regnum (current_gdbarch), buf);
info->base = extract_unsigned_integer (buf, 4);
addr = cris_sigcontext_addr (next_frame);
it though since that will mean that the backtrace will show a PC
different from what is shown when stopped. */
info->saved_regs[IRP_REGNUM].addr = addr + (19 * 4);
- info->saved_regs[PC_REGNUM] = info->saved_regs[IRP_REGNUM];
- info->saved_regs[SP_REGNUM].addr = addr + (24 * 4);
+ info->saved_regs[gdbarch_pc_regnum (current_gdbarch)]
+ = info->saved_regs[IRP_REGNUM];
+ info->saved_regs[gdbarch_sp_regnum (current_gdbarch)].addr
+ = addr + (24 * 4);
}
else
{
This could be solved by a couple of read_memory_unsigned_integer and a
trad_frame_set_value. */
- info->saved_regs[PC_REGNUM] = info->saved_regs[ERP_REGNUM];
+ info->saved_regs[gdbarch_pc_regnum (current_gdbarch)]
+ = info->saved_regs[ERP_REGNUM];
- info->saved_regs[SP_REGNUM].addr = addr + (25 * 4);
+ info->saved_regs[gdbarch_sp_regnum (current_gdbarch)].addr
+ = addr + (25 * 4);
}
return info;
void **this_prologue_cache,
int regnum, int *optimizedp,
enum lval_type *lvalp, CORE_ADDR *addrp,
- int *realnump, void *bufferp);
+ int *realnump, gdb_byte *bufferp);
static void
cris_sigtramp_frame_prev_register (struct frame_info *next_frame,
void **this_cache,
int regnum, int *optimizedp,
enum lval_type *lvalp, CORE_ADDR *addrp,
- int *realnump, void *valuep)
+ int *realnump, gdb_byte *valuep)
{
/* Make sure we've initialized the cache. */
cris_sigtramp_frame_unwind_cache (next_frame, this_cache);
cris_stopped_data_address (void)
{
CORE_ADDR eda;
- eda = read_register (EDA_REGNUM);
+ eda = get_frame_register_unsigned (get_current_frame (), EDA_REGNUM);
return eda;
}
int disable_interrupt;
} inst_env_type;
-/* Save old breakpoints in order to restore the state before a single_step.
- At most, two breakpoints will have to be remembered. */
-typedef
-char binsn_quantum[BREAKPOINT_MAX];
-static binsn_quantum break_mem[2];
-static CORE_ADDR next_pc = 0;
-static CORE_ADDR branch_target_address = 0;
-static unsigned char branch_break_inserted = 0;
-
/* Machine-dependencies in CRIS for opcodes. */
/* Instruction sizes. */
struct frame_info *next_frame,
struct cris_unwind_cache *info);
+static CORE_ADDR crisv32_scan_prologue (CORE_ADDR pc,
+ struct frame_info *next_frame,
+ struct cris_unwind_cache *info);
+
static CORE_ADDR cris_unwind_pc (struct gdbarch *gdbarch,
struct frame_info *next_frame);
info->leaf_function = 0;
/* Prologue analysis does the rest... */
- cris_scan_prologue (frame_func_unwind (next_frame), next_frame, info);
+ if (cris_version () == 32)
+ crisv32_scan_prologue (frame_func_unwind (next_frame, NORMAL_FRAME),
+ next_frame, info);
+ else
+ cris_scan_prologue (frame_func_unwind (next_frame, NORMAL_FRAME),
+ next_frame, info);
return info;
}
struct frame_id id;
/* The FUNC is easy. */
- func = frame_func_unwind (next_frame);
+ func = frame_func_unwind (next_frame, NORMAL_FRAME);
/* Hopefully the prologue analysis either correctly determined the
frame's base (which is the SP from the previous frame), or set
void **this_prologue_cache,
int regnum, int *optimizedp,
enum lval_type *lvalp, CORE_ADDR *addrp,
- int *realnump, void *bufferp)
+ int *realnump, gdb_byte *bufferp)
{
struct cris_unwind_cache *info
= cris_frame_unwind_cache (next_frame, this_prologue_cache);
CORE_ADDR sp, CORE_ADDR funaddr, int using_gcc,
struct value **args, int nargs,
struct type *value_type,
- CORE_ADDR *real_pc, CORE_ADDR *bp_addr)
+ CORE_ADDR *real_pc, CORE_ADDR *bp_addr,
+ struct regcache *regcache)
{
/* Allocate space sufficient for a breakpoint. */
sp = (sp - 4) & ~3;
}
/* Finally, update the SP register. */
- regcache_cooked_write_unsigned (regcache, SP_REGNUM, sp);
+ regcache_cooked_write_unsigned (regcache,
+ gdbarch_sp_regnum (current_gdbarch), sp);
return sp;
}
-static const struct frame_unwind cris_frame_unwind = {
+static const struct frame_unwind cris_frame_unwind =
+{
NORMAL_FRAME,
cris_frame_this_id,
cris_frame_prev_register
return info->base;
}
-static const struct frame_base cris_frame_base = {
+static const struct frame_base cris_frame_base =
+{
&cris_frame_unwind,
cris_frame_base_address,
cris_frame_base_address,
}
continue;
}
- else if (cris_get_operand2 (insn) == SP_REGNUM
+ else if (cris_get_operand2 (insn) == gdbarch_sp_regnum (current_gdbarch)
&& cris_get_mode (insn) == 0x0000
&& cris_get_opcode (insn) == 0x000A)
{
else if (cris_get_mode (insn) == 0x0002
&& cris_get_opcode (insn) == 0x000F
&& cris_get_size (insn) == 0x0003
- && cris_get_operand1 (insn) == SP_REGNUM)
+ && cris_get_operand1 (insn) == gdbarch_sp_regnum
+ (current_gdbarch))
{
/* movem r<regsave>,[sp] */
regsave = cris_get_operand2 (insn);
}
- else if (cris_get_operand2 (insn) == SP_REGNUM
+ else if (cris_get_operand2 (insn) == gdbarch_sp_regnum (current_gdbarch)
&& ((insn & 0x0F00) >> 8) == 0x0001
&& (cris_get_signed_offset (insn) < 0))
{
if (cris_get_mode (insn_next) == PREFIX_ASSIGN_MODE
&& cris_get_opcode (insn_next) == 0x000F
&& cris_get_size (insn_next) == 0x0003
- && cris_get_operand1 (insn_next) == SP_REGNUM)
+ && cris_get_operand1 (insn_next) == gdbarch_sp_regnum
+ (current_gdbarch))
{
regsave = cris_get_operand2 (insn_next);
}
insn_next = read_memory_unsigned_integer (pc, 2);
pc += 2;
regno = cris_get_operand2 (insn_next);
- if ((regno >= 0 && regno < SP_REGNUM)
+ if ((regno >= 0 && regno < gdbarch_sp_regnum (current_gdbarch))
&& cris_get_mode (insn_next) == PREFIX_OFFSET_MODE
&& cris_get_opcode (insn_next) == 0x000F)
{
insn_next = read_memory_unsigned_integer (pc, 2);
pc += 2;
regno = cris_get_operand2 (insn_next);
- if ((regno >= 0 && regno < SP_REGNUM)
+ if ((regno >= 0 && regno < gdbarch_sp_regnum (current_gdbarch))
&& cris_get_mode (insn_next) == PREFIX_OFFSET_MODE
&& cris_get_opcode (insn_next) == 0x0009
&& cris_get_operand1 (insn_next) == regno)
ULONGEST this_base;
/* Assume that the FP is this frame's SP but with that pushed
stack space added back. */
- frame_unwind_unsigned_register (next_frame, SP_REGNUM, &this_base);
+ frame_unwind_unsigned_register (next_frame,
+ gdbarch_sp_regnum (current_gdbarch),
+ &this_base);
info->base = this_base;
info->prev_sp = info->base + info->size;
}
/* The previous frame's SP needed to be computed. Save the computed
value. */
- trad_frame_set_value (info->saved_regs, SP_REGNUM, info->prev_sp);
+ trad_frame_set_value (info->saved_regs,
+ gdbarch_sp_regnum (current_gdbarch), info->prev_sp);
if (!info->leaf_function)
{
}
/* The PC is found in SRP (the actual register or located on the stack). */
- info->saved_regs[PC_REGNUM] = info->saved_regs[SRP_REGNUM];
+ info->saved_regs[gdbarch_pc_regnum (current_gdbarch)]
+ = info->saved_regs[SRP_REGNUM];
+
+ return pc;
+}
+
+static CORE_ADDR
+crisv32_scan_prologue (CORE_ADDR pc, struct frame_info *next_frame,
+ struct cris_unwind_cache *info)
+{
+ ULONGEST this_base;
+
+ /* Unlike the CRISv10 prologue scanner (cris_scan_prologue), this is not
+ meant to be a full-fledged prologue scanner. It is only needed for
+ the cases where we end up in code always lacking DWARF-2 CFI, notably:
+
+ * PLT stubs (library calls)
+ * call dummys
+ * signal trampolines
+
+ For those cases, it is assumed that there is no actual prologue; that
+ the stack pointer is not adjusted, and (as a consequence) the return
+ address is not pushed onto the stack. */
+
+ /* We only want to know the end of the prologue when next_frame and info
+ are NULL (called from cris_skip_prologue i.e.). */
+ if (next_frame == NULL && info == NULL)
+ {
+ return pc;
+ }
+
+ /* The SP is assumed to be unaltered. */
+ frame_unwind_unsigned_register (next_frame,
+ gdbarch_sp_regnum (current_gdbarch),
+ &this_base);
+ info->base = this_base;
+ info->prev_sp = this_base;
+
+ /* The PC is assumed to be found in SRP. */
+ info->saved_regs[gdbarch_pc_regnum (current_gdbarch)]
+ = info->saved_regs[SRP_REGNUM];
return pc;
}
return sal.end;
}
- pc_after_prologue = cris_scan_prologue (pc, NULL, NULL);
+ if (cris_version () == 32)
+ pc_after_prologue = crisv32_scan_prologue (pc, NULL, NULL);
+ else
+ pc_after_prologue = cris_scan_prologue (pc, NULL, NULL);
+
return pc_after_prologue;
}
cris_unwind_pc (struct gdbarch *gdbarch, struct frame_info *next_frame)
{
ULONGEST pc;
- frame_unwind_unsigned_register (next_frame, PC_REGNUM, &pc);
+ frame_unwind_unsigned_register (next_frame,
+ gdbarch_pc_regnum (current_gdbarch), &pc);
return pc;
}
cris_unwind_sp (struct gdbarch *gdbarch, struct frame_info *next_frame)
{
ULONGEST sp;
- frame_unwind_unsigned_register (next_frame, SP_REGNUM, &sp);
+ frame_unwind_unsigned_register (next_frame,
+ gdbarch_sp_regnum (current_gdbarch), &sp);
return sp;
}
/* Special register not applicable to this CRIS version. */
return 0;
}
- else if (regno >= PC_REGNUM && regno < NUM_REGS)
+ else if (regno >= gdbarch_pc_regnum (current_gdbarch)
+ && regno < gdbarch_num_regs (current_gdbarch))
{
/* This will apply to CRISv32 only where there are additional registers
after the special registers (pseudo PC and support registers). */
static int
cris_cannot_fetch_register (int regno)
{
- return ((regno < 0 || regno >= NUM_REGS)
+ return ((regno < 0 || regno >= gdbarch_num_regs (current_gdbarch))
|| (cris_register_size (regno) == 0));
}
3. Those registers to which a write has no effect.
*/
- if (regno < 0 || regno >= NUM_REGS || cris_register_size (regno) == 0)
+ if (regno < 0
+ || regno >= gdbarch_num_regs (current_gdbarch)
+ || cris_register_size (regno) == 0)
/* Not implemented. */
return 1;
static int
crisv32_cannot_fetch_register (int regno)
{
- return ((regno < 0 || regno >= NUM_REGS)
+ return ((regno < 0 || regno >= gdbarch_num_regs (current_gdbarch))
|| (cris_register_size (regno) == 0));
}
3. Those registers to which a write has no effect.
*/
- if (regno < 0 || regno >= NUM_REGS || cris_register_size (regno) == 0)
+ if (regno < 0
+ || regno >= gdbarch_num_regs (current_gdbarch)
+ || cris_register_size (regno) == 0)
/* Not implemented. */
return 1;
static struct type *
cris_register_type (struct gdbarch *gdbarch, int regno)
{
- if (regno == PC_REGNUM)
+ if (regno == gdbarch_pc_regnum (current_gdbarch))
return builtin_type_void_func_ptr;
- else if (regno == SP_REGNUM || regno == CRIS_FP_REGNUM)
+ else if (regno == gdbarch_sp_regnum (current_gdbarch)
+ || regno == CRIS_FP_REGNUM)
return builtin_type_void_data_ptr;
- else if ((regno >= 0 && regno < SP_REGNUM)
+ else if ((regno >= 0 && regno < gdbarch_sp_regnum (current_gdbarch))
|| (regno >= MOF_REGNUM && regno <= USP_REGNUM))
/* Note: R8 taken care of previous clause. */
return builtin_type_uint32;
static struct type *
crisv32_register_type (struct gdbarch *gdbarch, int regno)
{
- if (regno == PC_REGNUM)
+ if (regno == gdbarch_pc_regnum (current_gdbarch))
return builtin_type_void_func_ptr;
- else if (regno == SP_REGNUM || regno == CRIS_FP_REGNUM)
+ else if (regno == gdbarch_sp_regnum (current_gdbarch)
+ || regno == CRIS_FP_REGNUM)
return builtin_type_void_data_ptr;
else if ((regno >= 0 && regno <= ACR_REGNUM)
|| (regno >= EXS_REGNUM && regno <= SPC_REGNUM)
/* General register. */
return cris_genreg_names[regno];
}
- else if (regno >= NUM_GENREGS && regno < NUM_REGS)
+ else if (regno >= NUM_GENREGS && regno < gdbarch_num_regs (current_gdbarch))
{
return cris_special_register_name (regno);
}
{
return cris_special_register_name (regno);
}
- else if (regno == PC_REGNUM)
+ else if (regno == gdbarch_pc_regnum (current_gdbarch))
{
return "pc";
}
static void
cris_dwarf2_frame_init_reg (struct gdbarch *gdbarch, int regnum,
- struct dwarf2_frame_state_reg *reg)
+ struct dwarf2_frame_state_reg *reg,
+ struct frame_info *next_frame)
{
/* The return address column. */
- if (regnum == PC_REGNUM)
+ if (regnum == gdbarch_pc_regnum (current_gdbarch))
reg->how = DWARF2_FRAME_REG_RA;
/* The call frame address. */
- else if (regnum == SP_REGNUM)
+ else if (regnum == gdbarch_sp_regnum (current_gdbarch))
reg->how = DWARF2_FRAME_REG_CFA;
}
static enum return_value_convention
cris_return_value (struct gdbarch *gdbarch, struct type *type,
- struct regcache *regcache, void *readbuf,
- const void *writebuf)
+ struct regcache *regcache, gdb_byte *readbuf,
+ const gdb_byte *writebuf)
{
if (TYPE_CODE (type) == TYPE_CODE_STRUCT
|| TYPE_CODE (type) == TYPE_CODE_UNION
actually an internal error. */
static int
-find_step_target (inst_env_type *inst_env)
+find_step_target (struct frame_info *frame, inst_env_type *inst_env)
{
int i;
int offset;
/* Create a local register image and set the initial state. */
for (i = 0; i < NUM_GENREGS; i++)
{
- inst_env->reg[i] = (unsigned long) read_register (i);
+ inst_env->reg[i] =
+ (unsigned long) get_frame_register_unsigned (frame, i);
}
offset = NUM_GENREGS;
for (i = 0; i < NUM_SPECREGS; i++)
{
- inst_env->preg[i] = (unsigned long) read_register (offset + i);
+ inst_env->preg[i] =
+ (unsigned long) get_frame_register_unsigned (frame, offset + i);
}
inst_env->branch_found = 0;
inst_env->slot_needed = 0;
do
{
/* Read an instruction from the client. */
- insn = read_memory_unsigned_integer (inst_env->reg[PC_REGNUM], 2);
+ insn = read_memory_unsigned_integer
+ (inst_env->reg[gdbarch_pc_regnum (current_gdbarch)], 2);
/* If the instruction is not in a delay slot the new content of the
PC is [PC] + 2. If the instruction is in a delay slot it is not
Just make sure it is a valid instruction. */
if (!inst_env->delay_slot_pc_active)
{
- inst_env->reg[PC_REGNUM] += 2;
+ inst_env->reg[gdbarch_pc_regnum (current_gdbarch)] += 2;
}
else
{
inst_env->delay_slot_pc_active = 0;
- inst_env->reg[PC_REGNUM] = inst_env->delay_slot_pc;
+ inst_env->reg[gdbarch_pc_regnum (current_gdbarch)]
+ = inst_env->delay_slot_pc;
}
/* Analyse the present instruction. */
i = find_cris_op (insn, inst_env);
digs through the opcodes in order to find all possible targets.
Either one ordinary target or two targets for branches may be found. */
-static void
-cris_software_single_step (enum target_signal ignore, int insert_breakpoints)
+static int
+cris_software_single_step (struct frame_info *frame)
{
inst_env_type inst_env;
-
- if (insert_breakpoints)
+
+ /* Analyse the present instruction environment and insert
+ breakpoints. */
+ int status = find_step_target (frame, &inst_env);
+ if (status == -1)
{
- /* Analyse the present instruction environment and insert
- breakpoints. */
- int status = find_step_target (&inst_env);
- if (status == -1)
- {
- /* Could not find a target. Things are likely to go downhill
- from here. */
- warning (_("CRIS software single step could not find a step target."));
- }
- else
- {
- /* Insert at most two breakpoints. One for the next PC content
- and possibly another one for a branch, jump, etc. */
- next_pc = (CORE_ADDR) inst_env.reg[PC_REGNUM];
- target_insert_breakpoint (next_pc, break_mem[0]);
- if (inst_env.branch_found
- && (CORE_ADDR) inst_env.branch_break_address != next_pc)
- {
- branch_target_address =
- (CORE_ADDR) inst_env.branch_break_address;
- target_insert_breakpoint (branch_target_address, break_mem[1]);
- branch_break_inserted = 1;
- }
- }
+ /* Could not find a target. Things are likely to go downhill
+ from here. */
+ warning (_("CRIS software single step could not find a step target."));
}
else
{
- /* Remove breakpoints. */
- target_remove_breakpoint (next_pc, break_mem[0]);
- if (branch_break_inserted)
- {
- target_remove_breakpoint (branch_target_address, break_mem[1]);
- branch_break_inserted = 0;
- }
+ /* Insert at most two breakpoints. One for the next PC content
+ and possibly another one for a branch, jump, etc. */
+ CORE_ADDR next_pc =
+ (CORE_ADDR) inst_env.reg[gdbarch_pc_regnum (current_gdbarch)];
+ insert_single_step_breakpoint (next_pc);
+ if (inst_env.branch_found
+ && (CORE_ADDR) inst_env.branch_break_address != next_pc)
+ {
+ CORE_ADDR branch_target_address
+ = (CORE_ADDR) inst_env.branch_break_address;
+ insert_single_step_breakpoint (branch_target_address);
+ }
}
+
+ return 1;
}
/* Calculates the prefix value for quick offset addressing mode. */
/* Unpack an elf_gregset_t into GDB's register cache. */
static void
-supply_gregset (elf_gregset_t *gregsetp)
+cris_supply_gregset (struct regcache *regcache, elf_gregset_t *gregsetp)
{
struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
int i;
knows about the actual size of each register so that's no problem. */
for (i = 0; i < NUM_GENREGS + NUM_SPECREGS; i++)
{
- regcache_raw_supply (current_regcache, i, (char *)®p[i]);
+ regcache_raw_supply (regcache, i, (char *)®p[i]);
}
if (tdep->cris_version == 32)
/* Needed to set pseudo-register PC for CRISv32. */
/* FIXME: If ERP is in a delay slot at this point then the PC will
be wrong. Issue a warning to alert the user. */
- regcache_raw_supply (current_regcache, PC_REGNUM,
+ regcache_raw_supply (regcache, gdbarch_pc_regnum (current_gdbarch),
(char *)®p[ERP_REGNUM]);
if (*(char *)®p[ERP_REGNUM] & 0x1)
regsets, until multi-arch core support is ready. */
static void
-fetch_core_registers (char *core_reg_sect, unsigned core_reg_size,
+fetch_core_registers (struct regcache *regcache,
+ char *core_reg_sect, unsigned core_reg_size,
int which, CORE_ADDR reg_addr)
{
elf_gregset_t gregset;
else
{
memcpy (&gregset, core_reg_sect, sizeof (gregset));
- supply_gregset (&gregset);
+ cris_supply_gregset (regcache, &gregset);
}
default:
NULL /* next */
};
-/* Fetch (and possibly build) an appropriate link_map_offsets
- structure for native GNU/Linux CRIS targets using the struct
- offsets defined in link.h (but without actual reference to that
- file).
-
- This makes it possible to access GNU/Linux CRIS shared libraries
- from a GDB that was not built on an GNU/Linux CRIS host (for cross
- debugging).
-
- See gdb/solib-svr4.h for an explanation of these fields. */
-
-static struct link_map_offsets *
-cris_linux_svr4_fetch_link_map_offsets (void)
-{
- static struct link_map_offsets lmo;
- static struct link_map_offsets *lmp = NULL;
-
- if (lmp == NULL)
- {
- lmp = &lmo;
-
- lmo.r_debug_size = 8; /* The actual size is 20 bytes, but
- this is all we need. */
- lmo.r_map_offset = 4;
- lmo.r_map_size = 4;
-
- lmo.link_map_size = 20;
-
- lmo.l_addr_offset = 0;
- lmo.l_addr_size = 4;
-
- lmo.l_name_offset = 4;
- lmo.l_name_size = 4;
-
- lmo.l_next_offset = 12;
- lmo.l_next_size = 4;
-
- lmo.l_prev_offset = 16;
- lmo.l_prev_size = 4;
- }
-
- return lmp;
-}
-
extern initialize_file_ftype _initialize_cris_tdep; /* -Wmissing-prototypes */
void
register is. */
set_gdbarch_double_bit (gdbarch, 64);
- /* The default definition of a long double is 2 * TARGET_DOUBLE_BIT,
+ /* The default definition of a long double is 2 * gdbarch_double_bit,
which means we have to set this explicitly. */
set_gdbarch_long_double_bit (gdbarch, 64);
frame_unwind_append_sniffer (gdbarch, cris_frame_sniffer);
frame_base_set_default (gdbarch, &cris_frame_base);
- /* Use target_specific function to define link map offsets. */
- set_solib_svr4_fetch_link_map_offsets
- (gdbarch, cris_linux_svr4_fetch_link_map_offsets);
+ set_solib_svr4_fetch_link_map_offsets
+ (gdbarch, svr4_ilp32_fetch_link_map_offsets);
/* FIXME: cagney/2003-08-27: It should be possible to select a CRIS
disassembler, even when there is no BFD. Does something like