/* Target dependent code for CRIS, for GDB, the GNU debugger.
- Copyright (C) 2001-2018 Free Software Foundation, Inc.
+ Copyright (C) 2001-2019 Free Software Foundation, Inc.
Contributed by Axis Communications AB.
Written by Hendrik Ruijter, Stefan Andersson, and Orjan Friberg.
cris_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
struct regcache *regcache, CORE_ADDR bp_addr,
int nargs, struct value **args, CORE_ADDR sp,
- int struct_return, CORE_ADDR struct_addr)
+ function_call_return_method return_method,
+ CORE_ADDR struct_addr)
{
enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
int argreg;
/* Are we returning a value using a structure return or a normal value
return? struct_addr is the address of the reserved space for the return
structure to be written on the stack. */
- if (struct_return)
- {
- regcache_cooked_write_unsigned (regcache, STR_REGNUM, struct_addr);
- }
+ if (return_method == return_method_struct)
+ regcache_cooked_write_unsigned (regcache, STR_REGNUM, struct_addr);
/* Now load as many as possible of the first arguments into registers,
and push the rest onto the stack. */
knows about the actual size of each register so that's no problem. */
for (i = 0; i < NUM_GENREGS + NUM_SPECREGS; i++)
{
- regcache_raw_supply (regcache, i, (char *)®p[i]);
+ regcache->raw_supply (i, (char *)®p[i]);
}
if (tdep->cris_version == 32)
/* Needed to set pseudo-register PC for CRISv32. */
/* FIXME: If ERP is in a delay slot at this point then the PC will
be wrong. Issue a warning to alert the user. */
- regcache_raw_supply (regcache, gdbarch_pc_regnum (gdbarch),
- (char *)®p[ERP_REGNUM]);
+ regcache->raw_supply (gdbarch_pc_regnum (gdbarch),
+ (char *)®p[ERP_REGNUM]);
if (*(char *)®p[ERP_REGNUM] & 0x1)
fprintf_unfiltered (gdb_stderr, "Warning: PC in delay slot\n");