cris_stopped_data_address (void)
{
CORE_ADDR eda;
- eda = read_register (EDA_REGNUM);
+ eda = get_frame_register_unsigned (get_current_frame (), EDA_REGNUM);
return eda;
}
/* Prologue analysis does the rest... */
if (cris_version () == 32)
- crisv32_scan_prologue (frame_func_unwind (next_frame), next_frame, info);
+ crisv32_scan_prologue (frame_func_unwind (next_frame, NORMAL_FRAME),
+ next_frame, info);
else
- cris_scan_prologue (frame_func_unwind (next_frame), next_frame, info);
+ cris_scan_prologue (frame_func_unwind (next_frame, NORMAL_FRAME),
+ next_frame, info);
return info;
}
struct frame_id id;
/* The FUNC is easy. */
- func = frame_func_unwind (next_frame);
+ func = frame_func_unwind (next_frame, NORMAL_FRAME);
/* Hopefully the prologue analysis either correctly determined the
frame's base (which is the SP from the previous frame), or set
/* Special register not applicable to this CRIS version. */
return 0;
}
- else if (regno >= PC_REGNUM && regno < NUM_REGS)
+ else if (regno >= PC_REGNUM && regno < gdbarch_num_regs (current_gdbarch))
{
/* This will apply to CRISv32 only where there are additional registers
after the special registers (pseudo PC and support registers). */
static int
cris_cannot_fetch_register (int regno)
{
- return ((regno < 0 || regno >= NUM_REGS)
+ return ((regno < 0 || regno >= gdbarch_num_regs (current_gdbarch))
|| (cris_register_size (regno) == 0));
}
3. Those registers to which a write has no effect.
*/
- if (regno < 0 || regno >= NUM_REGS || cris_register_size (regno) == 0)
+ if (regno < 0
+ || regno >= gdbarch_num_regs (current_gdbarch)
+ || cris_register_size (regno) == 0)
/* Not implemented. */
return 1;
static int
crisv32_cannot_fetch_register (int regno)
{
- return ((regno < 0 || regno >= NUM_REGS)
+ return ((regno < 0 || regno >= gdbarch_num_regs (current_gdbarch))
|| (cris_register_size (regno) == 0));
}
3. Those registers to which a write has no effect.
*/
- if (regno < 0 || regno >= NUM_REGS || cris_register_size (regno) == 0)
+ if (regno < 0
+ || regno >= gdbarch_num_regs (current_gdbarch)
+ || cris_register_size (regno) == 0)
/* Not implemented. */
return 1;
/* General register. */
return cris_genreg_names[regno];
}
- else if (regno >= NUM_GENREGS && regno < NUM_REGS)
+ else if (regno >= NUM_GENREGS && regno < gdbarch_num_regs (current_gdbarch))
{
return cris_special_register_name (regno);
}
actually an internal error. */
static int
-find_step_target (inst_env_type *inst_env)
+find_step_target (struct frame_info *frame, inst_env_type *inst_env)
{
int i;
int offset;
/* Create a local register image and set the initial state. */
for (i = 0; i < NUM_GENREGS; i++)
{
- inst_env->reg[i] = (unsigned long) read_register (i);
+ inst_env->reg[i] =
+ (unsigned long) get_frame_register_unsigned (frame, i);
}
offset = NUM_GENREGS;
for (i = 0; i < NUM_SPECREGS; i++)
{
- inst_env->preg[i] = (unsigned long) read_register (offset + i);
+ inst_env->preg[i] =
+ (unsigned long) get_frame_register_unsigned (frame, offset + i);
}
inst_env->branch_found = 0;
inst_env->slot_needed = 0;
digs through the opcodes in order to find all possible targets.
Either one ordinary target or two targets for branches may be found. */
-static void
-cris_software_single_step (enum target_signal ignore, int insert_breakpoints)
+static int
+cris_software_single_step (struct frame_info *frame)
{
inst_env_type inst_env;
- if (insert_breakpoints)
+ /* Analyse the present instruction environment and insert
+ breakpoints. */
+ int status = find_step_target (frame, &inst_env);
+ if (status == -1)
{
- /* Analyse the present instruction environment and insert
- breakpoints. */
- int status = find_step_target (&inst_env);
- if (status == -1)
- {
- /* Could not find a target. Things are likely to go downhill
- from here. */
- warning (_("CRIS software single step could not find a step target."));
- }
- else
- {
- /* Insert at most two breakpoints. One for the next PC content
- and possibly another one for a branch, jump, etc. */
- CORE_ADDR next_pc = (CORE_ADDR) inst_env.reg[PC_REGNUM];
- insert_single_step_breakpoint (next_pc);
- if (inst_env.branch_found
- && (CORE_ADDR) inst_env.branch_break_address != next_pc)
- {
- CORE_ADDR branch_target_address
- = (CORE_ADDR) inst_env.branch_break_address;
- insert_single_step_breakpoint (branch_target_address);
- }
- }
+ /* Could not find a target. Things are likely to go downhill
+ from here. */
+ warning (_("CRIS software single step could not find a step target."));
}
else
- remove_single_step_breakpoints ();
+ {
+ /* Insert at most two breakpoints. One for the next PC content
+ and possibly another one for a branch, jump, etc. */
+ CORE_ADDR next_pc = (CORE_ADDR) inst_env.reg[PC_REGNUM];
+ insert_single_step_breakpoint (next_pc);
+ if (inst_env.branch_found
+ && (CORE_ADDR) inst_env.branch_break_address != next_pc)
+ {
+ CORE_ADDR branch_target_address
+ = (CORE_ADDR) inst_env.branch_break_address;
+ insert_single_step_breakpoint (branch_target_address);
+ }
+ }
+
+ return 1;
}
/* Calculates the prefix value for quick offset addressing mode. */
/* Unpack an elf_gregset_t into GDB's register cache. */
static void
-supply_gregset (elf_gregset_t *gregsetp)
+cris_supply_gregset (struct regcache *regcache, elf_gregset_t *gregsetp)
{
struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
int i;
knows about the actual size of each register so that's no problem. */
for (i = 0; i < NUM_GENREGS + NUM_SPECREGS; i++)
{
- regcache_raw_supply (current_regcache, i, (char *)®p[i]);
+ regcache_raw_supply (regcache, i, (char *)®p[i]);
}
if (tdep->cris_version == 32)
/* Needed to set pseudo-register PC for CRISv32. */
/* FIXME: If ERP is in a delay slot at this point then the PC will
be wrong. Issue a warning to alert the user. */
- regcache_raw_supply (current_regcache, PC_REGNUM,
+ regcache_raw_supply (regcache, PC_REGNUM,
(char *)®p[ERP_REGNUM]);
if (*(char *)®p[ERP_REGNUM] & 0x1)
regsets, until multi-arch core support is ready. */
static void
-fetch_core_registers (char *core_reg_sect, unsigned core_reg_size,
+fetch_core_registers (struct regcache *regcache,
+ char *core_reg_sect, unsigned core_reg_size,
int which, CORE_ADDR reg_addr)
{
elf_gregset_t gregset;
else
{
memcpy (&gregset, core_reg_sect, sizeof (gregset));
- supply_gregset (&gregset);
+ cris_supply_gregset (regcache, &gregset);
}
default:
register is. */
set_gdbarch_double_bit (gdbarch, 64);
- /* The default definition of a long double is 2 * TARGET_DOUBLE_BIT,
+ /* The default definition of a long double is 2 * gdbarch_double_bit,
which means we have to set this explicitly. */
set_gdbarch_long_double_bit (gdbarch, 64);
projects / deliverable / binutils-gdb.git / blobdiff