-/* Target-dependent code for Mitsubishi D10V, for GDB.
+/* Target-dependent code for Renesas D10V, for GDB.
Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003 Free Software
Foundation, Inc.
#include "defs.h"
#include "frame.h"
#include "frame-unwind.h"
+#include "frame-base.h"
#include "symtab.h"
#include "gdbtypes.h"
#include "gdbcmd.h"
#include "floatformat.h"
#include "gdb/sim-d10v.h"
#include "sim-regno.h"
+#include "disasm.h"
+#include "trad-frame.h"
#include "gdb_assert.h"
{
int a0_regnum;
int nr_dmap_regs;
- unsigned long (*dmap_register) (int nr);
- unsigned long (*imap_register) (int nr);
+ unsigned long (*dmap_register) (void *regcache, int nr);
+ unsigned long (*imap_register) (void *regcache, int nr);
};
/* These are the addresses the D10V-EVA board maps data and
- instruction memory to. */
+ instruction memory to. */
enum memspace {
DMEM_START = 0x2000000,
STACK_START = 0x200bffe
};
-/* d10v register names. */
+/* d10v register names. */
enum
{
R0_REGNUM = 0,
R3_REGNUM = 3,
- _FP_REGNUM = 11,
+ D10V_FP_REGNUM = 11,
LR_REGNUM = 13,
- _SP_REGNUM = 15,
+ D10V_SP_REGNUM = 15,
PSW_REGNUM = 16,
- _PC_REGNUM = 18,
+ D10V_PC_REGNUM = 18,
NR_IMAP_REGS = 2,
NR_A_REGS = 2,
TS2_NUM_REGS = 37,
TS3_NUM_REGS = 42,
- /* d10v calling convention. */
+ /* d10v calling convention. */
ARG1_REGNUM = R0_REGNUM,
ARGN_REGNUM = R3_REGNUM,
RET1_REGNUM = R0_REGNUM,
};
-#define NR_DMAP_REGS (gdbarch_tdep (current_gdbarch)->nr_dmap_regs)
-#define A0_REGNUM (gdbarch_tdep (current_gdbarch)->a0_regnum)
+static int
+nr_dmap_regs (struct gdbarch *gdbarch)
+{
+ return gdbarch_tdep (gdbarch)->nr_dmap_regs;
+}
+
+static int
+a0_regnum (struct gdbarch *gdbarch)
+{
+ return gdbarch_tdep (gdbarch)->a0_regnum;
+}
/* Local functions */
extern void _initialize_d10v_tdep (void);
-static CORE_ADDR d10v_read_sp (void);
-
-static CORE_ADDR d10v_read_fp (void);
-
static void d10v_eva_prepare_to_trace (void);
static void d10v_eva_get_trace_data (void);
static CORE_ADDR
-d10v_stack_align (CORE_ADDR len)
+d10v_frame_align (struct gdbarch *gdbarch, CORE_ADDR sp)
{
- return (len + 1) & ~1;
+ /* Align to the size of an instruction (so that they can safely be
+ pushed onto the stack. */
+ return sp & ~3;
}
/* Should we use EXTRACT_STRUCT_VALUE_ADDRESS instead of
and TYPE is the type (which is known to be struct, union or array).
The d10v returns anything less than 8 bytes in size in
- registers. */
+ registers. */
static int
d10v_use_struct_convention (int gcc_p, struct type *type)
long alignment;
int i;
/* The d10v only passes a struct in a register when that structure
- has an alignment that matches the size of a register. */
+ has an alignment that matches the size of a register. */
/* If the structure doesn't fit in 4 registers, put it on the
- stack. */
+ stack. */
if (TYPE_LENGTH (type) > 8)
return 1;
/* If the struct contains only one field, don't put it on the stack
- - gcc can fit it in one or more registers. */
+ - gcc can fit it in one or more registers. */
if (TYPE_NFIELDS (type) == 1)
return 0;
alignment = TYPE_LENGTH (TYPE_FIELD_TYPE (type, 0));
for (i = 1; i < TYPE_NFIELDS (type); i++)
{
/* If the alignment changes, just assume it goes on the
- stack. */
+ stack. */
if (TYPE_LENGTH (TYPE_FIELD_TYPE (type, i)) != alignment)
return 1;
}
/* If the alignment is suitable for the d10v's 16 bit registers,
- don't put it on the stack. */
+ don't put it on the stack. */
if (alignment == 2 || alignment == 4)
return 0;
return 1;
}
/* Map the REG_NR onto an ascii name. Return NULL or an empty string
- when the reg_nr isn't valid. */
+ when the reg_nr isn't valid. */
enum ts2_regnums
{
one of the segments. */
static unsigned long
-d10v_ts2_dmap_register (int reg_nr)
+d10v_ts2_dmap_register (void *regcache, int reg_nr)
{
switch (reg_nr)
{
case 1:
return 0x2000;
case 2:
- return read_register (TS2_DMAP_REGNUM);
+ {
+ ULONGEST reg;
+ regcache_cooked_read_unsigned (regcache, TS2_DMAP_REGNUM, ®);
+ return reg;
+ }
default:
return 0;
}
}
static unsigned long
-d10v_ts3_dmap_register (int reg_nr)
-{
- return read_register (TS3_DMAP0_REGNUM + reg_nr);
-}
-
-static unsigned long
-d10v_dmap_register (int reg_nr)
+d10v_ts3_dmap_register (void *regcache, int reg_nr)
{
- return gdbarch_tdep (current_gdbarch)->dmap_register (reg_nr);
+ ULONGEST reg;
+ regcache_cooked_read_unsigned (regcache, TS3_DMAP0_REGNUM + reg_nr, ®);
+ return reg;
}
static unsigned long
-d10v_ts2_imap_register (int reg_nr)
+d10v_ts2_imap_register (void *regcache, int reg_nr)
{
- return read_register (TS2_IMAP0_REGNUM + reg_nr);
+ ULONGEST reg;
+ regcache_cooked_read_unsigned (regcache, TS2_IMAP0_REGNUM + reg_nr, ®);
+ return reg;
}
static unsigned long
-d10v_ts3_imap_register (int reg_nr)
+d10v_ts3_imap_register (void *regcache, int reg_nr)
{
- return read_register (TS3_IMAP0_REGNUM + reg_nr);
+ ULONGEST reg;
+ regcache_cooked_read_unsigned (regcache, TS3_IMAP0_REGNUM + reg_nr, ®);
+ return reg;
}
-static unsigned long
-d10v_imap_register (int reg_nr)
-{
- return gdbarch_tdep (current_gdbarch)->imap_register (reg_nr);
-}
-
-/* MAP GDB's internal register numbering (determined by the layout fo
- the REGISTER_BYTE array) onto the simulator's register
- numbering. */
+/* MAP GDB's internal register numbering (determined by the layout
+ from the DEPRECATED_REGISTER_BYTE array) onto the simulator's
+ register numbering. */
static int
d10v_ts2_register_sim_regno (int nr)
return nr;
}
-/* Index within `registers' of the first byte of the space for
- register REG_NR. */
-
-static int
-d10v_register_byte (int reg_nr)
-{
- if (reg_nr < A0_REGNUM)
- return (reg_nr * 2);
- else if (reg_nr < (A0_REGNUM + NR_A_REGS))
- return (A0_REGNUM * 2
- + (reg_nr - A0_REGNUM) * 8);
- else
- return (A0_REGNUM * 2
- + NR_A_REGS * 8
- + (reg_nr - A0_REGNUM - NR_A_REGS) * 2);
-}
-
-/* Number of bytes of storage in the actual machine representation for
- register REG_NR. */
-
-static int
-d10v_register_raw_size (int reg_nr)
-{
- if (reg_nr < A0_REGNUM)
- return 2;
- else if (reg_nr < (A0_REGNUM + NR_A_REGS))
- return 8;
- else
- return 2;
-}
-
/* Return the GDB type object for the "standard" data type
of data in register N. */
static struct type *
d10v_register_type (struct gdbarch *gdbarch, int reg_nr)
{
- if (reg_nr == PC_REGNUM)
+ if (reg_nr == D10V_PC_REGNUM)
return builtin_type_void_func_ptr;
- if (reg_nr == _SP_REGNUM || reg_nr == _FP_REGNUM)
+ if (reg_nr == D10V_SP_REGNUM || reg_nr == D10V_FP_REGNUM)
return builtin_type_void_data_ptr;
- else if (reg_nr >= A0_REGNUM
- && reg_nr < (A0_REGNUM + NR_A_REGS))
+ else if (reg_nr >= a0_regnum (gdbarch)
+ && reg_nr < (a0_regnum (gdbarch) + NR_A_REGS))
return builtin_type_int64;
else
return builtin_type_int16;
d10v_make_iaddr (CORE_ADDR x)
{
if (d10v_iaddr_p (x))
- return x; /* Idempotency -- x is already in the IMEM space. */
+ return x; /* Idempotency -- x is already in the IMEM space. */
else
return (((x) << 2) | IMEM_START);
}
static CORE_ADDR
d10v_pointer_to_address (struct type *type, const void *buf)
{
- CORE_ADDR addr = extract_address (buf, TYPE_LENGTH (type));
-
+ CORE_ADDR addr = extract_unsigned_integer (buf, TYPE_LENGTH (type));
/* Is it a code address? */
if (TYPE_CODE (TYPE_TARGET_TYPE (type)) == TYPE_CODE_FUNC
|| TYPE_CODE (TYPE_TARGET_TYPE (type)) == TYPE_CODE_METHOD
return (addr | DMEM_START);
}
-/* Immediately after a function call, return the saved pc. We can't
- use frame->return_pc beause that is determined by reading R13 off
- the stack and that may not be written yet. */
-
-static CORE_ADDR
-d10v_saved_pc_after_call (struct frame_info *frame)
-{
- return ((read_register (LR_REGNUM) << 2)
- | IMEM_START);
-}
-
static int
check_prologue (unsigned short op)
{
CORE_ADDR func_addr, func_end;
struct symtab_and_line sal;
- /* If we have line debugging information, then the end of the */
- /* prologue should the first assembly instruction of the first source line */
+ /* If we have line debugging information, then the end of the prologue
+ should the first assembly instruction of the first source line */
if (find_pc_partial_function (pc, NULL, &func_addr, &func_end))
{
sal = find_pc_line (func_addr, 0);
}
if (target_read_memory (pc, (char *) &op, 4))
- return pc; /* Can't access it -- assume no prologue. */
+ return pc; /* Can't access it -- assume no prologue. */
while (1)
{
{
if (!check_prologue (op2))
{
- /* if the previous opcode was really part of the prologue */
- /* and not just a NOP, then we want to break after both instructions */
+ /* If the previous opcode was really part of the
+ prologue and not just a NOP, then we want to
+ break after both instructions. */
if (op1 != 0x5E00)
pc += 4;
break;
struct d10v_unwind_cache
{
- CORE_ADDR return_pc;
- /* The frame's base. Used when constructing a frame ID. */
+ /* The previous frame's inner most stack address. Used as this
+ frame ID's stack_addr. */
+ CORE_ADDR prev_sp;
+ /* The frame's base, optionally used by the high-level debug info. */
CORE_ADDR base;
int size;
- CORE_ADDR *saved_regs;
/* How far the SP and r11 (FP) have been offset from the start of
the stack frame (as defined by the previous frame's stack
pointer). */
LONGEST sp_offset;
LONGEST r11_offset;
int uses_frame;
- void **regs;
+ /* Table indicating the location of each and every register. */
+ struct trad_frame_saved_reg *saved_regs;
};
static int
{
n = (op & 0x1E0) >> 5;
info->sp_offset -= 2;
- info->saved_regs[n] = info->sp_offset;
+ info->saved_regs[n].addr = info->sp_offset;
return 1;
}
{
n = (op & 0x1E0) >> 5;
info->sp_offset -= 4;
- info->saved_regs[n] = info->sp_offset;
- info->saved_regs[n + 1] = info->sp_offset + 2;
+ info->saved_regs[n + 0].addr = info->sp_offset + 0;
+ info->saved_regs[n + 1].addr = info->sp_offset + 2;
return 1;
}
if ((op & 0x7E1F) == 0x6816)
{
n = (op & 0x1E0) >> 5;
- info->saved_regs[n] = info->r11_offset;
+ info->saved_regs[n].addr = info->r11_offset;
return 1;
}
if ((op & 0x7E1F) == 0x681E)
{
n = (op & 0x1E0) >> 5;
- info->saved_regs[n] = info->sp_offset;
+ info->saved_regs[n].addr = info->sp_offset;
return 1;
}
if ((op & 0x7E3F) == 0x3A1E)
{
n = (op & 0x1E0) >> 5;
- info->saved_regs[n] = info->sp_offset;
- info->saved_regs[n + 1] = info->sp_offset + 2;
+ info->saved_regs[n + 0].addr = info->sp_offset + 0;
+ info->saved_regs[n + 1].addr = info->sp_offset + 2;
return 1;
}
the saved registers of frame described by FRAME_INFO. This
includes special registers such as pc and fp saved in special ways
in the stack frame. sp is even more special: the address we return
- for it IS the sp for the next frame. */
+ for it IS the sp for the next frame. */
-struct d10v_unwind_cache *
+static struct d10v_unwind_cache *
d10v_frame_unwind_cache (struct frame_info *next_frame,
void **this_prologue_cache)
{
+ struct gdbarch *gdbarch = get_frame_arch (next_frame);
CORE_ADDR pc;
ULONGEST prev_sp;
ULONGEST this_base;
info = FRAME_OBSTACK_ZALLOC (struct d10v_unwind_cache);
(*this_prologue_cache) = info;
- info->saved_regs = frame_obstack_zalloc (SIZEOF_FRAME_SAVED_REGS);
+ info->saved_regs = trad_frame_alloc_saved_regs (next_frame);
info->size = 0;
- info->return_pc = 0;
info->sp_offset = 0;
- pc = get_pc_function_start (frame_pc_unwind (next_frame));
-
info->uses_frame = 0;
- while (1)
+ for (pc = frame_func_unwind (next_frame);
+ pc > 0 && pc < frame_pc_unwind (next_frame);
+ pc += 4)
{
- op = (unsigned long) read_memory_integer (pc, 4);
+ op = get_frame_memory_unsigned (next_frame, pc, 4);
if ((op & 0xC0000000) == 0xC0000000)
{
/* long instruction */
/* st rn, @(offset,sp) */
short offset = op & 0xFFFF;
short n = (op >> 20) & 0xF;
- info->saved_regs[n] = info->sp_offset + offset;
+ info->saved_regs[n].addr = info->sp_offset + offset;
}
else if ((op & 0x3F1F0000) == 0x350F0000)
{
/* st2w rn, @(offset,sp) */
short offset = op & 0xFFFF;
short n = (op >> 20) & 0xF;
- info->saved_regs[n] = info->sp_offset + offset;
- info->saved_regs[n + 1] = info->sp_offset + offset + 2;
+ info->saved_regs[n + 0].addr = info->sp_offset + offset + 0;
+ info->saved_regs[n + 1].addr = info->sp_offset + offset + 2;
}
else
break;
|| !prologue_find_regs (info, op2, pc))
break;
}
- pc += 4;
}
info->size = -info->sp_offset;
- /* Compute the frame's base, and the previous frame's SP. */
+ /* Compute the previous frame's stack pointer (which is also the
+ frame's ID's stack address), and this frame's base pointer. */
if (info->uses_frame)
{
/* The SP was moved to the FP. This indicates that a new frame
was created. Get THIS frame's FP value by unwinding it from
the next frame. */
- frame_unwind_unsigned_register (next_frame, FP_REGNUM, &this_base);
+ frame_unwind_unsigned_register (next_frame, D10V_FP_REGNUM, &this_base);
/* The FP points at the last saved register. Adjust the FP back
to before the first saved register giving the SP. */
prev_sp = this_base + info->size;
}
- else if (info->saved_regs[SP_REGNUM])
- {
- /* The SP was saved (which is very unusual), the frame base is
- just the PREV's frame's TOP-OF-STACK. */
- this_base = read_memory_unsigned_integer (info->saved_regs[SP_REGNUM],
- register_size (current_gdbarch,
- SP_REGNUM));
- prev_sp = this_base;
- }
else
{
/* Assume that the FP is this frame's SP but with that pushed
stack space added back. */
- frame_unwind_unsigned_register (next_frame, SP_REGNUM, &this_base);
+ frame_unwind_unsigned_register (next_frame, D10V_SP_REGNUM, &this_base);
prev_sp = this_base + info->size;
}
+ /* Convert that SP/BASE into real addresses. */
+ info->prev_sp = d10v_make_daddr (prev_sp);
info->base = d10v_make_daddr (this_base);
- prev_sp = d10v_make_daddr (prev_sp);
/* Adjust all the saved registers so that they contain addresses and
not offsets. */
for (i = 0; i < NUM_REGS - 1; i++)
- if (info->saved_regs[i])
+ if (trad_frame_addr_p (info->saved_regs, i))
{
- info->saved_regs[i] = (prev_sp + info->saved_regs[i]);
+ info->saved_regs[i].addr = (info->prev_sp + info->saved_regs[i].addr);
}
- if (info->saved_regs[LR_REGNUM])
- {
- CORE_ADDR return_pc
- = read_memory_unsigned_integer (info->saved_regs[LR_REGNUM],
- register_size (current_gdbarch, LR_REGNUM));
- info->return_pc = d10v_make_iaddr (return_pc);
- }
- else
- {
- ULONGEST return_pc;
- frame_unwind_unsigned_register (next_frame, LR_REGNUM, &return_pc);
- info->return_pc = d10v_make_iaddr (return_pc);
- }
+ /* The call instruction moves the caller's PC in the callee's LR.
+ Since this is an unwind, do the reverse. Copy the location of LR
+ into PC (the address / regnum) so that a request for PC will be
+ converted into a request for the LR. */
+ info->saved_regs[D10V_PC_REGNUM] = info->saved_regs[LR_REGNUM];
- /* The SP_REGNUM is special. Instead of the address of the SP, the
- previous frame's SP value is saved. */
- info->saved_regs[SP_REGNUM] = prev_sp;
+ /* The previous frame's SP needed to be computed. Save the computed
+ value. */
+ trad_frame_set_value (info->saved_regs, D10V_SP_REGNUM,
+ d10v_make_daddr (prev_sp));
return info;
}
d10v_print_registers_info (struct gdbarch *gdbarch, struct ui_file *file,
struct frame_info *frame, int regnum, int all)
{
+ struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
if (regnum >= 0)
{
default_print_registers_info (gdbarch, file, frame, regnum, all);
{
ULONGEST pc, psw, rpt_s, rpt_e, rpt_c;
- frame_read_unsigned_register (frame, PC_REGNUM, &pc);
- frame_read_unsigned_register (frame, PSW_REGNUM, &psw);
- frame_read_unsigned_register (frame, frame_map_name_to_regnum ("rpt_s", -1), &rpt_s);
- frame_read_unsigned_register (frame, frame_map_name_to_regnum ("rpt_e", -1), &rpt_e);
- frame_read_unsigned_register (frame, frame_map_name_to_regnum ("rpt_c", -1), &rpt_c);
+ pc = get_frame_register_unsigned (frame, D10V_PC_REGNUM);
+ psw = get_frame_register_unsigned (frame, PSW_REGNUM);
+ rpt_s = get_frame_register_unsigned (frame, frame_map_name_to_regnum (frame, "rpt_s", -1));
+ rpt_e = get_frame_register_unsigned (frame, frame_map_name_to_regnum (frame, "rpt_e", -1));
+ rpt_c = get_frame_register_unsigned (frame, frame_map_name_to_regnum (frame, "rpt_c", -1));
fprintf_filtered (file, "PC=%04lx (0x%lx) PSW=%04lx RPT_S=%04lx RPT_E=%04lx RPT_C=%04lx\n",
(long) pc, (long) d10v_make_iaddr (pc), (long) psw,
(long) rpt_s, (long) rpt_e, (long) rpt_c);
for (r = group; r < group + 8; r++)
{
ULONGEST tmp;
- frame_read_unsigned_register (frame, r, &tmp);
+ tmp = get_frame_register_unsigned (frame, r);
fprintf_filtered (file, " %04lx", (long) tmp);
}
fprintf_filtered (file, "\n");
{
if (a > 0)
fprintf_filtered (file, " ");
- fprintf_filtered (file, "IMAP%d %04lx", a, d10v_imap_register (a));
+ fprintf_filtered (file, "IMAP%d %04lx", a,
+ tdep->imap_register (current_regcache, a));
}
- if (NR_DMAP_REGS == 1)
+ if (nr_dmap_regs (gdbarch) == 1)
/* Registers DMAP0 and DMAP1 are constant. Just return dmap2. */
- fprintf_filtered (file, " DMAP %04lx\n", d10v_dmap_register (2));
+ fprintf_filtered (file, " DMAP %04lx\n",
+ tdep->dmap_register (current_regcache, 2));
else
{
- for (a = 0; a < NR_DMAP_REGS; a++)
+ for (a = 0; a < nr_dmap_regs (gdbarch); a++)
{
- fprintf_filtered (file, " DMAP%d %04lx", a, d10v_dmap_register (a));
+ fprintf_filtered (file, " DMAP%d %04lx", a,
+ tdep->dmap_register (current_regcache, a));
}
fprintf_filtered (file, "\n");
}
}
{
- char *num = alloca (max_register_size (gdbarch));
+ char num[MAX_REGISTER_SIZE];
int a;
fprintf_filtered (file, "A0-A%d", NR_A_REGS - 1);
- for (a = A0_REGNUM; a < A0_REGNUM + NR_A_REGS; a++)
+ for (a = a0_regnum (gdbarch); a < a0_regnum (gdbarch) + NR_A_REGS; a++)
{
int i;
fprintf_filtered (file, " ");
- frame_register_read (frame, a, num);
- for (i = 0; i < max_register_size (current_gdbarch); i++)
+ get_frame_register (frame, a, num);
+ for (i = 0; i < register_size (gdbarch, a); i++)
{
fprintf_filtered (file, "%02x", (num[i] & 0xff));
}
save_ptid = inferior_ptid;
inferior_ptid = ptid;
- pc = (int) read_register (PC_REGNUM);
+ pc = (int) read_register (D10V_PC_REGNUM);
inferior_ptid = save_ptid;
retval = d10v_make_iaddr (pc);
return retval;
save_ptid = inferior_ptid;
inferior_ptid = ptid;
- write_register (PC_REGNUM, d10v_convert_iaddr_to_raw (val));
+ write_register (D10V_PC_REGNUM, d10v_convert_iaddr_to_raw (val));
inferior_ptid = save_ptid;
}
static CORE_ADDR
-d10v_read_sp (void)
-{
- return (d10v_make_daddr (read_register (SP_REGNUM)));
-}
-
-static CORE_ADDR
-d10v_read_fp (void)
+d10v_unwind_sp (struct gdbarch *gdbarch, struct frame_info *next_frame)
{
- return (d10v_make_daddr (read_register (FP_REGNUM)));
+ ULONGEST sp;
+ frame_unwind_unsigned_register (next_frame, D10V_SP_REGNUM, &sp);
+ return d10v_make_daddr (sp);
}
/* When arguments must be pushed onto the stack, they go on in reverse
- order. The below implements a FILO (stack) to do this. */
+ order. The below implements a FILO (stack) to do this. */
struct stack_item
{
static CORE_ADDR
-d10v_push_dummy_call (struct gdbarch *gdbarch, struct regcache *regcache,
- CORE_ADDR dummy_addr, int nargs, struct value **args,
- CORE_ADDR sp, int struct_return, CORE_ADDR struct_addr)
+d10v_push_dummy_code (struct gdbarch *gdbarch,
+ CORE_ADDR sp, CORE_ADDR funaddr, int using_gcc,
+ struct value **args, int nargs,
+ struct type *value_type,
+ CORE_ADDR *real_pc, CORE_ADDR *bp_addr)
+{
+ /* Allocate space sufficient for a breakpoint. */
+ sp = (sp - 4) & ~3;
+ /* Store the address of that breakpoint taking care to first convert
+ it into a code (IADDR) address from a stack (DADDR) address.
+ This of course assumes that the two virtual addresses map onto
+ the same real address. */
+ (*bp_addr) = d10v_make_iaddr (d10v_convert_iaddr_to_raw (sp));
+ /* d10v always starts the call at the callee's entry point. */
+ (*real_pc) = funaddr;
+ return sp;
+}
+
+static CORE_ADDR
+d10v_push_dummy_call (struct gdbarch *gdbarch, CORE_ADDR func_addr,
+ struct regcache *regcache, CORE_ADDR bp_addr,
+ int nargs, struct value **args, CORE_ADDR sp,
+ int struct_return, CORE_ADDR struct_addr)
{
int i;
int regnum = ARG1_REGNUM;
long val;
/* Set the return address. For the d10v, the return breakpoint is
- always at DUMMY_ADDR. */
+ always at BP_ADDR. */
regcache_cooked_write_unsigned (regcache, LR_REGNUM,
- d10v_convert_iaddr_to_raw (dummy_addr));
+ d10v_convert_iaddr_to_raw (bp_addr));
/* If STRUCT_RETURN is true, then the struct return address (in
STRUCT_ADDR) will consume the first argument-passing register.
}
/* Finally, update the SP register. */
- regcache_cooked_write_unsigned (regcache, SP_REGNUM,
+ regcache_cooked_write_unsigned (regcache, D10V_SP_REGNUM,
d10v_convert_daddr_to_raw (sp));
return sp;
void *valbuf)
{
int len;
-#if 0
- printf("RET: TYPE=%d len=%d r%d=0x%x\n", TYPE_CODE (type),
- TYPE_LENGTH (type), RET1_REGNUM - R0_REGNUM,
- (int) extract_unsigned_integer (regbuf + REGISTER_BYTE(RET1_REGNUM),
- register_size (current_gdbarch, RET1_REGNUM)));
-#endif
if (TYPE_LENGTH (type) == 1)
{
ULONGEST c;
least significant part of the first register. The
remaining bytes in remaining registers. Interestingly, when
such values are passed in, the last byte is in the most
- significant byte of that same register - wierd. */
+ significant byte of that same register - wierd. */
int reg = RET1_REGNUM;
int off = 0;
if (TYPE_LENGTH (type) & 1)
understands. Returns number of bytes that can be transfered
starting at TARG_ADDR. Return ZERO if no bytes can be transfered
(segmentation fault). Since the simulator knows all about how the
- VM system works, we just call that to do the translation. */
+ VM system works, we just call that to do the translation. */
static void
-remote_d10v_translate_xfer_address (CORE_ADDR memaddr, int nr_bytes,
+remote_d10v_translate_xfer_address (struct gdbarch *gdbarch,
+ struct regcache *regcache,
+ CORE_ADDR memaddr, int nr_bytes,
CORE_ADDR *targ_addr, int *targ_len)
{
+ struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
long out_addr;
long out_len;
- out_len = sim_d10v_translate_addr (memaddr, nr_bytes,
- &out_addr,
- d10v_dmap_register,
- d10v_imap_register);
+ out_len = sim_d10v_translate_addr (memaddr, nr_bytes, &out_addr, regcache,
+ tdep->dmap_register, tdep->imap_register);
*targ_addr = out_addr;
*targ_len = out_len;
}
/* Clear the host-side trace buffer, allocating space if needed. */
trace_data.size = 0;
if (trace_data.counts == NULL)
- trace_data.counts = (short *) xmalloc (65536 * sizeof (short));
+ trace_data.counts = XCALLOC (65536, short);
if (trace_data.addrs == NULL)
- trace_data.addrs = (CORE_ADDR *) xmalloc (65536 * sizeof (CORE_ADDR));
+ trace_data.addrs = XCALLOC (65536, CORE_ADDR);
tracing = 1;
printf_filtered ("Tracing is currently %s.\n", (tracing ? "on" : "off"));
}
-/* Print the instruction at address MEMADDR in debugged memory,
- on STREAM. Returns length of the instruction, in bytes. */
-
-static int
-print_insn (CORE_ADDR memaddr, struct ui_file *stream)
-{
- /* If there's no disassembler, something is very wrong. */
- if (tm_print_insn == NULL)
- internal_error (__FILE__, __LINE__,
- "print_insn: no disassembler");
-
- if (TARGET_BYTE_ORDER == BFD_ENDIAN_BIG)
- tm_print_insn_info.endian = BFD_ENDIAN_BIG;
- else
- tm_print_insn_info.endian = BFD_ENDIAN_LITTLE;
- return TARGET_PRINT_INSN (memaddr, &tm_print_insn_info);
-}
-
static void
d10v_eva_prepare_to_trace (void)
{
if (!tracing)
return;
- last_pc = read_register (PC_REGNUM);
+ last_pc = read_register (D10V_PC_REGNUM);
}
/* Collect trace data from the target board and format it into a form
}
}
- printf_filtered ("Dump of trace from %s to %s:\n", paddr_u (low), paddr_u (high));
+ printf_filtered ("Dump of trace from %s to %s:\n",
+ paddr_u (low), paddr_u (high));
display_trace (low, high);
printf_filtered (":");
printf_filtered ("\t");
wrap_here (" ");
- next_address = next_address + print_insn (next_address, gdb_stdout);
+ next_address += gdb_print_insn (next_address, gdb_stdout);
printf_filtered ("\n");
gdb_flush (gdb_stdout);
}
d10v_unwind_pc (struct gdbarch *gdbarch, struct frame_info *next_frame)
{
ULONGEST pc;
- frame_unwind_unsigned_register (next_frame, PC_REGNUM, &pc);
+ frame_unwind_unsigned_register (next_frame, D10V_PC_REGNUM, &pc);
return d10v_make_iaddr (pc);
}
struct d10v_unwind_cache *info
= d10v_frame_unwind_cache (next_frame, this_prologue_cache);
CORE_ADDR base;
- CORE_ADDR pc;
-
- /* Start with a NULL frame ID. */
- (*this_id) = null_frame_id;
+ CORE_ADDR func;
+ struct frame_id id;
- /* The PC is easy. */
- pc = frame_pc_unwind (next_frame);
+ /* The FUNC is easy. */
+ func = frame_func_unwind (next_frame);
/* This is meant to halt the backtrace at "_start". Make sure we
- don't halt it at a generic dummy frame. */
- if (pc == IMEM_START || pc <= IMEM_START || inside_entry_file (pc))
+ don't halt it at a generic dummy frame. */
+ if (func <= IMEM_START || deprecated_inside_entry_file (func))
return;
/* Hopefully the prologue analysis either correctly determined the
frame's base (which is the SP from the previous frame), or set
that base to "NULL". */
- base = info->base;
+ base = info->prev_sp;
if (base == STACK_START || base == 0)
return;
- /* Check that we're not going round in circles with the same frame
- ID (but avoid applying the test to sentinel frames which do go
- round in circles). Can't use frame_id_eq() as that doesn't yet
- compare the frame's PC value. */
- if (frame_relative_level (next_frame) >= 0
- && get_frame_type (next_frame) != DUMMY_FRAME
- && get_frame_id (next_frame).pc == pc
- && get_frame_id (next_frame).base == base)
- return;
+ id = frame_id_build (base, func);
- this_id->base = base;
- this_id->pc = pc;
+ (*this_id) = id;
}
-static void
-saved_regs_unwinder (struct frame_info *next_frame,
- CORE_ADDR *this_saved_regs,
- int regnum, int *optimizedp,
- enum lval_type *lvalp, CORE_ADDR *addrp,
- int *realnump, void *bufferp)
-{
- if (this_saved_regs[regnum] != 0)
- {
- if (regnum == SP_REGNUM)
- {
- /* SP register treated specially. */
- *optimizedp = 0;
- *lvalp = not_lval;
- *addrp = 0;
- *realnump = -1;
- if (bufferp != NULL)
- store_address (bufferp, register_size (current_gdbarch, regnum),
- this_saved_regs[regnum]);
- }
- else
- {
- /* Any other register is saved in memory, fetch it but cache
- a local copy of its value. */
- *optimizedp = 0;
- *lvalp = lval_memory;
- *addrp = this_saved_regs[regnum];
- *realnump = -1;
- if (bufferp != NULL)
- {
- /* Read the value in from memory. */
- read_memory (this_saved_regs[regnum], bufferp,
- register_size (current_gdbarch, regnum));
- }
- }
- return;
- }
-
- /* No luck, assume this and the next frame have the same register
- value. If a value is needed, pass the request on down the chain;
- otherwise just return an indication that the value is in the same
- register as the next frame. */
- frame_register_unwind (next_frame, regnum, optimizedp, lvalp, addrp,
- realnump, bufferp);
-}
-
-
static void
d10v_frame_prev_register (struct frame_info *next_frame,
void **this_prologue_cache,
{
struct d10v_unwind_cache *info
= d10v_frame_unwind_cache (next_frame, this_prologue_cache);
- if (regnum == PC_REGNUM)
- {
- /* The call instruction saves the caller's PC in LR. The
- function prologue of the callee may then save the LR on the
- stack. Find that possibly saved LR value and return it. */
- saved_regs_unwinder (next_frame, info->saved_regs, LR_REGNUM, optimizedp,
- lvalp, addrp, realnump, bufferp);
- }
- else
- {
- saved_regs_unwinder (next_frame, info->saved_regs, regnum, optimizedp,
- lvalp, addrp, realnump, bufferp);
- }
+ trad_frame_prev_register (next_frame, info->saved_regs, regnum,
+ optimizedp, lvalp, addrp, realnump, bufferp);
}
-
-static struct frame_unwind d10v_frame_unwind = {
+static const struct frame_unwind d10v_frame_unwind = {
+ NORMAL_FRAME,
d10v_frame_this_id,
d10v_frame_prev_register
};
-const struct frame_unwind *
-d10v_frame_p (CORE_ADDR pc)
+static const struct frame_unwind *
+d10v_frame_sniffer (struct frame_info *next_frame)
{
return &d10v_frame_unwind;
}
+static CORE_ADDR
+d10v_frame_base_address (struct frame_info *next_frame, void **this_cache)
+{
+ struct d10v_unwind_cache *info
+ = d10v_frame_unwind_cache (next_frame, this_cache);
+ return info->base;
+}
+
+static const struct frame_base d10v_frame_base = {
+ &d10v_frame_unwind,
+ d10v_frame_base_address,
+ d10v_frame_base_address,
+ d10v_frame_base_address
+};
+
/* Assuming NEXT_FRAME->prev is a dummy, return the frame ID of that
dummy frame. The frame ID's base needs to match the TOS value
saved by save_dummy_frame_tos(), and the PC match the dummy frame's
static struct frame_id
d10v_unwind_dummy_id (struct gdbarch *gdbarch, struct frame_info *next_frame)
{
- ULONGEST base;
- struct frame_id id;
- id.pc = frame_pc_unwind (next_frame);
- frame_unwind_unsigned_register (next_frame, SP_REGNUM, &base);
- id.base = d10v_make_daddr (base);
- return id;
+ return frame_id_build (d10v_unwind_sp (gdbarch, next_frame),
+ frame_pc_unwind (next_frame));
}
static gdbarch_init_ftype d10v_gdbarch_init;
static struct gdbarch *
d10v_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
{
- static LONGEST d10v_call_dummy_words[] =
- {0};
struct gdbarch *gdbarch;
int d10v_num_regs;
struct gdbarch_tdep *tdep;
gdbarch_register_name_ftype *d10v_register_name;
gdbarch_register_sim_regno_ftype *d10v_register_sim_regno;
- /* Find a candidate among the list of pre-declared architectures. */
+ /* Find a candidate among the list of pre-declared architectures. */
arches = gdbarch_list_lookup_by_info (arches, &info);
if (arches != NULL)
return arches->gdbarch;
/* None found, create a new architecture from the information
- provided. */
+ provided. */
tdep = XMALLOC (struct gdbarch_tdep);
gdbarch = gdbarch_alloc (&info, tdep);
set_gdbarch_read_pc (gdbarch, d10v_read_pc);
set_gdbarch_write_pc (gdbarch, d10v_write_pc);
- set_gdbarch_read_fp (gdbarch, d10v_read_fp);
- set_gdbarch_read_sp (gdbarch, d10v_read_sp);
+ set_gdbarch_unwind_sp (gdbarch, d10v_unwind_sp);
set_gdbarch_num_regs (gdbarch, d10v_num_regs);
- set_gdbarch_sp_regnum (gdbarch, 15);
- set_gdbarch_fp_regnum (gdbarch, 11);
- set_gdbarch_pc_regnum (gdbarch, 18);
+ set_gdbarch_sp_regnum (gdbarch, D10V_SP_REGNUM);
set_gdbarch_register_name (gdbarch, d10v_register_name);
- set_gdbarch_register_size (gdbarch, 2);
- set_gdbarch_register_bytes (gdbarch, (d10v_num_regs - 2) * 2 + 16);
- set_gdbarch_register_byte (gdbarch, d10v_register_byte);
- set_gdbarch_register_raw_size (gdbarch, d10v_register_raw_size);
- set_gdbarch_register_virtual_size (gdbarch, generic_register_size);
set_gdbarch_register_type (gdbarch, d10v_register_type);
set_gdbarch_ptr_bit (gdbarch, 2 * TARGET_CHAR_BIT);
set_gdbarch_long_bit (gdbarch, 4 * TARGET_CHAR_BIT);
set_gdbarch_long_long_bit (gdbarch, 8 * TARGET_CHAR_BIT);
/* NOTE: The d10v as a 32 bit ``float'' and ``double''. ``long
- double'' is 64 bits. */
+ double'' is 64 bits. */
set_gdbarch_float_bit (gdbarch, 4 * TARGET_CHAR_BIT);
set_gdbarch_double_bit (gdbarch, 4 * TARGET_CHAR_BIT);
set_gdbarch_long_double_bit (gdbarch, 8 * TARGET_CHAR_BIT);
case BFD_ENDIAN_LITTLE:
set_gdbarch_float_format (gdbarch, &floatformat_ieee_single_little);
set_gdbarch_double_format (gdbarch, &floatformat_ieee_single_little);
- set_gdbarch_long_double_format (gdbarch, &floatformat_ieee_double_little);
+ set_gdbarch_long_double_format (gdbarch,
+ &floatformat_ieee_double_little);
break;
default:
internal_error (__FILE__, __LINE__,
"d10v_gdbarch_init: bad byte order for float format");
}
- set_gdbarch_call_dummy_length (gdbarch, 0);
- set_gdbarch_call_dummy_address (gdbarch, entry_point_address);
- set_gdbarch_call_dummy_breakpoint_offset_p (gdbarch, 1);
- set_gdbarch_call_dummy_breakpoint_offset (gdbarch, 0);
- set_gdbarch_call_dummy_start_offset (gdbarch, 0);
- set_gdbarch_call_dummy_words (gdbarch, d10v_call_dummy_words);
- set_gdbarch_sizeof_call_dummy_words (gdbarch, sizeof (d10v_call_dummy_words));
- set_gdbarch_call_dummy_p (gdbarch, 1);
- set_gdbarch_fix_call_dummy (gdbarch, generic_fix_call_dummy);
-
set_gdbarch_extract_return_value (gdbarch, d10v_extract_return_value);
+ set_gdbarch_push_dummy_code (gdbarch, d10v_push_dummy_code);
set_gdbarch_push_dummy_call (gdbarch, d10v_push_dummy_call);
set_gdbarch_store_return_value (gdbarch, d10v_store_return_value);
- set_gdbarch_extract_struct_value_address (gdbarch, d10v_extract_struct_value_address);
+ set_gdbarch_extract_struct_value_address (gdbarch,
+ d10v_extract_struct_value_address);
set_gdbarch_use_struct_convention (gdbarch, d10v_use_struct_convention);
set_gdbarch_skip_prologue (gdbarch, d10v_skip_prologue);
set_gdbarch_function_start_offset (gdbarch, 0);
set_gdbarch_breakpoint_from_pc (gdbarch, d10v_breakpoint_from_pc);
- set_gdbarch_remote_translate_xfer_address (gdbarch, remote_d10v_translate_xfer_address);
+ set_gdbarch_remote_translate_xfer_address (gdbarch,
+ remote_d10v_translate_xfer_address);
set_gdbarch_frame_args_skip (gdbarch, 0);
- set_gdbarch_frameless_function_invocation (gdbarch, frameless_look_for_prologue);
+ set_gdbarch_frameless_function_invocation (gdbarch,
+ frameless_look_for_prologue);
- set_gdbarch_saved_pc_after_call (gdbarch, d10v_saved_pc_after_call);
- set_gdbarch_frame_num_args (gdbarch, frame_num_args_unknown);
- set_gdbarch_stack_align (gdbarch, d10v_stack_align);
+ set_gdbarch_frame_align (gdbarch, d10v_frame_align);
set_gdbarch_register_sim_regno (gdbarch, d10v_register_sim_regno);
set_gdbarch_print_registers_info (gdbarch, d10v_print_registers_info);
- frame_unwind_append_predicate (gdbarch, d10v_frame_p);
+ frame_unwind_append_sniffer (gdbarch, d10v_frame_sniffer);
+ frame_base_set_default (gdbarch, &d10v_frame_base);
- /* Methods for saving / extracting a dummy frame's ID. */
+ /* Methods for saving / extracting a dummy frame's ID. The ID's
+ stack address must match the SP value returned by
+ PUSH_DUMMY_CALL, and saved by generic_save_dummy_frame_tos. */
set_gdbarch_unwind_dummy_id (gdbarch, d10v_unwind_dummy_id);
- set_gdbarch_save_dummy_frame_tos (gdbarch, generic_save_dummy_frame_tos);
/* Return the unwound PC value. */
set_gdbarch_unwind_pc (gdbarch, d10v_unwind_pc);
+ set_gdbarch_print_insn (gdbarch, print_insn_d10v);
+
return gdbarch;
}
{
register_gdbarch_init (bfd_arch_d10v, d10v_gdbarch_init);
- tm_print_insn = print_insn_d10v;
-
target_resume_hook = d10v_eva_prepare_to_trace;
target_wait_loop_hook = d10v_eva_get_trace_data;
- deprecate_cmd (add_com ("regs", class_vars, show_regs, "Print all registers"),
+ deprecate_cmd (add_com ("regs", class_vars, show_regs,
+ "Print all registers"),
"info registers");
add_com ("itrace", class_support, trace_command,
add_info ("itrace", trace_info,
"Display info about the trace data buffer.");
- add_show_from_set (add_set_cmd ("itracedisplay", no_class,
- var_integer, (char *) &trace_display,
- "Set automatic display of trace.\n", &setlist),
- &showlist);
- add_show_from_set (add_set_cmd ("itracesource", no_class,
- var_integer, (char *) &default_trace_show_source,
- "Set display of source code with trace.\n", &setlist),
- &showlist);
-
+ add_setshow_boolean_cmd ("itracedisplay", no_class, &trace_display,
+ "Set automatic display of trace.\n",
+ "Show automatic display of trace.\n",
+ NULL, NULL, &setlist, &showlist);
+ add_setshow_boolean_cmd ("itracesource", no_class,
+ &default_trace_show_source,
+ "Set display of source code with trace.\n",
+ "Show display of source code with trace.\n",
+ NULL, NULL, &setlist, &showlist);
}
projects / deliverable / binutils-gdb.git / blobdiff