/* Target-dependent code for the Fujitsu FR-V, for GDB, the GNU Debugger.
- Copyright 2002, 2003 Free Software Foundation, Inc.
+
+ Copyright (C) 2002, 2003, 2004, 2005, 2007, 2008
+ Free Software Foundation, Inc.
This file is part of GDB.
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
+ the Free Software Foundation; either version 3 of the License, or
(at your option) any later version.
This program is distributed in the hope that it will be useful,
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place - Suite 330,
- Boston, MA 02111-1307, USA. */
+ along with this program. If not, see <http://www.gnu.org/licenses/>. */
#include "defs.h"
#include "gdb_string.h"
#include "inferior.h"
-#include "symfile.h" /* for entry_point_address */
#include "gdbcore.h"
#include "arch-utils.h"
#include "regcache.h"
#include "sim-regno.h"
#include "gdb/sim-frv.h"
#include "opcodes/frv-desc.h" /* for the H_SPR_... enums */
+#include "symtab.h"
+#include "elf-bfd.h"
+#include "elf/frv.h"
+#include "osabi.h"
+#include "infcall.h"
+#include "solib.h"
+#include "frv-tdep.h"
extern void _initialize_frv_tdep (void);
-static gdbarch_init_ftype frv_gdbarch_init;
-
-static gdbarch_register_name_ftype frv_register_name;
-static gdbarch_breakpoint_from_pc_ftype frv_breakpoint_from_pc;
-static gdbarch_adjust_breakpoint_address_ftype frv_gdbarch_adjust_breakpoint_address;
-static gdbarch_skip_prologue_ftype frv_skip_prologue;
-static gdbarch_frameless_function_invocation_ftype frv_frameless_function_invocation;
-static gdbarch_deprecated_push_arguments_ftype frv_push_arguments;
-static gdbarch_deprecated_saved_pc_after_call_ftype frv_saved_pc_after_call;
-
-/* Register numbers. The order in which these appear define the
- remote protocol, so take care in changing them. */
-enum {
- /* Register numbers 0 -- 63 are always reserved for general-purpose
- registers. The chip at hand may have less. */
- first_gpr_regnum = 0,
- sp_regnum = 1,
- fp_regnum = 2,
- struct_return_regnum = 3,
- last_gpr_regnum = 63,
-
- /* Register numbers 64 -- 127 are always reserved for floating-point
- registers. The chip at hand may have less. */
- first_fpr_regnum = 64,
- last_fpr_regnum = 127,
-
- /* The PC register. */
- pc_regnum = 128,
-
- /* Register numbers 129 on up are always reserved for special-purpose
- registers. */
- first_spr_regnum = 129,
- psr_regnum = 129,
- ccr_regnum = 130,
- cccr_regnum = 131,
- tbr_regnum = 135,
- brr_regnum = 136,
- dbar0_regnum = 137,
- dbar1_regnum = 138,
- dbar2_regnum = 139,
- dbar3_regnum = 140,
- lr_regnum = 145,
- lcr_regnum = 146,
- iacc0h_regnum = 147,
- iacc0l_regnum = 148,
- last_spr_regnum = 148,
-
- /* The total number of registers we know exist. */
- frv_num_regs = last_spr_regnum + 1,
-
- /* Pseudo registers */
- first_pseudo_regnum = frv_num_regs,
-
- /* iacc0 - the 64-bit concatenation of iacc0h and iacc0l. */
- iacc0_regnum = first_pseudo_regnum + 0,
-
- last_pseudo_regnum = iacc0_regnum,
- frv_num_pseudo_regs = last_pseudo_regnum - first_pseudo_regnum + 1,
-};
-
-static LONGEST frv_call_dummy_words[] =
-{0};
-
-
struct frv_unwind_cache /* was struct frame_extra_info */
{
/* The previous frame's inner-most stack address. Used as this
struct trad_frame_saved_reg *saved_regs;
};
-
/* A structure describing a particular variant of the FRV.
We allocate and initialize one of these structures when we create
the gdbarch object for a variant.
Fortran. */
struct gdbarch_tdep
{
+ /* Which ABI is in use? */
+ enum frv_abi frv_abi;
+
/* How many general-purpose registers does this variant have? */
int num_gprs;
char **register_names;
};
-#define CURRENT_VARIANT (gdbarch_tdep (current_gdbarch))
+/* Return the FR-V ABI associated with GDBARCH. */
+enum frv_abi
+frv_abi (struct gdbarch *gdbarch)
+{
+ return gdbarch_tdep (gdbarch)->frv_abi;
+}
+/* Fetch the interpreter and executable loadmap addresses (for shared
+ library support) for the FDPIC ABI. Return 0 if successful, -1 if
+ not. (E.g, -1 will be returned if the ABI isn't the FDPIC ABI.) */
+int
+frv_fdpic_loadmap_addresses (struct gdbarch *gdbarch, CORE_ADDR *interp_addr,
+ CORE_ADDR *exec_addr)
+{
+ if (frv_abi (gdbarch) != FRV_ABI_FDPIC)
+ return -1;
+ else
+ {
+ struct regcache *regcache = get_current_regcache ();
+
+ if (interp_addr != NULL)
+ {
+ ULONGEST val;
+ regcache_cooked_read_unsigned (regcache,
+ fdpic_loadmap_interp_regnum, &val);
+ *interp_addr = val;
+ }
+ if (exec_addr != NULL)
+ {
+ ULONGEST val;
+ regcache_cooked_read_unsigned (regcache,
+ fdpic_loadmap_exec_regnum, &val);
+ *exec_addr = val;
+ }
+ return 0;
+ }
+}
/* Allocate a new variant structure, and set up default values for all
the fields. */
var = xmalloc (sizeof (*var));
memset (var, 0, sizeof (*var));
+ var->frv_abi = FRV_ABI_EABI;
var->num_gprs = 64;
var->num_fprs = 64;
var->num_hw_watchpoints = 0;
var->register_names[iacc0l_regnum] = "iacc0l";
var->register_names[iacc0_regnum] = "iacc0";
+ /* fsr0 (Found on FR555 and FR501.) */
+ var->register_names[fsr0_regnum] = "fsr0";
+
+ /* acc0 - acc7. The architecture provides for the possibility of many
+ more (up to 64 total), but we don't want to make that big of a hole
+ in the G packet. If we need more in the future, we'll add them
+ elsewhere. */
+ for (r = acc0_regnum; r <= acc7_regnum; r++)
+ {
+ char *buf;
+ buf = xstrprintf ("acc%d", r - acc0_regnum);
+ var->register_names[r] = buf;
+ }
+
+ /* accg0 - accg7: These are one byte registers. The remote protocol
+ provides the raw values packed four into a slot. accg0123 and
+ accg4567 correspond to accg0 - accg3 and accg4-accg7 respectively.
+ We don't provide names for accg0123 and accg4567 since the user will
+ likely not want to see these raw values. */
+
+ for (r = accg0_regnum; r <= accg7_regnum; r++)
+ {
+ char *buf;
+ buf = xstrprintf ("accg%d", r - accg0_regnum);
+ var->register_names[r] = buf;
+ }
+
+ /* msr0 and msr1. */
+
+ var->register_names[msr0_regnum] = "msr0";
+ var->register_names[msr1_regnum] = "msr1";
+
+ /* gner and fner registers. */
+ var->register_names[gner0_regnum] = "gner0";
+ var->register_names[gner1_regnum] = "gner1";
+ var->register_names[fner0_regnum] = "fner0";
+ var->register_names[fner1_regnum] = "fner1";
+
return var;
}
}
}
+static void
+set_variant_abi_fdpic (struct gdbarch_tdep *var)
+{
+ var->frv_abi = FRV_ABI_FDPIC;
+ var->register_names[fdpic_loadmap_exec_regnum] = xstrdup ("loadmap_exec");
+ var->register_names[fdpic_loadmap_interp_regnum] = xstrdup ("loadmap_interp");
+}
+
+static void
+set_variant_scratch_registers (struct gdbarch_tdep *var)
+{
+ var->register_names[scr0_regnum] = xstrdup ("scr0");
+ var->register_names[scr1_regnum] = xstrdup ("scr1");
+ var->register_names[scr2_regnum] = xstrdup ("scr2");
+ var->register_names[scr3_regnum] = xstrdup ("scr3");
+}
static const char *
-frv_register_name (int reg)
+frv_register_name (struct gdbarch *gdbarch, int reg)
{
if (reg < 0)
return "?toosmall?";
if (reg >= frv_num_regs + frv_num_pseudo_regs)
return "?toolarge?";
- return CURRENT_VARIANT->register_names[reg];
+ return gdbarch_tdep (gdbarch)->register_names[reg];
}
frv_register_type (struct gdbarch *gdbarch, int reg)
{
if (reg >= first_fpr_regnum && reg <= last_fpr_regnum)
- return builtin_type_float;
+ return builtin_type (gdbarch)->builtin_float;
else if (reg == iacc0_regnum)
return builtin_type_int64;
else
static void
frv_pseudo_register_read (struct gdbarch *gdbarch, struct regcache *regcache,
- int reg, void *buffer)
+ int reg, gdb_byte *buffer)
{
if (reg == iacc0_regnum)
{
regcache_raw_read (regcache, iacc0h_regnum, buffer);
regcache_raw_read (regcache, iacc0l_regnum, (bfd_byte *) buffer + 4);
}
+ else if (accg0_regnum <= reg && reg <= accg7_regnum)
+ {
+ /* The accg raw registers have four values in each slot with the
+ lowest register number occupying the first byte. */
+
+ int raw_regnum = accg0123_regnum + (reg - accg0_regnum) / 4;
+ int byte_num = (reg - accg0_regnum) % 4;
+ bfd_byte buf[4];
+
+ regcache_raw_read (regcache, raw_regnum, buf);
+ memset (buffer, 0, 4);
+ /* FR-V is big endian, so put the requested byte in the first byte
+ of the buffer allocated to hold the pseudo-register. */
+ ((bfd_byte *) buffer)[0] = buf[byte_num];
+ }
}
static void
frv_pseudo_register_write (struct gdbarch *gdbarch, struct regcache *regcache,
- int reg, const void *buffer)
+ int reg, const gdb_byte *buffer)
{
if (reg == iacc0_regnum)
{
regcache_raw_write (regcache, iacc0h_regnum, buffer);
regcache_raw_write (regcache, iacc0l_regnum, (bfd_byte *) buffer + 4);
}
+ else if (accg0_regnum <= reg && reg <= accg7_regnum)
+ {
+ /* The accg raw registers have four values in each slot with the
+ lowest register number occupying the first byte. */
+
+ int raw_regnum = accg0123_regnum + (reg - accg0_regnum) / 4;
+ int byte_num = (reg - accg0_regnum) % 4;
+ char buf[4];
+
+ regcache_raw_read (regcache, raw_regnum, buf);
+ buf[byte_num] = ((bfd_byte *) buffer)[0];
+ regcache_raw_write (regcache, raw_regnum, buf);
+ }
}
static int
-frv_register_sim_regno (int reg)
+frv_register_sim_regno (struct gdbarch *gdbarch, int reg)
{
static const int spr_map[] =
{
H_SPR_PSR, /* psr_regnum */
H_SPR_CCR, /* ccr_regnum */
H_SPR_CCCR, /* cccr_regnum */
- -1, /* 132 */
- -1, /* 133 */
+ -1, /* fdpic_loadmap_exec_regnum */
+ -1, /* fdpic_loadmap_interp_regnum */
-1, /* 134 */
H_SPR_TBR, /* tbr_regnum */
H_SPR_BRR, /* brr_regnum */
H_SPR_DBAR1, /* dbar1_regnum */
H_SPR_DBAR2, /* dbar2_regnum */
H_SPR_DBAR3, /* dbar3_regnum */
- -1, /* 141 */
- -1, /* 142 */
- -1, /* 143 */
- -1, /* 144 */
+ H_SPR_SCR0, /* scr0_regnum */
+ H_SPR_SCR1, /* scr1_regnum */
+ H_SPR_SCR2, /* scr2_regnum */
+ H_SPR_SCR3, /* scr3_regnum */
H_SPR_LR, /* lr_regnum */
H_SPR_LCR, /* lcr_regnum */
H_SPR_IACC0H, /* iacc0h_regnum */
- H_SPR_IACC0L /* iacc0l_regnum */
+ H_SPR_IACC0L, /* iacc0l_regnum */
+ H_SPR_FSR0, /* fsr0_regnum */
+ /* FIXME: Add infrastructure for fetching/setting ACC and ACCG regs. */
+ -1, /* acc0_regnum */
+ -1, /* acc1_regnum */
+ -1, /* acc2_regnum */
+ -1, /* acc3_regnum */
+ -1, /* acc4_regnum */
+ -1, /* acc5_regnum */
+ -1, /* acc6_regnum */
+ -1, /* acc7_regnum */
+ -1, /* acc0123_regnum */
+ -1, /* acc4567_regnum */
+ H_SPR_MSR0, /* msr0_regnum */
+ H_SPR_MSR1, /* msr1_regnum */
+ H_SPR_GNER0, /* gner0_regnum */
+ H_SPR_GNER1, /* gner1_regnum */
+ H_SPR_FNER0, /* fner0_regnum */
+ H_SPR_FNER1, /* fner1_regnum */
};
- gdb_assert (reg >= 0 && reg < NUM_REGS);
+ gdb_assert (reg >= 0 && reg < gdbarch_num_regs (gdbarch));
if (first_gpr_regnum <= reg && reg <= last_gpr_regnum)
return reg - first_gpr_regnum + SIM_FRV_GR0_REGNUM;
return SIM_FRV_SPR0_REGNUM + spr_reg_offset;
}
- internal_error (__FILE__, __LINE__, "Bad register number %d", reg);
+ internal_error (__FILE__, __LINE__, _("Bad register number %d"), reg);
}
static const unsigned char *
-frv_breakpoint_from_pc (CORE_ADDR *pcptr, int *lenp)
+frv_breakpoint_from_pc (struct gdbarch *gdbarch, CORE_ADDR *pcptr, int *lenp)
{
static unsigned char breakpoint[] = {0xc0, 0x70, 0x00, 0x01};
*lenp = sizeof (breakpoint);
constraint that a break instruction must not appear as any but the
first instruction in the bundle. */
static CORE_ADDR
-frv_gdbarch_adjust_breakpoint_address (struct gdbarch *gdbarch, CORE_ADDR bpaddr)
+frv_adjust_breakpoint_address (struct gdbarch *gdbarch, CORE_ADDR bpaddr)
{
int count = max_instrs_per_bundle;
CORE_ADDR addr = bpaddr - frv_instr_size;
char instr[frv_instr_size];
int status;
- status = read_memory_nobpt (addr, instr, sizeof instr);
+ status = target_read_memory (addr, instr, sizeof instr);
if (status != 0)
break;
return (8 <= reg && reg <= 13);
}
-
/* Scan an FR-V prologue, starting at PC, until frame->PC.
If FRAME is non-zero, fill in its saved_regs with appropriate addresses.
We assume FRAME's saved_regs array has already been allocated and cleared.
arguments in any frame but the top, you'll need to do this serious
prologue analysis. */
static CORE_ADDR
-frv_analyze_prologue (CORE_ADDR pc, struct frame_info *next_frame,
+frv_analyze_prologue (CORE_ADDR pc, struct frame_info *this_frame,
struct frv_unwind_cache *info)
{
/* When writing out instruction bitpatterns, we use the following
char gr_saved[64];
int gr_sp_offset[64];
+ /* The address of the most recently scanned prologue instruction. */
+ CORE_ADDR last_prologue_pc;
+
+ /* The address of the next instruction. */
+ CORE_ADDR next_pc;
+
+ /* The upper bound to of the pc values to scan. */
+ CORE_ADDR lim_pc;
+
memset (gr_saved, 0, sizeof (gr_saved));
- while (! next_frame || pc < frame_pc_unwind (next_frame))
+ last_prologue_pc = pc;
+
+ /* Try to compute an upper limit (on how far to scan) based on the
+ line number info. */
+ lim_pc = skip_prologue_using_sal (pc);
+ /* If there's no line number info, lim_pc will be 0. In that case,
+ set the limit to be 100 instructions away from pc. Hopefully, this
+ will be far enough away to account for the entire prologue. Don't
+ worry about overshooting the end of the function. The scan loop
+ below contains some checks to avoid scanning unreasonably far. */
+ if (lim_pc == 0)
+ lim_pc = pc + 400;
+
+ /* If we have a frame, we don't want to scan past the frame's pc. This
+ will catch those cases where the pc is in the prologue. */
+ if (this_frame)
{
- LONGEST op = read_memory_integer (pc, 4);
+ CORE_ADDR frame_pc = get_frame_pc (this_frame);
+ if (frame_pc < lim_pc)
+ lim_pc = frame_pc;
+ }
+
+ /* Scan the prologue. */
+ while (pc < lim_pc)
+ {
+ char buf[frv_instr_size];
+ LONGEST op;
+
+ if (target_read_memory (pc, buf, sizeof buf) != 0)
+ break;
+ op = extract_signed_integer (buf, sizeof buf);
+
+ next_pc = pc + 4;
/* The tests in this chain of ifs should be in order of
decreasing selectivity, so that more particular patterns get
to fire before less particular patterns. */
+ /* Some sort of control transfer instruction: stop scanning prologue.
+ Integer Conditional Branch:
+ X XXXX XX 0000110 XX XXXXXXXXXXXXXXXX
+ Floating-point / media Conditional Branch:
+ X XXXX XX 0000111 XX XXXXXXXXXXXXXXXX
+ LCR Conditional Branch to LR
+ X XXXX XX 0001110 XX XX 001 X XXXXXXXXXX
+ Integer conditional Branches to LR
+ X XXXX XX 0001110 XX XX 010 X XXXXXXXXXX
+ X XXXX XX 0001110 XX XX 011 X XXXXXXXXXX
+ Floating-point/Media Branches to LR
+ X XXXX XX 0001110 XX XX 110 X XXXXXXXXXX
+ X XXXX XX 0001110 XX XX 111 X XXXXXXXXXX
+ Jump and Link
+ X XXXXX X 0001100 XXXXXX XXXXXX XXXXXX
+ X XXXXX X 0001101 XXXXXX XXXXXX XXXXXX
+ Call
+ X XXXXXX 0001111 XXXXXXXXXXXXXXXXXX
+ Return from Trap
+ X XXXXX X 0000101 XXXXXX XXXXXX XXXXXX
+ Integer Conditional Trap
+ X XXXX XX 0000100 XXXXXX XXXX 00 XXXXXX
+ X XXXX XX 0011100 XXXXXX XXXXXXXXXXXX
+ Floating-point /media Conditional Trap
+ X XXXX XX 0000100 XXXXXX XXXX 01 XXXXXX
+ X XXXX XX 0011101 XXXXXX XXXXXXXXXXXX
+ Break
+ X XXXX XX 0000100 XXXXXX XXXX 11 XXXXXX
+ Media Trap
+ X XXXX XX 0000100 XXXXXX XXXX 10 XXXXXX */
+ if ((op & 0x01d80000) == 0x00180000 /* Conditional branches and Call */
+ || (op & 0x01f80000) == 0x00300000 /* Jump and Link */
+ || (op & 0x01f80000) == 0x00100000 /* Return from Trap, Trap */
+ || (op & 0x01f80000) == 0x00700000) /* Trap immediate */
+ {
+ /* Stop scanning; not in prologue any longer. */
+ break;
+ }
+
+ /* Loading something from memory into fp probably means that
+ we're in the epilogue. Stop scanning the prologue.
+ ld @(GRi, GRk), fp
+ X 000010 0000010 XXXXXX 000100 XXXXXX
+ ldi @(GRi, d12), fp
+ X 000010 0110010 XXXXXX XXXXXXXXXXXX */
+ else if ((op & 0x7ffc0fc0) == 0x04080100
+ || (op & 0x7ffc0000) == 0x04c80000)
+ {
+ break;
+ }
+
/* Setting the FP from the SP:
ori sp, 0, fp
P 000010 0100010 000001 000000000000 = 0x04881000
0 111111 1111111 111111 111111111111 = 0x7fffffff
. . . . . . . .
We treat this as part of the prologue. */
- if ((op & 0x7fffffff) == 0x04881000)
+ else if ((op & 0x7fffffff) == 0x04881000)
{
fp_set = 1;
fp_offset = 0;
+ last_prologue_pc = next_pc;
}
/* Move the link register to the scratch register grJ, before saving:
/* If we're moving it to a scratch register, that's fine. */
if (is_caller_saves_reg (gr_j))
- lr_save_reg = gr_j;
- /* Otherwise it's not a prologue instruction that we
- recognize. */
- else
- break;
+ {
+ lr_save_reg = gr_j;
+ last_prologue_pc = next_pc;
+ }
}
/* To save multiple callee-saves registers on the stack, at
gr_saved[gr_k + i] = 1;
gr_sp_offset[gr_k + i] = 4 * i;
}
+ last_prologue_pc = next_pc;
}
- else
- /* It's not a prologue instruction. */
- break;
}
/* Adjusting the stack pointer. (The stack pointer is GR1.)
We treat this as part of the prologue. */
else if ((op & 0x7ffff000) == 0x02401000)
{
- /* Sign-extend the twelve-bit field.
- (Isn't there a better way to do this?) */
- int s = (((op & 0xfff) - 0x800) & 0xfff) - 0x800;
+ if (framesize == 0)
+ {
+ /* Sign-extend the twelve-bit field.
+ (Isn't there a better way to do this?) */
+ int s = (((op & 0xfff) - 0x800) & 0xfff) - 0x800;
- framesize -= s;
+ framesize -= s;
+ last_prologue_pc = pc;
+ }
+ else
+ {
+ /* If the prologue is being adjusted again, we've
+ likely gone too far; i.e. we're probably in the
+ epilogue. */
+ break;
+ }
}
/* Setting the FP to a constant distance from the SP:
int s = (((op & 0xfff) - 0x800) & 0xfff) - 0x800;
fp_set = 1;
fp_offset = s;
+ last_prologue_pc = pc;
}
/* To spill an argument register to a scratch register:
{
int gr_i = ((op >> 12) & 0x3f);
- /* If the source isn't an arg register, then this isn't a
- prologue instruction. */
- if (! is_argument_reg (gr_i))
- break;
+ /* Make sure that the source is an arg register; if it is, we'll
+ treat it as a prologue instruction. */
+ if (is_argument_reg (gr_i))
+ last_prologue_pc = next_pc;
}
/* To spill 16-bit values to the stack:
{
int gr_k = ((op >> 25) & 0x3f);
- if (! is_argument_reg (gr_k))
- break; /* Source isn't an arg register. */
+ /* Make sure that GRk is really an argument register; treat
+ it as a prologue instruction if so. */
+ if (is_argument_reg (gr_k))
+ last_prologue_pc = next_pc;
}
/* To save multiple callee-saves register on the stack, at a
gr_saved[gr_k + i] = 1;
gr_sp_offset[gr_k + i] = s + (4 * i);
}
+ last_prologue_pc = next_pc;
}
- else
- /* It's not a prologue instruction. */
- break;
}
/* Storing any kind of integer register at any constant offset
/* If the address isn't relative to the SP or FP, it's not a
prologue instruction. */
if (gr_i != sp_regnum && gr_i != fp_regnum)
- break;
+ {
+ /* Do nothing; not a prologue instruction. */
+ }
/* Saving the old FP in the new frame (relative to the SP). */
- if (gr_k == fp_regnum && gr_i == sp_regnum)
+ else if (gr_k == fp_regnum && gr_i == sp_regnum)
{
gr_saved[fp_regnum] = 1;
gr_sp_offset[fp_regnum] = offset;
+ last_prologue_pc = next_pc;
}
/* Saving callee-saves register(s) on the stack, relative to
gr_sp_offset[gr_k] = offset;
else
gr_sp_offset[gr_k] = offset + fp_offset;
+ last_prologue_pc = next_pc;
}
/* Saving the scratch register holding the return address. */
lr_sp_offset = offset;
else
lr_sp_offset = offset + fp_offset;
+ last_prologue_pc = next_pc;
}
/* Spilling int-sized arguments to the stack. */
else if (is_argument_reg (gr_k))
- ;
-
- /* It's not a store instruction we recognize, so this must
- be the end of the prologue. */
- else
- break;
+ last_prologue_pc = next_pc;
}
-
- /* It's not any instruction we recognize, so this must be the end
- of the prologue. */
- else
- break;
-
- pc += 4;
+ pc = next_pc;
}
- if (next_frame && info)
+ if (this_frame && info)
{
int i;
ULONGEST this_base;
because instructions may save relative to the SP, but we need
their addresses relative to the FP. */
if (fp_set)
- frame_unwind_unsigned_register (next_frame, fp_regnum, &this_base);
+ this_base = get_frame_register_unsigned (this_frame, fp_regnum);
else
- frame_unwind_unsigned_register (next_frame, sp_regnum, &this_base);
+ this_base = get_frame_register_unsigned (this_frame, sp_regnum);
for (i = 0; i < 64; i++)
if (gr_saved[i])
trad_frame_set_value (info->saved_regs, sp_regnum, info->prev_sp);
}
- return pc;
+ return last_prologue_pc;
}
static CORE_ADDR
-frv_skip_prologue (CORE_ADDR pc)
+frv_skip_prologue (struct gdbarch *gdbarch, CORE_ADDR pc)
{
CORE_ADDR func_addr, func_end, new_pc;
static struct frv_unwind_cache *
-frv_frame_unwind_cache (struct frame_info *next_frame,
+frv_frame_unwind_cache (struct frame_info *this_frame,
void **this_prologue_cache)
{
- struct gdbarch *gdbarch = get_frame_arch (next_frame);
+ struct gdbarch *gdbarch = get_frame_arch (this_frame);
CORE_ADDR pc;
- ULONGEST prev_sp;
ULONGEST this_base;
struct frv_unwind_cache *info;
info = FRAME_OBSTACK_ZALLOC (struct frv_unwind_cache);
(*this_prologue_cache) = info;
- info->saved_regs = trad_frame_alloc_saved_regs (next_frame);
+ info->saved_regs = trad_frame_alloc_saved_regs (this_frame);
/* Prologue analysis does the rest... */
- frv_analyze_prologue (frame_func_unwind (next_frame), next_frame, info);
+ frv_analyze_prologue (get_frame_func (this_frame), this_frame, info);
return info;
}
static void
frv_extract_return_value (struct type *type, struct regcache *regcache,
- void *valbuf)
+ gdb_byte *valbuf)
{
int len = TYPE_LENGTH (type);
store_unsigned_integer ((bfd_byte *) valbuf + 4, 4, regval);
}
else
- internal_error (__FILE__, __LINE__, "Illegal return value length: %d", len);
+ internal_error (__FILE__, __LINE__, _("Illegal return value length: %d"), len);
}
static CORE_ADDR
-frv_extract_struct_value_address (struct regcache *regcache)
+frv_frame_align (struct gdbarch *gdbarch, CORE_ADDR sp)
{
- ULONGEST addr;
- regcache_cooked_read_unsigned (regcache, struct_return_regnum, &addr);
- return addr;
+ /* Require dword alignment. */
+ return align_down (sp, 8);
}
-static void
-frv_store_struct_return (CORE_ADDR addr, CORE_ADDR sp)
+static CORE_ADDR
+find_func_descr (struct gdbarch *gdbarch, CORE_ADDR entry_point)
{
- write_register (struct_return_regnum, addr);
-}
+ CORE_ADDR descr;
+ char valbuf[4];
+ CORE_ADDR start_addr;
-static int
-frv_frameless_function_invocation (struct frame_info *frame)
-{
- return frameless_look_for_prologue (frame);
+ /* If we can't find the function in the symbol table, then we assume
+ that the function address is already in descriptor form. */
+ if (!find_pc_partial_function (entry_point, NULL, &start_addr, NULL)
+ || entry_point != start_addr)
+ return entry_point;
+
+ descr = frv_fdpic_find_canonical_descriptor (entry_point);
+
+ if (descr != 0)
+ return descr;
+
+ /* Construct a non-canonical descriptor from space allocated on
+ the stack. */
+
+ descr = value_as_long (value_allocate_space_in_inferior (8));
+ store_unsigned_integer (valbuf, 4, entry_point);
+ write_memory (descr, valbuf, 4);
+ store_unsigned_integer (valbuf, 4,
+ frv_fdpic_find_global_pointer (entry_point));
+ write_memory (descr + 4, valbuf, 4);
+ return descr;
}
static CORE_ADDR
-frv_frame_align (struct gdbarch *gdbarch, CORE_ADDR sp)
+frv_convert_from_func_ptr_addr (struct gdbarch *gdbarch, CORE_ADDR addr,
+ struct target_ops *targ)
{
- /* Require dword alignment. */
- return align_down (sp, 8);
+ CORE_ADDR entry_point;
+ CORE_ADDR got_address;
+
+ entry_point = get_target_memory_unsigned (targ, addr, 4);
+ got_address = get_target_memory_unsigned (targ, addr + 4, 4);
+
+ if (got_address == frv_fdpic_find_global_pointer (entry_point))
+ return entry_point;
+ else
+ return addr;
}
static CORE_ADDR
-frv_push_dummy_call (struct gdbarch *gdbarch, CORE_ADDR func_addr,
+frv_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
struct regcache *regcache, CORE_ADDR bp_addr,
int nargs, struct value **args, CORE_ADDR sp,
int struct_return, CORE_ADDR struct_addr)
CORE_ADDR regval;
int stack_space;
int stack_offset;
+ enum frv_abi abi = frv_abi (gdbarch);
+ CORE_ADDR func_addr = find_function_addr (function, NULL);
#if 0
printf("Push %d args at sp = %x, struct_return=%d (%x)\n",
stack_space = 0;
for (argnum = 0; argnum < nargs; ++argnum)
- stack_space += align_up (TYPE_LENGTH (VALUE_TYPE (args[argnum])), 4);
+ stack_space += align_up (TYPE_LENGTH (value_type (args[argnum])), 4);
stack_space -= (6 * 4);
if (stack_space > 0)
for (argnum = 0; argnum < nargs; ++argnum)
{
arg = args[argnum];
- arg_type = check_typedef (VALUE_TYPE (arg));
+ arg_type = check_typedef (value_type (arg));
len = TYPE_LENGTH (arg_type);
typecode = TYPE_CODE (arg_type);
len = 4;
val = valbuf;
}
+ else if (abi == FRV_ABI_FDPIC
+ && len == 4
+ && typecode == TYPE_CODE_PTR
+ && TYPE_CODE (TYPE_TARGET_TYPE (arg_type)) == TYPE_CODE_FUNC)
+ {
+ /* The FDPIC ABI requires function descriptors to be passed instead
+ of entry points. */
+ store_unsigned_integer
+ (valbuf, 4,
+ find_func_descr (gdbarch,
+ extract_unsigned_integer (value_contents (arg),
+ 4)));
+ typecode = TYPE_CODE_PTR;
+ len = 4;
+ val = valbuf;
+ }
else
{
- val = (char *) VALUE_CONTENTS (arg);
+ val = (char *) value_contents (arg);
}
while (len > 0)
always at BP_ADDR. */
regcache_cooked_write_unsigned (regcache, lr_regnum, bp_addr);
+ if (abi == FRV_ABI_FDPIC)
+ {
+ /* Set the GOT register for the FDPIC ABI. */
+ regcache_cooked_write_unsigned
+ (regcache, first_gpr_regnum + 15,
+ frv_fdpic_find_global_pointer (func_addr));
+ }
+
/* Finally, update the SP register. */
regcache_cooked_write_unsigned (regcache, sp_regnum, sp);
static void
frv_store_return_value (struct type *type, struct regcache *regcache,
- const void *valbuf)
+ const gdb_byte *valbuf)
{
int len = TYPE_LENGTH (type);
}
else
internal_error (__FILE__, __LINE__,
- "Don't know how to return a %d-byte value.", len);
+ _("Don't know how to return a %d-byte value."), len);
+}
+
+enum return_value_convention
+frv_return_value (struct gdbarch *gdbarch, struct type *func_type,
+ struct type *valtype, struct regcache *regcache,
+ gdb_byte *readbuf, const gdb_byte *writebuf)
+{
+ int struct_return = TYPE_CODE (valtype) == TYPE_CODE_STRUCT
+ || TYPE_CODE (valtype) == TYPE_CODE_UNION
+ || TYPE_CODE (valtype) == TYPE_CODE_ARRAY;
+
+ if (writebuf != NULL)
+ {
+ gdb_assert (!struct_return);
+ frv_store_return_value (valtype, regcache, writebuf);
+ }
+
+ if (readbuf != NULL)
+ {
+ gdb_assert (!struct_return);
+ frv_extract_return_value (valtype, regcache, readbuf);
+ }
+
+ if (struct_return)
+ return RETURN_VALUE_STRUCT_CONVENTION;
+ else
+ return RETURN_VALUE_REGISTER_CONVENTION;
}
and FR400. */
int
-frv_check_watch_resources (int type, int cnt, int ot)
+frv_check_watch_resources (struct gdbarch *gdbarch, int type, int cnt, int ot)
{
- struct gdbarch_tdep *var = CURRENT_VARIANT;
+ struct gdbarch_tdep *var = gdbarch_tdep (gdbarch);
/* Watchpoints not supported on simulator. */
if (strcmp (target_shortname, "sim") == 0)
}
-CORE_ADDR
-frv_stopped_data_address (void)
+int
+frv_stopped_data_address (CORE_ADDR *addr_p)
{
+ struct frame_info *frame = get_current_frame ();
CORE_ADDR brr, dbar0, dbar1, dbar2, dbar3;
- brr = read_register (brr_regnum);
- dbar0 = read_register (dbar0_regnum);
- dbar1 = read_register (dbar1_regnum);
- dbar2 = read_register (dbar2_regnum);
- dbar3 = read_register (dbar3_regnum);
+ brr = get_frame_register_unsigned (frame, brr_regnum);
+ dbar0 = get_frame_register_unsigned (frame, dbar0_regnum);
+ dbar1 = get_frame_register_unsigned (frame, dbar1_regnum);
+ dbar2 = get_frame_register_unsigned (frame, dbar2_regnum);
+ dbar3 = get_frame_register_unsigned (frame, dbar3_regnum);
if (brr & (1<<11))
- return dbar0;
+ *addr_p = dbar0;
else if (brr & (1<<10))
- return dbar1;
+ *addr_p = dbar1;
else if (brr & (1<<9))
- return dbar2;
+ *addr_p = dbar2;
else if (brr & (1<<8))
- return dbar3;
+ *addr_p = dbar3;
else
return 0;
+
+ return 1;
+}
+
+int
+frv_have_stopped_data_address (void)
+{
+ CORE_ADDR addr = 0;
+ return frv_stopped_data_address (&addr);
}
static CORE_ADDR
frame. This will be used to create a new GDB frame struct. */
static void
-frv_frame_this_id (struct frame_info *next_frame,
+frv_frame_this_id (struct frame_info *this_frame,
void **this_prologue_cache, struct frame_id *this_id)
{
struct frv_unwind_cache *info
- = frv_frame_unwind_cache (next_frame, this_prologue_cache);
+ = frv_frame_unwind_cache (this_frame, this_prologue_cache);
CORE_ADDR base;
CORE_ADDR func;
struct minimal_symbol *msym_stack;
struct frame_id id;
/* The FUNC is easy. */
- func = frame_func_unwind (next_frame);
+ func = get_frame_func (this_frame);
/* Check if the stack is empty. */
msym_stack = lookup_minimal_symbol ("_stack", NULL, NULL);
return;
id = frame_id_build (base, func);
-
- /* Check that we're not going round in circles with the same frame
- ID (but avoid applying the test to sentinel frames which do go
- round in circles). Can't use frame_id_eq() as that doesn't yet
- compare the frame's PC value. */
- if (frame_relative_level (next_frame) >= 0
- && get_frame_type (next_frame) != DUMMY_FRAME
- && frame_id_eq (get_frame_id (next_frame), id))
- return;
-
(*this_id) = id;
}
-static void
-frv_frame_prev_register (struct frame_info *next_frame,
- void **this_prologue_cache,
- int regnum, int *optimizedp,
- enum lval_type *lvalp, CORE_ADDR *addrp,
- int *realnump, void *bufferp)
+static struct value *
+frv_frame_prev_register (struct frame_info *this_frame,
+ void **this_prologue_cache, int regnum)
{
struct frv_unwind_cache *info
- = frv_frame_unwind_cache (next_frame, this_prologue_cache);
- trad_frame_prev_register (next_frame, info->saved_regs, regnum,
- optimizedp, lvalp, addrp, realnump, bufferp);
+ = frv_frame_unwind_cache (this_frame, this_prologue_cache);
+ return trad_frame_get_prev_register (this_frame, info->saved_regs, regnum);
}
static const struct frame_unwind frv_frame_unwind = {
NORMAL_FRAME,
frv_frame_this_id,
- frv_frame_prev_register
+ frv_frame_prev_register,
+ NULL,
+ default_frame_sniffer
};
-static const struct frame_unwind *
-frv_frame_sniffer (struct frame_info *next_frame)
-{
- return &frv_frame_unwind;
-}
-
static CORE_ADDR
-frv_frame_base_address (struct frame_info *next_frame, void **this_cache)
+frv_frame_base_address (struct frame_info *this_frame, void **this_cache)
{
struct frv_unwind_cache *info
- = frv_frame_unwind_cache (next_frame, this_cache);
+ = frv_frame_unwind_cache (this_frame, this_cache);
return info->base;
}
}
-/* Assuming NEXT_FRAME->prev is a dummy, return the frame ID of that
- dummy frame. The frame ID's base needs to match the TOS value
- saved by save_dummy_frame_tos(), and the PC match the dummy frame's
- breakpoint. */
+/* Assuming THIS_FRAME is a dummy, return the frame ID of that dummy
+ frame. The frame ID's base needs to match the TOS value saved by
+ save_dummy_frame_tos(), and the PC match the dummy frame's breakpoint. */
static struct frame_id
-frv_unwind_dummy_id (struct gdbarch *gdbarch, struct frame_info *next_frame)
+frv_dummy_id (struct gdbarch *gdbarch, struct frame_info *this_frame)
{
- return frame_id_build (frv_unwind_sp (gdbarch, next_frame),
- frame_pc_unwind (next_frame));
+ CORE_ADDR sp = get_frame_register_unsigned (this_frame, sp_regnum);
+ return frame_id_build (sp, get_frame_pc (this_frame));
}
-
static struct gdbarch *
frv_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
{
struct gdbarch *gdbarch;
struct gdbarch_tdep *var;
+ int elf_flags = 0;
/* Check to see if we've already built an appropriate architecture
object for this executable. */
break;
case bfd_mach_fr400:
+ case bfd_mach_fr450:
set_variant_num_gprs (var, 32);
set_variant_num_fprs (var, 32);
break;
/* Never heard of this variant. */
return 0;
}
-
+
+ /* Extract the ELF flags, if available. */
+ if (info.abfd && bfd_get_flavour (info.abfd) == bfd_target_elf_flavour)
+ elf_flags = elf_elfheader (info.abfd)->e_flags;
+
+ if (elf_flags & EF_FRV_FDPIC)
+ set_variant_abi_fdpic (var);
+
+ if (elf_flags & EF_FRV_CPU_FR450)
+ set_variant_scratch_registers (var);
+
gdbarch = gdbarch_alloc (&info, var);
set_gdbarch_short_bit (gdbarch, 16);
set_gdbarch_skip_prologue (gdbarch, frv_skip_prologue);
set_gdbarch_breakpoint_from_pc (gdbarch, frv_breakpoint_from_pc);
- set_gdbarch_adjust_breakpoint_address (gdbarch, frv_gdbarch_adjust_breakpoint_address);
+ set_gdbarch_adjust_breakpoint_address
+ (gdbarch, frv_adjust_breakpoint_address);
- set_gdbarch_frame_args_skip (gdbarch, 0);
- set_gdbarch_frameless_function_invocation (gdbarch, frv_frameless_function_invocation);
-
- set_gdbarch_use_struct_convention (gdbarch, always_use_struct_convention);
- set_gdbarch_extract_return_value (gdbarch, frv_extract_return_value);
-
- set_gdbarch_deprecated_store_struct_return (gdbarch, frv_store_struct_return);
- set_gdbarch_store_return_value (gdbarch, frv_store_return_value);
- set_gdbarch_extract_struct_value_address (gdbarch, frv_extract_struct_value_address);
+ set_gdbarch_return_value (gdbarch, frv_return_value);
/* Frame stuff. */
set_gdbarch_unwind_pc (gdbarch, frv_unwind_pc);
set_gdbarch_unwind_sp (gdbarch, frv_unwind_sp);
set_gdbarch_frame_align (gdbarch, frv_frame_align);
- frame_unwind_append_sniffer (gdbarch, frv_frame_sniffer);
frame_base_set_default (gdbarch, &frv_frame_base);
+ /* We set the sniffer lower down after the OSABI hooks have been
+ established. */
/* Settings for calling functions in the inferior. */
set_gdbarch_push_dummy_call (gdbarch, frv_push_dummy_call);
- set_gdbarch_unwind_dummy_id (gdbarch, frv_unwind_dummy_id);
+ set_gdbarch_dummy_id (gdbarch, frv_dummy_id);
/* Settings that should be unnecessary. */
set_gdbarch_inner_than (gdbarch, core_addr_lessthan);
- set_gdbarch_write_pc (gdbarch, generic_target_write_pc);
-
- set_gdbarch_decr_pc_after_break (gdbarch, 0);
- set_gdbarch_function_start_offset (gdbarch, 0);
-
- set_gdbarch_remote_translate_xfer_address
- (gdbarch, generic_remote_translate_xfer_address);
-
/* Hardware watchpoint / breakpoint support. */
switch (info.bfd_arch_info->mach)
{
break;
case bfd_mach_fr400:
+ case bfd_mach_fr450:
/* fr400-style hardware debugging support. */
var->num_hw_watchpoints = 2;
var->num_hw_breakpoints = 4;
}
set_gdbarch_print_insn (gdbarch, print_insn_frv);
+ if (frv_abi (gdbarch) == FRV_ABI_FDPIC)
+ set_gdbarch_convert_from_func_ptr_addr (gdbarch,
+ frv_convert_from_func_ptr_addr);
+
+ set_solib_ops (gdbarch, &frv_so_ops);
+
+ /* Hook in ABI-specific overrides, if they have been registered. */
+ gdbarch_init_osabi (info, gdbarch);
+
+ /* Set the fallback (prologue based) frame sniffer. */
+ frame_unwind_append_unwinder (gdbarch, &frv_frame_unwind);
+
+ /* Enable TLS support. */
+ set_gdbarch_fetch_tls_load_module_address (gdbarch,
+ frv_fetch_objfile_link_map);
return gdbarch;
}
projects / deliverable / binutils-gdb.git / blobdiff